CS8182
Micropower 200 mA
Low Dropout Tracking
Regulator/Line Driver
The CS8182 is a monolithic integrated low dropout tracking
regulator designed to provide adjustable buffered output voltage that
closely tracks (±10 mV) the reference input. The output delivers up to
200 mA while being able to be configured higher, lower or equal to the
reference voltages.
The output has been designed to operate over a wide range (2.8 V to
45 V) while still maintaining excellent DC characteristics. The
CS8182 is protected from reverse battery, short circuit and thermal
runaway conditions. The device also can withstand 45 V load dump
transients and −50 V reverse polarity input voltage transients. This
makes it suitable for use in automotive environments.
The VREF/ENABLE lead serves two purposes. It is used to provide
the input voltage as a reference for the output and it also can be pulled
low to place the device in sleep mode where it nominally draws less
than 30A from the supply.
•
•
•
•
•
•
•
•
•
200 mA Source Capability
Output Tracks within ±10 mV Worst Case
Low Dropout (0.35 V Typ. @ 200 mA)
Low Quiescent Current
Thermal Shutdown
Short Circuit Protection
Wide Operating Range
Internally Fused Leads in SO−8 Package
For Automotive and Other Applications Requiring Site and Change
Control
VIN
8
1
1
5
D2PAK−5
DPS SUFFIX
CASE 936AC
SO−8
DF SUFFIX
CASE 751
PIN CONNECTIONS AND
MARKING DIAGRAMS
VOUT
GND
GND
Adj
1
VIN
GND
GND
VREF/ENABLE
8182
ALYW
Features
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Tab
GND
Pin 1. VIN
2. VOUT
3. GND
4. Adj
5. VREF
CS8182
AWLYWW
1
A
WL, L
YY, Y
WW, W
= Assembly Location
= Wafer Lot
= Year
= Work Week
VOUT
ORDERING INFORMATION*
Current Limit &
SAT Sense
Adj
−
ENABLE
Package
Shipping†
CS8182YDF8
SO−8
95 Units/Rail
SO−8
2500 Tape & Reel
CS8182YDFR8
CS8182YDPS5
+
VREF/ENABLE
+
GND
Thermal
Shutdown
Device
−
D2PAK
5−PIN
CS8182YDPSR5 D2PAK 5−PIN
50 Units/Rail
750 Tape & Reel
*Consult your local sales representative for SO−8 with
exposed pads package option.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
2.0 V
Figure 1. Block Diagram
Semiconductor Components Industries, LLC, 2004
August, 2004 − Rev. 21
1
Publication Order Number:
CS8182/D
CS8182
PACKAGE PIN DESCRIPTION
Package Lead Number
SO−8
D2PAK 5−PIN
Lead Symbol
8
1
VIN
1
2
VOUT
Regulated output.
2, 3, 6, 7
3
GND
Ground.
4
4
Adj
5
5
VREF/ENABLE
Function
Input voltage.
Adjust lead.
Reference voltage and ENABLE input.
MAXIMUM RATINGS
Rating
Value
Unit
Storage Temperature
−65 to 150
°C
Supply Voltage Range (continuous)
−15 to 45
V
Supply Voltage Range (normal, continuous)
3.4 to 45
V
45
V
−10 to 45
V
Maximum Junction Temperature
150
°C
Package Thermal Resistance, SO−8:
Junction−to−Case, RJC
Junction−to−Ambient, RJA
25
110
°C/W
°C/W
4.0
10−50**
°C/W
°C/W
2.0
200
kV
V
240 peak
225 peak
(Note 2)
°C
Peak Transient Voltage (VIN = 14 V, Load Dump Transient = 31 V)
Voltage Range (Adj, VOUT, VREF/ENABLE)
Package Thermal Resistance, D2PAK, 5−Pin:
Junction−to−Case, RJC
Junction−to−Ambient, RJA
ESD Capability (Human Body Model)
(Machine Model)
Lead Temperature Soldering:
(Note 1)
Reflow: (SO−8)
(D2PAK)
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. 60 second maximum above 183°C.
2. −5°C/+0°C allowable conditions.
*Depending on thermal properties of substrate. RJA = RJC + RCA
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2
CS8182
ELECTRICAL CHARACTERISTICS (VIN = 14 V; VREF/ENABLE > 2.75 V; −40°C < TJ < +125°C; COUT ≥ 10 F;
0.1 < COUT−ESR < 1.0 @ 10 kHz, unless otherwise specified.)
Test Conditions
Parameter
Min
Typ
Max
Unit
−10
−5.0
−
−
10
5
mV
mV
Regular Output
VREF − VOUT
VOUT Tracking Error
4.5 V ≤ VIN ≤ 26 V, 100 A ≤ IOUT ≤ 200 mA, Note 3
VIN = 12 V, IOUT = 30 mA, VREF = 5.0 V, Note 3
Dropout Voltage (VIN − VOUT)
IOUT = 100 A
IOUT = 30 mA
IOUT = 200 mA
−
−
−
100
−
350
150
500
600
mV
mV
mV
Line Regulation
4.5 V ≤ VIN ≤ 26 V, Note 3
−
−
10
mV
Load Regulation
100 A ≤ IOUT ≤ 200 mA, Note 3
−
−
10
mV
Adj Lead Current
Loop in Regulation
−
0.2
1.0
A
Current Limit
VIN = 14 V, VREF = 5.0 V, VOUT = 90% of VREF, Note 3
225
−
700
mA
Quiescent Current (IIN − IOUT)
VIN = 12 V, IOUT = 200 mA
VIN = 12 V, IOUT = 100 A
VIN = 12 V, VREF/ENABLE = 0 V
−
−
−
15
75
30
25
150
55
mA
A
A
Reverse Current
VOUT = 5.0 V, VIN = 0 V
−
0.2
1.5
mA
Ripple Rejection
f = 120 Hz, IOUT = 200 mA, 4.5 V ≤ VIN ≤ 26 V
60
−
−
dB
Thermal Shutdown
GBD
150
180
210
°C
0.80
2.00
2.75
V
−
0.2
1.0
A
VREF/ENABLE
Enable Voltage
Input Bias Current
−
VREF/ENABLE
3. VOUT connected to Adj lead.
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3
CS8182
TYPICAL CHARACTERISTICS
QUIESCENT CURRENT (mA)
18
16
14
12
10
8
6
4
2
0
0
20
40
60
80
100
120 140 160 180 200
OUTPUT CURRENT (mA)
1
100
0.9
90
QUIESCENT CURRENT (A)
QUIESCENT CURRENT (mA)
Figure 2. Quiescent Current vs. Output Current
0.8
0.7
0.6
0.5
0.4
I (VOUT) = 20 mA
0.3
0.2
0.1
0
5
10
15
20
70
60
50
40
30
20
VREF/ ENABLE = 0 V
10
I (VOUT) = 1 mA
0
80
0
25
30
35
40
45
0
5
VIN, INPUT VOLTAGE (V)
15
20
25
30
35
40
45
VIN, INPUT VOLTAGE (V)
Figure 3. Quiescent Current vs. Input Voltage
(Operating Mode)
Figure 4. Quiescent Current vs. Input Voltage
(Sleep Mode)
20
140
CURRENT INTO VOUT (mA)
* Graph is duplicate for VIN > 1.6 V.
**Dip (@5 V) shifts with VREF voltage.
18
CURRENT INTO VOUT (mA)
10
16
14
12
10
8
VIN = 6 V*
VREF = 5 V**
6
4
2
VIN = 0 V
0
0
5
10
15
* Graph is duplicate for VIN > 1.6 V.
**Dip (@5 V) shifts with VREF voltage.
120
100
VIN = 0 V
80
60
VIN = 6 V*
VREF = 5 V**
40
20
0
20
25
0
FORCED VOUT VOLTAGE (V)
5
10
15
20
25
30
FORCED VOUT VOLTAGE (V)
Figure 5. VOUT Reverse Current
Figure 6. VOUT Reverse Current
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4
35
40
CS8182
CIRCUIT DESCRIPTION
ENABLE Function
Output Voltage
By pulling the VREF/ENABLE lead below 2.0 V typically,
(see Figure 10 or Figure 11), the IC is disabled and enters a
sleep state where the device draws less than 55 A from
supply. When the VREF/ENABLE lead is greater than 2.75 V,
VOUT tracks the VREF/ENABLE lead normally.
The output is capable of supplying 200 mA to the load
while configured as a similar (Figure 7), lower (Figure 9), or
higher (Figure 8) voltage as the reference lead. The Adj lead
acts as the inverting terminal of the op amp and the VREF
lead as the non−inverting.
The device can also be configured as a high−side driver as
displayed in Figure 12.
GND
GND
VREF/
ENABLE
Adj
RA
Adj
VOUT, 200 mA
B+
CS8182
VIN
C2**
10 F
C1*
1.0 F
GND
VOUT
GND
GND
GND
R1
VREF/
ENABLE
GND
VREF
C3***
10 nF
Figure 8. Tracking Regulator at Higher Voltages
Figure 7. Tracking Regulator at the Same Voltage
GND
GND
R
VOUT VREF(1 E)
RA
VOUT VREF
VOUT, 200 mA
Loads
VOUT
C2**
GND
10 F
C1*
1.0 F
VREF/
ENABLE
Adj
5.0 V
C3***
10 nF
B+
VIN
CS8182
C1*
1.0 F
C3***
10 nF
R2
C1*
1.0 F
GND
GND
R
VREF/
ENABLE
Adj
VREF
B+
VIN
CS8182
GND
VOUT, 200 mA
Loads
VOUT
C2**
GND
10 F
RF
GND
B+
VIN
CS8182
VOUT, 200 mA
Loads
VOUT
C2**
GND
10 F
C3***
10 nF
VREF
from MCU
VOUT VREF( R2 )
R1 R2
Figure 9. Tracking Regulator at Lower Voltages
NCV8501
VREF (5.0 V)
200 mA
100 nF
5.0 V
To Load 10 F
(e.g. sensor)
GND
GND
Adj
GND
VIN
CS8182
VOUT
GND
C1*
1.0 F
C
GND
Adj
GND
VREF/
ENABLE
VOUT
I/O
C3***
10 nF
B+
VIN
CS8182
VIN
6.0 V−40 V
Figure 10. Tracking Regulator with ENABLE Circuit
GND
GND
VREF/
ENABLE
C3***
10 nF
VOUT B VSAT
Figure 11. Alternative ENABLE Circuit
Figure 12. High−Side Driver
* C1 is required if the regulator is far from the power source filter.
** C2 is required for stability.
*** C3 is recommended for EMC susceptibility.
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5
MCU
CS8182
APPLICATION NOTES
VOUT Short to Battery
Figure 14. In this case the CS8182 supply input voltage is set
at 7 V when a short to battery (14 V typical) occurs on VOUT
which normally runs at 5 V. The current into the device
(ammeter in Figure 14) will draw additional current as
displayed in Figure 15.
The CS8182 will survive a short to battery when hooked
up the conventional way as shown in Figure 13. No damage
to the part will occur. The part also endures a short to battery
when powered by an isolated supply at a lower voltage as in
Short to battery
C2**
10 F
B+
VOUT
VIN
GND
GND
CS8182
VOUT 70 mA
Loads
GND
C1*
1.0 F
GND
VREF/
ENABLE
Adj
+ Automotive Battery
− typically 14 V
5.0 V
+
5.0 V
−
C3***
10 nF
VOUT = VREF
Figure 13.
Short to battery
A
Loads
VOUT
B+
70 mA
C2**
10 F
VOUT
VIN
GND
GND
GND
Adj
* C1 is required if the regulator is far from the power source filter.
** C2 is required for stability.
*** C3 is recommended for EMC susceptibility.
CS8182
Automotive Battery
typically 14 V
C1*
7V
1.0 F
+
−
GND
VREF/
ENABLE
VOUT = VREF
C3***
10 nF
5.0 V
+
5.0 V
−
Figure 14.
2.0
Switched Application
1.8
The CS8182 has been designed for use in systems where
the reference voltage on the VREF/ENABLE pin is
continuously on. Typically, the current into the
VREF/ENABLE pin will be less than 1.0 A when the
voltage on the VIN pin (usually the ignition line) has been
switched out (VIN can be at high impedance or at ground.)
Reference Figure 16.
1.4
1.2
1.0
0.8
Ignition
Switch
0.6
0.4
VOUT
0.2
C2
10 F
0
5 6 7 8 9 10 1112 1314 15 1617 1819 20 2122 2324 25 26
VOUT VOLTAGE (V)
VOUT
VIN
GND
GND
GND
Figure 15. VOUT Short to Battery
Adj
CS8182
CURRENT (mA)
1.6
6
VBAT
GND
VREF/
ENABLE
Figure 16.
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C1
1.0 F
< 1.0 A
VREF
5.0 V
CS8182
External Capacitors
The value of RJA can then be compared with those in the
package section of the data sheet. Those packages with
RJA’s less than the calculated value in equation 2 will keep
the die temperature below 150°C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external heat
sink will be required.
The output capacitor for the CS8182 is required for
stability. Without it, the regulator output will oscillate.
Actual size and type may vary depending upon the
application load and temperature range. Capacitor effective
series resistance (ESR) is also a factor in the IC stability.
Worst−case is determined at the minimum ambient
temperature and maximum load expected.
The output capacitor can be increased in size to any
desired value above the minimum. One possible purpose of
this would be to maintain the output voltage during brief
conditions of negative input transients that might be
characteristic of a particular system.
The capacitor must also be rated at all ambient
temperatures expected in the system. To maintain regulator
stability down to −40°C, a capacitor rated at that temperature
must be used.
More information on capacitor selection for SMART
REGULATORs is available in the SMART REGULATOR
application note, “Compensation for Linear Regulators,”
document number SR003AN/D, available through our
website at http://www.onsemi.com.
IIN
VIN
VOUT
IQ
Figure 17. Single Output Regulator with Key
Performance Parameters Labeled
Heatsinks
A heatsink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of RJA:
The maximum power dissipation for a single output
regulator (Figure 17) is:
PD(max) {VIN(max) VOUT(min)} IOUT(max)
(1)
where:
VIN(max) is the maximum input voltage,
VOUT(min) is the minimum output voltage,
IOUT(max) is the maximum output current, for the
application,and
IQ is the quiescent current the regulator consumes at
IOUT(max).
Once the value of PD(max) is known, the maximum
permissible value of RJA can be calculated:
RJA 150°C TA
PD
IOUT
Control
Features
Calculating Power Dissipation in a Single Output
Linear Regulator
VIN(max)IQ
SMART
REGULATOR
RJA RJC RCS RSA
(3)
where:
RJC = the junction−to−case thermal resistance,
RCS = the case−to−heatsink thermal resistance, and
RSA = the heatsink−to−ambient thermal resistance.
RJC appears in the package section of the data sheet. Like
RJA, it is a function of package type. RCS and RSA are
functions of the package type, heatsink and the interface
between them. These values appear in heat sink data sheets
of heatsink manufacturers.
(2)
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7
CS8182
PACKAGE DIMENSIONS
SOIC−8
DF SUFFIX
CASE 751−07
ISSUE AB
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
−X−
A
8
5
0.25 (0.010)
S
B
1
M
Y
M
4
K
−Y−
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
SOLDERING FOOTPRINT
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
Figure 18. SOIC−8
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8
mm inches
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0
8
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0
8
0.010
0.020
0.228
0.244
CS8182
PACKAGE DIMENSIONS
D2PAK−5
DP SUFFIX
CASE 936AC−01
ISSUE O
A
TERMINAL 6
E
U
K
S
V
B
M
H
L
W
DIM
A
B
C
D
E
G
H
K
L
M
N
P
R
S
U
V
W
P
G
D
NOTES:
1. DIMENSIONS AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. PACKAGE OUTLINE EXCLUSIVE OF
MOLD FLASH AND METAL BURR.
4. PACKAGE OUTLINE INCLUSIVE OF
PLATING THICKNESS.
5. FOOT LENGTH MEASURED AT
INTERCEPT POINT BETWEEN DATUM A
AND LEAD SURFACE.
N
R
−A−
C
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9
INCHES
MIN
MAX
0.396
0.406
0.330
0.340
0.170
0.180
0.026
0.036
0.045
0.055
0.067 REF
0.580
0.620
0.055
0.066
0.000
0.010
0.098
0.108
0.017
0.023
0.090
0.110
0
8
0.095
0.105
0.30 REF
0.305 REF
0.010
MILLIMETERS
MIN
MAX
10.05
10.31
8.38
8.64
4.31
4.57
0.66
0.91
1.14
1.40
1.70 REF
14.73
15.75
1.40
1.68
0.00
0.25
2.49
2.74
0.43
0.58
2.29
2.79
0
8
2.41
2.67
7.62 REF
7.75 REF
0.25
CS8182
SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
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Phone: 81−3−5773−3850
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10
For additional information, please contact your
local Sales Representative.
CS8182/D