MC74LCX14 Low Voltage CMOS Hex Schmitt Inverter With 5 V-Tolerant Inputs The MC74LCX14 is a high performance hex inverter with Schmitt–Trigger inputs operating from a 2.3 to 3.6 V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers, while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5 V allows MC74LCX14 inputs to be safely driven from 5 V devices. Pin configuration and function are the same as the MC74LCX04, but the inputs have hysteresis and, with its Schmitt trigger function, the LCX14 can be used as a line receiver which will receive slow input signals. • • • • • • • • • • • http://onsemi.com MARKING DIAGRAMS SO–14 D SUFFIX CASE 751A 14 1 14 8 LCX14 AWLYWW 1 7 Designed for 2.3 V to 3.6 V VCC Operation 5 V Tolerant Inputs – Interface Capability With 5 V TTL Logic LVTTL Compatible LVCMOS Compatible LCX 14 AWLYWW TSSOP–14 DT SUFFIX CASE 948G 14 1 1 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current (10 A) Substantially Reduces System Power Requirements Latchup Performance Exceeds 500 mA SOIC EIAJ–14 M SUFFIX CASE 965 Current Drive Capability is 24 mA at Source/Sink Pin and Function Compatible with Other Standard Logic Families ESD Performance: HBM > 2000 V; Machine Model > 100 V 8 14 14 7 14 1 8 LCX14 ALYW 7 1 Chip Complexity: 41 Equivalent Gates A =Assembly Location WL or L = Wafer Lot Y = Year WW or W = Work Week ORDERING INFORMATION Semiconductor Components Industries, LLC, 2000 December, 2000 – Rev. 1 1 Device Package Shipping MC74LCX14D SO–14 55 Units/Rail MC74LCX14DR2 SO–14 2500 Units/Reel MC74LCX14DT TSSOP–14 96 Untis/Rail MC74LCX14DTR2 TSSOP–14 2500 Units/Reel MC74LCX14M SOIC EIAJ–14 50 Units/Rail MC74LCX14MEL SOIC EIAJ–14 2000 Units/Reel Publication Order Number: MC74LCX14/D MC74LCX14 Figure 1. Pinout: 14–Lead (Top View) VCC A6 Y6 A5 Y5 A4 Y4 14 13 12 11 10 9 8 Figure 2. Logic Diagram A1 A2 A3 1 2 3 4 5 6 9 8 11 10 13 12 Y1 Y2 Y3 Y=A 1 2 3 4 5 6 7 A1 Y1 A2 Y2 A3 Y3 GND A4 A5 A6 Y4 Y5 Y6 PIN NAMES Pins Function An Yn Data Inputs Outputs TRUTH TABLE Inputs Outputs A Y L H H L ABSOLUTE MAXIMUM RATINGS* Symbol Parameter VCC DC Supply Voltage VI DC Input Voltage VO DC Output Voltage IIK DC Input Diode Current IOK DC Output Diode Current Value Condition Unit –0.5 to +7.0 V –0.5 ≤ VI ≤ +7.0 V –0.5 ≤ VO ≤ VCC + 0.5 Output in HIGH or LOW State. (Note 1.) V –50 VI < GND mA –50 VO < GND mA +50 VO > VCC mA IO DC Output Source/Sink Current ±50 mA ICC DC Supply Current Per Supply Pin ±100 mA IGND DC Ground Current Per Ground Pin ±100 mA TSTG Storage Temperature Range –65 to +150 °C * Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied. 1. IO absolute maximum rating must be observed. http://onsemi.com 2 MC74LCX14 RECOMMENDED OPERATING CONDITIONS Symbol Parameter VCC Supply Voltage VI Input Voltage VO Output Voltage IOH HIGH Level Output Current IOL LOW Level Output Current TA Operating Free–Air Temperature Min Typ Max Unit 2.0 1.5 2.5 to 3.3 3.6 3.6 V 0 5.5 V 0 VCC V VCC= 3.0V–3.6V VCC= 2.7V–3.0V VCC= 2.3V–2.7V –24 –12 –8 mA VCC= 3.0V–3.6V VCC= 2.7V–3.0V VCC= 2.3V–2.7V +24 +12 +8 mA +85 °C Operating Data Retention Only (HIGH or LOW State) –40 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ DC ELECTRICAL CHARACTERISTICS TA = – 40 to 85°C Symbol Characteristic Condition Min Max Unit VT+ Positive Input Threshold Voltage (Figure 3) VCC = 2.5V VCC= 3.0V 0.9 1.2 1.7 2.2 V VT– Negative Input Threshold Voltage (Figure 3) VCC = 2.5V VCC= 3.0V 0.4 0.6 1.1 1.5 V VH Input Hysteresis Voltage (Figure 3) VCC = 2.5V VCC= 3.0V 0.3 0.4 1.0 1.2 V VOH HIGH Level Output Voltage g 2.3 V ≤ VCC ≤ 3.6 V; IOL = 100 µA VCC – 0.2 VCC = 2.3 V; IOH = –8 mA 1.8 VCC = 2.7 V; IOH = –12 mA 2.2 VCC = 3.0 V; IOH = –18 mA 2.4 VCC = 3.0 V; IOH = –24 mA 2.2 VOL II ICC ∆ICC V 2.3 V ≤ VCC ≤ 3.6 V; IOL = 100 µ 0.2 VCC = 2.3 V; IOL= 8 mA 0.3 VCC = 2.7 V; IOL= 12 mA 0.4 VCC = 3.0 V; IOL = 16 mA 0.4 VCC = 3.0 V; IOL = 24 mA 0.55 Input Leakage Current 2.3 V ≤ VCC ≤ 3.6 V; 0 V ≤ VI ≤ 5.5 V ±5.0 µA Quiescent Supply y Current 2.3 ≤ VCC ≤ 3.6 V; VI = GND or VCC 10 µA µ 2.3 ≤ VCC ≤ 3.6 V; 3.6 ≤ VI or VO ≤ 5.5 V ±10 2.3 ≤ VCC ≤ 3.6 V; VIH = VCC – 0.6 V 500 LOW Level Output Voltage g Increase in ICC per Input http://onsemi.com 3 V µA MC74LCX14 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 2.5 ns) Unit Limits TA = –40°C to +85°C Symbol Parameter tPLH tPHL Propagation Delay Input to Output tOSHL tOSLH Output–to–Output Skew (Note 2.) VCC = 3.3 V ± 0.3 V VCC = 2.7 V VCC = 2.5 V ± 0.2 V CL = 50 pF CL = 50 pF CL = 30 pF Waveform Min Max Min Max Min Max 1 1.5 1.5 6.5 6.5 1.5 1.5 7.5 7.5 1.5 1.5 7.8 7.8 ns 1.0 1.0 ns 2. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (tOSHL) or LOW–to–HIGH (tOSLH); parameter guaranteed by design. DYNAMIC SWITCHING CHARACTERISTICS TA = +25°C Symbol Characteristic Condition Min Typ Max Unit VOLP Dynamic LOW Peak Voltage (Note 3.) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V VCC = 2.5 V, CL = 30 pF, VIH =2.5 V, VIL = 0 V 0.8 0.6 V VOLV Dynamic LOW Valley Voltage (Note 3.) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V –0.8 –0.6 V 3. Number of outputs defined as “n”. Measured with “n–1” outputs switching from HIGH–to–LOW or LOW–to–HIGH. The remaining output is measured in the LOW state. CAPACITIVE CHARACTERISTICS Symbol Parameter Condition Typical Unit CIN Input Capacitance VCC = 3.3 V, VI = 0 V or VCC 7 pF COUT Output Capacitance VCC = 3.3 V, VI = 0 V or VCC 8 pF CPD Power Dissipation Capacitance 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 25 pF VCC VCC A 50% GND tPLH tPHL VOH Y PULSE GENERATOR DUT RT 50% VCC CL VOL Figure 3. Switching Waveforms CL =50 pF at VCC = 3.3 0.3 V or equivalent (includes jig and probe capacitance) RL = R1 = 500 Ω or equivalent RT = ZOUT of pulse generator (typically 50 Ω) Figure 4. Test Circuit http://onsemi.com 4 RL VT , TYPICAL INPUT THRESHOLD VOLTAGE (VOLTS) MC74LCX14 4 3 (VT+) 2 VHtyp (VT–) 1 2 2.5 3.5 3 VCC, POWER SUPPLY VOLTAGE (VOLTS) VHtyp = (VT+ typ) – (VT– typ) 3.6 Figure 5. Typical Input Threshold, VT+, VT– versus Power Supply Voltage (a) A Schmitt–Trigger Squares Up Inputs With Slow Rise and Fall Times (b) A Schmitt–Trigger Offers Maximum Noise Immunity VCC VH VH VT+ VT– Vin Vin VCC VT+ VT– GND GND VOH VOH Vout Vout VOL VOL Figure 6. Typical Schmitt–Trigger Applications INPUT Figure 7. Input Equivalent Circuit http://onsemi.com 5 MC74LCX14 PACKAGE DIMENSIONS SO–14 D SUFFIX CASE 751A–03 ISSUE F NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. –A – 14 8 –B – 1 P7 PL 0.25 (0.010) 7 G 0.25 (0.010) M T F J M K D 14 PL M R X 45° C SEATING PLANE B M B A S S DIM A B C D F G J K M P R MILLIMETERS MIN MAX 8.75 8.55 4.00 3.80 1.75 1.35 0.49 0.35 1.25 0.40 1.27 BSC 0.25 0.19 0.25 0.10 7° 0° 6.20 5.80 0.50 0.25 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 7° 0° 0.228 0.244 0.010 0.019 TSSOP–14 DT SUFFIX CASE 948G–01 ISSUE O NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. 14X K REF 0.10 (0.004) 0.15 (0.006) T U M T U V S S S N 2X 14 L/2 0.25 (0.010) 8 M B –U– L PIN 1 IDENT. F 7 1 0.15 (0.006) T U N S DETAIL E ÇÇÇ ÉÉ ÇÇÇ ÉÉ ÇÇÇ K A –V– K1 J J1 SECTION N–N –W– C 0.10 (0.004) –T– SEATING PLANE D G H DETAIL E http://onsemi.com 6 DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0 8 INCHES MIN MAX 0.193 0.200 0.169 0.177 --0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0 8 MC74LCX14 PACKAGE DIMENSIONS SOIC EIAJ–14 M SUFFIX CASE 965–01 ISSUE O 14 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). LE 8 Q1 E HE L 7 1 M DETAIL P Z D e VIEW P A c b 0.13 (0.005) A1 M 0.10 (0.004) http://onsemi.com 7 DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX 2.05 0.05 0.20 0.35 0.50 0.18 0.27 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 0 0.70 0.90 1.42 INCHES MIN MAX 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 0 0.028 0.035 0.056 MC74LCX14 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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