ONSEMI NTB75N03-06T4

NTP75N03−06,
NTB75N03−06
Power MOSFET
75 Amps, 30 Volts
N−Channel TO−220 and D2PAK
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This 20 VGS gate drive vertical Power MOSFET is a general
purpose part that provides the “best of design” available today in a low
cost power package. This power MOSFET is designed to withstand
high energy in the avalanche and commutation modes. The
Drain−to−Source Diode has a fast response with soft recovery.
V(BR)DSS
RDS(on) TYP
ID MAX
30 A
5.3 m @ 10 V
75 A
Features
•
•
•
•
•
•
Ultra−Low RDS(on), Single Base, Advanced Technology
SPICE Parameters Available
Diode is Characterized for Use in Bridge Circuits
IDSS and VDS(on) Specified at Elevated Temperatures
High Avalanche Energy Capability
ESD JEDAC Rated HBM Class 1, MM Class B, CDM Class 0
Typical Applications
•
•
•
•
4
4
2
1
3
1
Power Supplies
Inductive Loads
PWM Motor Controls
Replaces MTP1306 and MTB1306
D2PAK
CASE 418AA
Style 2
TO−220AB
CASE 221A
Style 5
2
3
MARKING DIAGRAMS
& PIN ASSIGNMENTS
N−Channel
4
Drain
4
Drain
D
G
75
N03−06
YWW
75
N03−06
YWW
S
1
Gate
3
Source
2
Drain
1
Gate
75N03−06
Y
WW
2
Drain
3
Source
= Device Code
= Year
= Work Week
ORDERING INFORMATION
Package
Shipping†
NTP75N03−06
TO−220
50 Units/Rail
NTB75N03−06
D2PAK
50 Units/Rail
NTB75N03−06T4
D2PAK
800/Tape & Reel
Device
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
 Semiconductor Components Industries, LLC, 2003
December, 2003 − Rev. 4
1
Publication Order Number:
NTP75N03−06/D
NTP75N03−06, NTB75N03−06
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
30
Vdc
Drain−to−Gate Voltage
(RGS = 10 M)
VDGB
30
Vdc
Gate−to−Source Voltage − Continuous
VGS
±20
Vdc
Non−repetitive (tp ≤ 10 ms)
VGS
±24
Vdc
ID
ID
75
59
225
Adc
PD
125
1.0
2.5
W
W/°C
W
TJ and Tstg
−55 to 150
°C
EAS
1500
mJ
RJC
RJA
RJA
1.0
62.5
50
°C/W
TL
260
°C
Drain Current
− Continuous @ TC = 25°C
− Continuous @ TC = 100°C
− Single Pulse (tp ≤ 10 s)
IDM
Total Power Dissipation @ TC = 25°C
Derate above 25°C
Total Power Dissipation @ TA = 25°C (Note 1)
Operating and Storage Temperature Range
Single Pulse Drain−to−Source Avalanche Energy − Starting T J = 25°C
(VDD = 38 Vdc, VGS = 10 Vdc, L = 1 mH, IL(pk) = 55 A, VDS = 40 Vdc)
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient
− Junction−to−Ambient (Note 1)
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
1. When surface mounted to an FR4 board using the minimum recommended pad size.
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2
Apk
NTP75N03−06, NTB75N03−06
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ.
Max
Unit
30
−
−57
−
−
Vdc
mV°C
−
−
−
−
1.0
10
−
−
±100
nAdc
1.0
−
1.6
−6
2.0
−
Vdc
mV°C
−
5.3
6.5
−
−
0.53
0.35
0.68
0.50
gFS
−
58
−
Mhos
Ciss
−
4398
5635
pF
Coss
−
1160
1894
Crss
−
317
430
td(on)
−
16
30
tr
−
130
200
td(off)
−
65
110
tf
−
105
175
QT
−
57
75
Q1
−
11
15
Q2
−
34
50
VSD
−
−
1.19
1.09
1.25
−
Vdc
trr
−
37
−
ns
ta
−
20
−
tb
−
17
−
QRR
−
0.023
−
OFF CHARACTERISTICS
Drain −Source Breakdown Voltage (Note 2)
(VGS = 0 Vdc, ID = 250 Adc)
Temperature Coefficient (Negative)
V(BR)DSS
Zero Gate Voltage Drain Current
(VDS = 30 Vdc, VGS = 0 Vdc)
(VDS = 30 Vdc, VGS = 0 Vdc, TJ = 150°C)
IDSS
Gate−Body Leakage Current (VGS = ±20 Vdc, VDS = 0 Vdc)
IGSS
Adc
ON CHARACTERISTICS (Note 2)
Gate Threshold Voltage (Note 2)
(VDS = VGS, ID = 250 Adc)
Threshold Temperature Coefficient (Negative)
VGS(th)
Static Drain−to−Source On−Resistance (Note 2)
(VGS = 10 Vdc, ID = 37.5 Adc)
RDS(on)
Static Drain−to−Source On Resistance (Note 2)
(VGS = 10 Vdc, ID = 75 Adc)
(VGS = 10 Vdc, ID = 37.5 Adc, TJ = 125°C)
VDS(on)
Forward Transconductance (Notes 2 & 4) (VDS = 3 Vdc, ID = 20 Adc)
m
Vdc
DYNAMIC CHARACTERISTICS (Note 4)
Input Capacitance
Output Capacitance
(VDS = 25 Vdc, VGS = 0,
f = 1.0 MHz)
Transfer Capacitance
SWITCHING CHARACTERISTICS (Notes 3 and 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
(VGS = 5.0 Vdc,
VDD = 20 Vdc,
Vdc ID = 75 Adc,
Adc
RG = 4.7 )) ((Note 2))
Fall Time
Gate Charge
(VGS = 5.0
5 0 Vdc,
Vdc
ID = 75 Adc,
VDS = 24 Vdc) (Note 2)
ns
nC
SOURCE−DRAIN DIODE CHARACTERISTICS
Forward On−Voltage
(IS = 75 Adc, VGS = 0 Vdc)
(IS = 75 Adc, VGS = 0 Vdc, TJ = 125°C)
(Note 2)
Reverse Recovery Time
(Note 4)
Reverse Recovery Stored
Charge (Note 4)
(IS = 75 Adc, VGS = 0 Vdc
dlS/dt = 100 A/s) (Note 2)
2. Pulse Test: Pulse Width 300 S, Duty Cycle 2%.
3. Switching characteristics are independent of operating junction temperatures.
4. From characterization test data.
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3
C
NTP75N03−06, NTB75N03−06
150
VGS = 4 V
VGS = 4.5 V
90
VGS = 5 V
VGS = 6 V
VGS = 8 V
VGS = 10 V
60
VGS = 3 V
30
TJ = 25°C
VGS = 2.5 V
0
105
90
75
60
TJ = 25°C
45
30
TJ = 100°C
15
1
1.5
2.5
3
3.5
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
VGS = 10 V
TJ = 100°C
0.0065
0.0060
TJ = 25°C
0.0055
0.0050
0.0045
TJ = −55°C
0.0040
0.0035
0.0030
10
20
30
40
50
60
70
80
90 100 120
4
0.009
TJ = 25°C
0.008
0.007
VGS = 5 V
0.006
VGS = 10 V
0.005
0.004
0
20
ID, DRAIN CURRENT (AMPS)
40
60
80
100
120
ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Drain Current and
Temperature
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1000
1.6
VGS = 0 V
VGS = 10 V
ID = 37.5 A
1.4
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO SOURCE RESISTANCE (NORMALIZED)
2
TJ = −55°C
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0.0075
0.0070
120
0
0.5
1.2 1.4 1.6 1.8 2 2.2 2.4 2.6
RDS(on), DRAIN−TO SOURCE RESISTANCE ()
RDS(on), DRAIN−TO SOURCE RESISTANCE ()
0 0.2 0.4 0.6 0.8 1
VDS ≥ 10 V
135
VGS = 3.5 V
ID, DRAIN CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
120
1.2
1
0.8
0.6
−50
TJ = 125°C
100
TJ = 100°C
10
1
−25
0
25
50
75
100
125
150
5
10
15
20
25
30
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation Temperature
Figure 6. Drain−to−Source Leakage Current vs.
Voltage
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4
NTP75N03−06, NTB75N03−06
VGS VDS
VDS = 0 V
VGS = 0 V
TJ = 25°C
C, CAPACITANCE (pF)
10000
8000
6000
Ciss
4000
Coss
2000
Crss
0
10 8 6 4 2 0 2 4 6 8 10 12 14 16 18 20 22 25
VGS, GATE−TO−SOURCE VOLTAGE (V)
10
12000
30
8
VGS
QT
Q2
Q1
4
10
2
ID = 75 A
TJ = 25°C
Q3
0
0
10
20
30
40
50
Qg, TOTAL GATE CHARGE (nC)
GATE−TO−SOURCE OR DRAIN−TO−SOURCE
VOLTAGE (VOLTS)
IS, SOURCE CURRENT (AMPS)
1000
tf
100
td(off)
td(on)
1
2.2
4.7
6.2
VDD = 15 V
VGS = 5 V
9.1
10
20
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
0.0
VGS = 0 V
TJ = 25°C
0.2
0.4
0.6
0.8
RG, GATE RESISTANCE ()
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
EAS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
t, TIME (ns)
tr
10
0
60
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
Figure 7. Capacitance Variation
TJ = 25°C
ID = 75 A
20
VDS
6
1600
ID = 75 A
1400
1200
1000
800
600
400
200
0
25
50
75
100
125
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Avalanche Energy vs.
Starting Junction Temperature
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5
150
1.0
NTP75N03−06, NTB75N03−06
PACKAGE DIMENSIONS
TO−220 THREE−LEAD
TO−220AB
CASE 221A−09
ISSUE AA
−T−
B
SEATING
PLANE
C
F
T
S
4
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
T
U
V
Z
A
Q
1 2 3
U
H
K
Z
L
R
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
J
G
D
N
INCHES
MIN
MAX
0.570
0.620
0.380
0.405
0.160
0.190
0.025
0.035
0.142
0.147
0.095
0.105
0.110
0.155
0.018
0.025
0.500
0.562
0.045
0.060
0.190
0.210
0.100
0.120
0.080
0.110
0.045
0.055
0.235
0.255
0.000
0.050
0.045
−−−
−−−
0.080
STYLE 5:
PIN 1.
2.
3.
4.
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6
GATE
DRAIN
SOURCE
DRAIN
MILLIMETERS
MIN
MAX
14.48
15.75
9.66
10.28
4.07
4.82
0.64
0.88
3.61
3.73
2.42
2.66
2.80
3.93
0.46
0.64
12.70
14.27
1.15
1.52
4.83
5.33
2.54
3.04
2.04
2.79
1.15
1.39
5.97
6.47
0.00
1.27
1.15
−−−
−−−
2.04
NTP75N03−06, NTB75N03−06
PACKAGE DIMENSIONS
D2PAK
CASE 418AA−01
ISSUE O
C
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
E
V
W
−B−
4
DIM
A
B
C
D
E
F
G
J
K
M
S
V
A
1
2
S
3
−T−
SEATING
PLANE
K
W
J
G
D
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
3 PL
0.13 (0.005)
M
T B
INCHES
MIN
MAX
0.340 0.380
0.380 0.405
0.160 0.190
0.020 0.036
0.045 0.055
0.310
−−−
0.100 BSC
0.018 0.025
0.090
0.110
0.280
−−−
0.575 0.625
0.045 0.055
M
SOLDERING FOOTPRINT*
8.38
0.33
10.66
0.42
1.016
0.04
6.096
0.24
3.05
0.12
17.02
0.67
SCALE 3:1
Figure 12. D2PAK
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7
mm inches
MILLIMETERS
MIN
MAX
8.64
9.65
9.65 10.29
4.06
4.83
0.51
0.92
1.14
1.40
7.87
−−−
2.54 BSC
0.46
0.64
2.29
2.79
7.11
−−−
14.60 15.88
1.14
1.40
NTP75N03−06, NTB75N03−06
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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8
For additional information, please contact your
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NTP75N03−06/D