MC10H179 Look−Ahead Carry Block The MC10H179 is a functional/pinout duplication of the standard MECL 10K part, with 100% improvement in propagation delay and no increase in power supply current. • Power Dissipation, 300 mW Typical • Improved Noise Margin 150 mV (Over Operating Voltage and Temperature Range) • Voltage Compensated • MECL 10K−Compatible http://onsemi.com MARKING DIAGRAMS 16 DIP PIN ASSIGNMENT CDIP−16 L SUFFIX CASE 620 VCC1 1 16 VCC2 GG 2 15 PG CN+4 3 14 P0 G0 4 13 P3 G3 5 12 P2 CN+2 6 11 CN G1 7 10 P1 VEE 8 9 G2 MC10H179L AWLYYWW 1 16 PDIP−16 P SUFFIX CASE 648 MC10H179P AWLYYWW 1 1 PLCC−20 FN SUFFIX CASE 775 Pin assignment is for Dual−in−Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D). A WL YY WW 10H179 AWLYYWW = Assembly Location = Wafer Lot = Year = Work Week ORDERING INFORMATION Device © Semiconductor Components Industries, LLC, 2000 June, 2006 − Rev. 7 1 Package Shipping MC10H179L CDIP−16 25 Units/Rail MC10H179P PDIP−16 25 Units/Rail MC10H179FN PLCC−20 46 Units/Rail Publication Order Number: MC10H179/D MC10H179 MAXIMUM RATINGS Symbol Rating Unit VEE Power Supply (VCC = 0) Characteristic −8.0 to 0 Vdc 0 to VEE Vdc 50 100 mA 0 to +75 °C −55 to +150 −55 to +165 °C °C VI Input Voltage (VCC = 0) Iout Output Current− Continuous − Surge TA Operating Temperature Range Tstg Storage Temperature Range− Plastic − Ceramic ELECTRICAL CHARACTERISTICS (VEE = −5.2 V ±5%) (See Note 1.) 0° Symbol 25° 75° Min Max Min Max Min Max Unit Power Supply Current − 79 − 72 − 79 mA IinH Input Current High Pins 5 and 9 Pins 4, 7 and 11 Pin 14 Pin 12 Pins 10 and 13 − − − − − 465 545 705 790 870 − − − − − 275 320 415 465 510 − − − − − 275 320 415 465 510 IE Characteristic μA IinL Input Current Low 0.5 − 0.5 − 0.3 − μA VOH High Output Voltage −1.02 −0.84 −0.98 −0.81 −0.92 −0.735 Vdc VOL Low Output Voltage −1.95 −1.63 −1.95 −1.63 −1.95 −1.60 Vdc VIH High Input Voltage −1.17 −0.84 −1.13 −0.81 −1.07 −0.735 Vdc VIL Low Input Voltage −1.95 −1.48 −1.95 −1.48 −1.95 −1.45 Vdc 0.4 1.4 0.4 1.5 0.5 1.7 0.6 2.3 0.7 2.4 0.8 2.6 0.5 1.7 0.5 1.8 0.5 1.9 AC PARAMETERS tpd tr Propagation Delay P to PG G, P, Cn to Cn or GG Rise Time ns ns tf Fall Time 0.5 1.7 0.5 1.8 0.5 1.9 ns 1. Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 Ifpm is maintained. Outputs are terminated through a 50−ohm resistor to −2.0 volts. http://onsemi.com 2 MC10H179 LOGIC DIAGRAM G3 5 P3 13 3 CN+4 G2 9 P2 12 2 GG CN 11 15 PG G1 7 P1 10 6 CN+2 G0 4 VCC1 VCC2 VEE P0 14 PG = GG = CN + 2 = CN + 4 = = = = PIN 1 PIN 16 PIN 8 P0 + P1 + P2 + P3 (G0 + P1 + P2 + P3) (G1 + P2 + P3) (G2 + P3) G3 (CN + P0 + P1) (G0 + P1) G1 (CN + P0 + P1 + P2 + P3) (G0 + P1 + P2 + P3) (G1 + P2 + P3) (G2 + P3) G3 TYPICAL APPLICATIONS The MC10H179 is a high−speed, low−power, standard MECL complex function that is designed to perform the look−ahead carry function. This device can be used with the MC10H181 4−bit ALU directly, or with the MC10H180 dual arithmetic unit in any computer, instrumentation or digital communication application requiring high speed arithmetic operation on long words. When used with the MC10H181, the MC10H179 performs a second order or higher look−ahead. Figure 2 shows a 16−bit look−ahead carry arithmetic unit. Second order carry is valuable for longer binary words. As an example, addition of two 32−bit words is improved from 30 nanoseconds with ripple−carry techniques. A block diagram of a 32−bit ALU is shown in Figure 1. The MC10H179 may also be used in many other applications. It can, for example, reduce system package count when used to generate functions of several variables. FIGURE 1 − 32−BIT ALU WITH CARRY LOOK−AHEAD Cin ALU Cn+4 Cn P Cn G ALU Cn ALU Cn+4 Cn P G P Cn+2 MC10H179 G ALU Cn Cn P G P Cn+4 ALU Cn+4 G Cn http://onsemi.com 3 ALU Cn ALU Cn+4 Cn P G P Cn+2 MC10H179 G Add Time = 18 ns typ ALU Cn P G Cn+4 Cout MC10H179 FIGURE 2 − 16−BIT FULL LOOK−AHEAD CARRY ARITHMETIC LOGIC UNIT B1 A1 B5 A2 A5 B2 B0 B3 A0 Cin 0 A B A B A B A B 0 0 1 1 2 2 3 3 Cn Cn + 4 M MC10H181 S0 G S1 4-BIT ARITHMETIC LOGIC UNIT S2 P S3 F0 F1 F2 F3 A9 B6 B4 A3 B13 A14 B9 A6 B8 A7 B7 A4 B10 A11 B11 A8 A B A B A B A B 0 0 1 1 2 2 3 3 Cn Cn + 4 M MC10H181 S0 G S1 4-BIT ARITHMETIC LOGIC UNIT S2 P S3 F0 F1 F2 F3 A10 A B A B A B A B 0 0 1 1 2 2 3 3 Cn Cn + 4 M MC10H181 S0 G S1 4-BIT ARITHMETIC LOGIC UNIT S2 P S3 F0 F1 F2 F3 A13 B12 A12 B14 A15 B15 A B A B A B A B 0 0 1 1 2 2 3 3 Cn Cn + 4 M MC10H181 S0 G S1 4-BIT ARITHMETIC LOGIC UNIT S2 P S3 F0 F1 F2 F3 M S0 S1 S2 S3 F0 F1 F2 F3 F4 F5 F6 F7 P0 G0 Cn F8 P1 G1 P2 G2 MC10H179 CARRY LOOK-AHEAD Cn + 4 Cn + 2 C15 http://onsemi.com 4 P3 F9 G3 G P F10 F11 F12 F13 F14 F15 MC10H179 PACKAGE DIMENSIONS PLCC−20 FN SUFFIX PLASTIC PLCC PACKAGE CASE 775−02 ISSUE C 0.007 (0.180) M T L−M B Y BRK −N− U N S 0.007 (0.180) M T L−M S S N S D −L− −M− Z W 20 D 1 G1 X V 0.010 (0.250) S T L−M S N S VIEW D−D A 0.007 (0.180) M T L−M S N S R 0.007 (0.180) M T L−M S N S H 0.007 (0.180) M T L−M S N S Z K1 K C E G J F 0.004 (0.100) −T− SEATING VIEW S G1 0.010 (0.250) S T L−M S N S 0.007 (0.180) M T L−M S VIEW S PLANE NOTES: 1. DATUMS −L−, −M−, AND −N− DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM −T−, SEATING PLANE. 3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). http://onsemi.com 5 DIM A B C E F G H J K R U V W X Y Z G1 K1 INCHES MIN MAX 0.385 0.395 0.385 0.395 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 −−− 0.025 −−− 0.350 0.356 0.350 0.356 0.042 0.048 0.042 0.048 0.042 0.056 −−− 0.020 2_ 10 _ 0.310 0.330 0.040 −−− MILLIMETERS MIN MAX 9.78 10.03 9.78 10.03 4.20 4.57 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 −−− 0.64 −−− 8.89 9.04 8.89 9.04 1.07 1.21 1.07 1.21 1.07 1.42 −−− 0.50 2_ 10 _ 7.88 8.38 1.02 −−− N S MC10H179 PACKAGE DIMENSIONS −A− 16 9 1 8 −B− CDIP−16 L SUFFIX CERAMIC DIP PACKAGE CASE 620−10 ISSUE T C −T− L DIM A B C D E F G H K L M N K N SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. M E F J G D 16 PL 0.25 (0.010) 16 PL 0.25 (0.010) M T A M −A− 9 1 8 B F S S PDIP−16 P SUFFIX PLASTIC DIP PACKAGE CASE 648−08 ISSUE R 16 T B C S H SEATING PLANE K G D M J 16 PL 0.25 (0.010) M T A MILLIMETERS MIN MAX 19.05 19.93 6.10 7.49 −−− 5.08 0.39 0.50 1.27 BSC 1.40 1.65 2.54 BSC 0.21 0.38 3.18 4.31 7.62 BSC 0_ 15 _ 0.51 1.01 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. L −T− INCHES MIN MAX 0.750 0.785 0.240 0.295 −−− 0.200 0.015 0.020 0.050 BSC 0.055 0.065 0.100 BSC 0.008 0.015 0.125 0.170 0.300 BSC 0_ 15 _ 0.020 0.040 M DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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