FAIRCHILD FQP1N60

QFET N-CHANNEL
FQP1N60
FEATURES
BVDSS = 600V
•
Advanced New Design
•
Avalanche Rugged Technology
•
Rugged Gate Oxide Technology
•
Very Low Intrinsic Capacitances
•
Excellent Switching Characteristics
•
Unrivalled Gate Charge: 5.0nC (Typ.)
•
Extended Safe Operating Area
•
Lower RDS(ON): 9.3Ω (Typ.)
RDS(ON) = 11.5Ω
ID = 1.2A
TO-220
1
2
3
1. Gate 2. Drain 3. Source
ABSOLUTE MAXIMUM RATINGS
Symbol
VDSS
ID
Characteristics
Value
Units
Drain-to-Source Voltage
600
V
Continuous Drain Current (TC = 25°C)
1.2
Continuous Drain Current (TC = 100°C)
0.76
IDM
Drain Current-Pulsed
VGS
Gate-to-Source Voltage
EAS
Single Pulsed Avalanche Energy
IAR
①
A
4.8
A
±30
V
②
50
mJ
Avalanche Current
①
1.2
A
EAR
Repetitive Avalanche Energy
①
4.0
mJ
dv/dt
Peak Diode Recovery dv/dt
③
4.5
V/ns
40
0.32
W
W/°C
PD
TJ, TSTG
TL
Total Power Dissipation (TC = 25°C)
Linear Derating Factor
Operating Junction and Storage
Temperature Range
−55 to +150
°C
Maximum Lead Temp. for Soldering
Purposes, 1/8” from case for 5-seconds
300
THERMAL RESISTANCE
Symbol
Characteristics
Typ.
Max.
RθJC
Junction-to-Case
−
3.13
RθCS
Case-to-Sink
0.5
−
RθJA
Junction-to-Ambient
−
62.5
Units
°C/W
REV. B
1
 1999 Fairchild Semiconductor Corporation
FQP1N60
QFET N-CHANNEL
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise specified)
Symbol
Characteristics
Min.
Typ.
Max.
Units
Test Conditions
BVDSS
Drain-Source Breakdown Voltage
600
−
−
V
∆BV/∆TJ
Breakdown Voltage Temp. Coeff.
−
0.4
−
V/°C
3.0
−
5.0
V
Gate-Source Leakage, Forward
−
−
100
Gate-Source Leakage, Reverse
−
−
−100
−
−
10
−
−
100
Static Drain-Source
On-State Resistance
−
9.3
11.5
Ω
VGS=10V, ID=0.6A
④
gfs
Forward Transconductance
−
0.9
−
S
VDS=50V, ID=0.6A
④
Ciss
Input Capacitance
−
120
150
Coss
Output Capacitance
−
20
25
pF
Crss
Reverse Transfer Capacitance
−
3.0
4.0
VGS=0V, VDS=25V
f=1MHz
See Fig 5
td(on)
Turn-On Delay Time
−
5
20
Rise Time
−
25
60
Turn-Off Delay Time
−
7
25
ns
VDD=300V, ID=1.2A
RG=50Ω
See Fig 13
④⑤
Fall Time
−
25
60
Qg
Total Gate Charge
−
5.0
6.0
Qgs
Gate-Source Charge
−
1.0
−
nC
Qgd
Gate-Drain (Miller) Charge
−
2.6
−
VDS=480V, VGS=10V
ID=1.2A
See Fig 6 & Fig 12 ④ ⑤
VGS(th)
IGSS
IDSS
RDS(on)
tr
td(off)
tf
Gate Threshold Voltage
Drain-to-Source Leakage Current
nA
µA
VGS=0V, ID=250µA
ID=250µA,
See Fig 7
VDS=5V, ID=250µA
VGS=30V
VGS= −30V
VDS=600V
VDS=480V, TC=125°C
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS
Symbol
IS
Characteristics
Continuous Source Current
Min.
Typ.
Max.
−
−
1.2
Test Conditions
A
Integral reverse pn-diode
in the MOSFET
ISM
Pulsed-Source Current
①
−
−
4.8
VSD
Diode Forward Voltage
④
−
−
1.4
V
TJ=25°C, IS=1.2A, VGS=0V
trr
Reverse Recovery Time
−
160
−
ns
Qrr
Reverse Recovery Charge
−
0.3
−
µC
TJ=25°C, IF=1.2A, VDD=480V
diF/dt=100A/µs
④
Notes:
① Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
② L=64mH, IAS=1.2A, VDD=50V, RG=25Ω, Starting TJ =25°C
③ ISD ≤ 1.2A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ =25°C
④ Pulse Test: Pulse Width ≤ 300µs, Duty Cycle ≤ 2%
⑤ Essentially Independent of Operating Temperature
2
Units
QFET N-CHANNEL
FQP1N60
Fig 1. Output Characteristics
Fig 2. Transfer Characteristics
VGS
15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
Bottom : 5.5 V
0
ID, Drain Current [A]
10
ID , Drain Current [A]
Top :
-1
10
0
10
150¡É
25¡É
-55¡É
¡Ø Note :
1. 250¥ìs Pulse Test
2. TC = 25¡É
-2
10
¡Ø Note
1. VDS = 50V
2. 250¥ìs Pulse Test
-1
-1
0
10
10
1
10
2
10
4
6
8
10
VGS , Gate-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Fig 3. On-Resistance vs. Drain Current
Fig 4. Source-Drain Diode Forward Voltage
RDS(ON) [¥Ø],
Drain-Source On-Resistance
25
IDR , Reverse Drain Current [A]
30
VGS = 10V
VGS = 20V
20
15
10
5
0
10
150¡É
25¡É
¡Ø Note :
1. VGS = 0V
2. 250¥ìs Pulse Test
¡Ø Note : TJ = 25¡É
0
0.0
-1
0.5
1.0
1.5
2.0
2.5
10
0.2
0.4
0.6
Fig 5. Capacitance vs. Drain-Source Voltage
1.0
1.2
1.4
1.6
Fig 6. Gate Charge vs. Gate-Source Voltage
200
12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
Coss
100
¡Ø Note ;
1. VGS = 0 V
2. f = 1 MHz
Crss
50
VDS = 120V
10
VGS , Gate-Source Voltage [V]
Ciss
150
Capacitances [pF]
0.8
VSD , Source-Drain Voltage [V]
ID, Drain Current [A]
VDS = 300V
VDS = 480V
8
6
4
2
¡Ø Note : ID = 1.2 A
0
-1
10
0
0
10
1
10
VDS, Drain-Source Voltage [V]
0
1
2
3
4
5
QG, Total Gate Charge [nC]
3
FQP1N60
QFET N-CHANNEL
Fig 7. Breakdown Voltage vs. Temperature
Fig 8. On-Resistance vs. Temperature
3.0
2.5
R DS(ON) , (Normalized)
Drain-Source On-Resistance
BV DSS , (Normalized)
Drain-Source Breakdown Voltage
1.2
1.1
1.0
¡Ø Note :
1. VGS = 0 V
2. ID = 250 ¥ìA
0.9
0.8
-100
-50
0
50
100
150
2.0
1.5
1.0
¡Ø Note :
1. VGS = 10 V
2. ID = 0.6 A
0.5
0.0
-100
200
-50
0
o
50
100
150
200
o
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Fig 9. Max. Safe Operating Area
Fig 10. Max. Drain Current vs. Case Temperature
1.2
Operation in This Area
is Limited by R DS(on)
1
10
0.9
ID, Drain Current [A]
ID, Drain Current [A]
100 µs
1 ms
0
10
10 ms
DC
-1
10
¡Ø Notes :
0.6
0.3
o
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
-2
10
0
1
10
2
10
0.0
25
3
10
10
50
75
100
[°C]
TC, Case Temperature [¡É]
VDS, Drain-Source Voltage [V]
D = 0 .5
10
0
¡Ø N o te s :
1 . Z ¥ è J C ( t ) = 3 .1 3 ¡ É / W M a x .
2 . D u t y F a c t o r , D = t 1 / t2
3 . T J M - T C = P D M * Z ¥ è J C( t )
0 .2
0 .1
0 .0 5
PDM
10
0 .0 2
-1
t1
0 .0 1
t2
s in g le p u ls e
Z
¥è JC
( t) , T h e r m a l R e s p o n s e
Fig 11. Thermal Response
10
-5
10
-4
10
-3
10
-2
10
-1
t 1 , S q u a r e W a v e P u ls e D u r a tio n [ s e c ]
4
10
0
10
1
125
150
QFET N-CHANNEL
FQP1N60
Fig 12. Gate Charge Test Circuit & Waveform
50K
12V
VGS
Same Type
as DUT
Qg
200nF
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
RL
VDS
VDS
90%
VDD
RG
( 0.5 rated VDS )
Vin
DUT
10V
10%
td(on)
tr
td(off)
t on
tf
t off
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- LL IAS2 -------------------2
BVDSS -- VDD
L
VDS
VDD
ID
BVDSS
IAS
RG
10V
ID (t)
DUT
VDS (t)
VDD
tp
Time
5
FQP1N60
QFET N-CHANNEL
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
IS
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• IS controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
IS
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
Vf
Body Diode
Forward Voltage Drop
6
VDD
QFET N-CHANNEL
FQP1N60
TO-220 Package Dimensions
TO-220 (FS PKG CODE AE)
4.50 ±0.20
2.80 ±0.10
(3.00)
+0.10
1.30 –0.05
18.95MAX.
(3.70)
ø3.60 ±0.10
15.90 ±0.20
1.30 ±0.10
(8.70)
(1.46)
9.20 ±0.20
(1.70)
9.90 ±0.20
1.52 ±0.10
0.80 ±0.10
2.54TYP
[2.54 ±0.20]
10.08 ±0.30
(1.00)
13.08 ±0.20
)
(45°
1.27 ±0.10
+0.10
0.50 –0.05
2.40 ±0.20
2.54TYP
[2.54 ±0.20]
10.00 ±0.20
Dimensions in Millimeters
September 1999, Rev B
7
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ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED
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CORPORATION
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failure to perform when properly used in accordance with
instructions for use provided in the labeling, can be
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner
without notice.
Preliminary
First Production
This datasheet contains preliminary data, and supplementary
data will be published at a later data.
Fairchild Semiconductor reserves the right to make changes
at any time without notice in order to improve design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at any time
without notice in order to improve design.
Obsolete
Not In Production
The datasheet contains specifications on a product that has
been discontinued by Fairchild Semiconductor.
The datasheet is printed for reference information only.