SEMICONDUCTOR TECHNICAL DATA The MC10E/100E150 contains six D-type latches with differential outputs. When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent and input data transitions propagate through to the output. A logic HIGH on either LEN1 or LEN2 (or both) latches the data. The Master Reset (MR) overrides all other controls to set the Q outputs low. • 800ps Max. Propagation Delay • Extended 100E VEE Range of – 4.2V to – 5.46V • 75kΩ Input Pulldown Resistors 6-BIT D LATCH LOGIC DIAGRAM D0 Q0 D Q0 R D1 Q1 D Q1 R D2 Q2 D Q2 R D3 Q3 D R D4 FN SUFFIX PLASTIC PACKAGE CASE 776-02 Q3 Q4 D Pinout: 28-Lead PLCC (Top View) Q4 R MR 25 D5 D R LEN1 LEN2 LEN2 LEN1 24 23 NC VCCO Q5 Q5 22 21 20 19 Q5 D5 26 18 Q4 Q5 D4 27 17 Q4 D3 28 16 VCC VEE 1 15 Q3 D2 2 14 Q3 D1 3 13 Q2 D0 4 12 Q2 MR PIN NAMES Pin D0 – D5 LEN1, LEN2 MR Q0 – Q5 Q0 – Q5 Function Data Inputs Latch Enables Master Reset True Outputs Inverting Outputs 5 6 7 8 9 10 11 NC VCCO Q0 Q0 Q1 Q1 VCCO * All VCC and VCCO pins are tied together on the die. 12/93 Motorola, Inc. 1996 2–1 REV 2 MC10E150 MC100E150 DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND) 0°C Symbol IIH IEE Characteristic min typ 25°C max min typ 85°C max min typ max Unit Condition µA Input HIGH Current D LEN, MR 200 150 Power Supply Current 10E 100E 200 150 200 150 mA 52 52 62 62 52 52 62 62 52 60 62 72 AC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND) 0°C Symbol Characteristic 25°C 85°C min typ max min typ max min typ max 550 700 750 250 375 450 375 500 625 550 700 750 250 375 450 375 500 625 550 700 750 tPLH tPHL Propagation Delay to Output D LEN MR 250 375 450 375 500 625 ts Setup Time D 200 50 200 50 200 50 Hold Time D 200 – 50 200 – 50 200 – 50 tRR Reset Recovery Time 750 650 750 650 750 650 tPW Minimum Pulse Width MR 400 th tSKEW Within-Device Skew tr tf Rise/Fall Times 20 - 80% Unit Condition ps ps ps ps ps ps 400 50 400 50 50 ps 1 ps 300 450 650 300 450 650 300 450 650 1. Within-device skew is defined as identical transitions on similar paths through a device. MOTOROLA 2–2 ECLinPS and ECLinPS Lite DL140 — Rev 4 MC10E150 MC100E150 OUTLINE DIMENSIONS FN SUFFIX PLASTIC PLCC PACKAGE CASE 776–02 ISSUE D 0.007 (0.180) B Y BRK -N- T L –M M U 0.007 (0.180) X G1 M S N T L –M S S N S D Z -L- -M- D W 28 V 1 C A 0.007 (0.180) M R 0.007 (0.180) M T L –M S T L –M S N S N S H S N S 0.007 (0.180) M T L –M N S S 0.004 (0.100) G J -T- K SEATING PLANE F VIEW S G1 T L –M S N 0.007 (0.180) M T L –M S N S VIEW S S NOTES: 1. DATUMS -L-, -M-, AND -N- DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIM G1, TRUE POSITION TO BE MEASURED AT DATUM -T-, SEATING PLANE. 3. DIM R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). ECLinPS and ECLinPS Lite DL140 — Rev 4 T L –M K1 E S S VIEW D-D Z 0.010 (0.250) 0.010 (0.250) 2–3 DIM A B C E F G H J K R U V W X Y Z G1 K1 INCHES MIN MAX 0.485 0.495 0.485 0.495 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 — 0.025 — 0.450 0.456 0.450 0.456 0.042 0.048 0.042 0.048 0.042 0.056 — 0.020 2° 10° 0.410 0.430 0.040 — MILLIMETERS MIN MAX 12.32 12.57 12.32 12.57 4.20 4.57 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 — 0.64 — 11.43 11.58 11.43 11.58 1.07 1.21 1.07 1.21 1.07 1.42 — 0.50 2° 10° 10.42 10.92 1.02 — MOTOROLA MC10E150 MC100E150 Motorola reserves the right to make changes without further notice to any products herein. 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