MOTOROLA MJW16110

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by MJ16110/D
SEMICONDUCTOR TECHNICAL DATA
 *Motorola Preferred Device
SWITCHMODE Bridge Series
. . . specifically designed for use in half bridge and full bridge off line converters.
•
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•
•
•
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Excellent Dynamic Saturation Characteristics
Rugged RBSOA Capability
Collector–Emitter Sustaining Voltage — VCEO(sus) — 400 V
Collector–Emitter Breakdown — V(BR)CES — 650 V
State–of–Art Bipolar Power Transistor Design
Fast Inductive Switching:
tfi = 25 ns (Typ) @ 100_C
tc = 50 ns (Typ) @ 100_C
tsv = 1 µs (Typ) @ 100_C
• Ultrafast FBSOA Specified
• 100_C Performance Specified for:
RBSOA
Inductive Load Switching
Saturation Voltages
Leakages
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POWER TRANSISTORS
15 AMPERES
400 VOLTS
175 AND 135 WATTS
MAXIMUM RATINGS
Rating
Symbol
MJ16110
MJW16110
Unit
Collector–Emitter Sustaining Voltage
VCEO(sus)
400
Vdc
Collector–Emitter Breakdown Voltage
VCES
650
Vdc
Emitter–Base Voltage
VEBO
6
Vdc
Collector Current — Continuous
— Pulsed (1)
IC
ICM
15
20
Adc
Base Current — Continuous
— Pulsed (1)
IB
IBM
10
15
Adc
Total Power Dissipation
@ TC = 25_C
@ TC = 100_C
Derated above 25_C
PD
Operating and Storage Temperature
175
100
1
135
54
1.09
Watts
TJ, Tstg
– 65 to 200
– 55 to 150
_C
RθJC
1
0.92
_C/W
CASE 1–07
TO–204AA
(FORMERLY TO–3)
MJ16110
W/_C
THERMAL CHARACTERISTICS
Thermal Resistance —
Junction to Case
Maximum Lead Temperature for
Soldering Purposes 1/8″ from Case
for 5 Seconds
(1) Pulse Test: Pulse Width = 5 ms, Duty Cycle
TL
275
_C
CASE 340F–03
TO–247AE
MJW16110
10%.
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Preferred devices are Motorola recommended choices for future use and best overall value.
Designer’s and SWITCHMODE are trademarks of Motorola Inc.
REV 1
 Motorola, Inc. 1995
Motorola Bipolar Power Transistor Device Data
1
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ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
VCEO(sus)
400
—
—
Vdc
—
—
—
—
100
1000
OFF CHARACTERISTICS (1)
Collector–Emitter Sustaining Voltage (Table 1) (IC = 20 mAdc, IB = 0)
µAdc
Collector Cutoff Current
(VCE = 650 Vdc, VBE(off) = 1.5 V)
(VCE = 650 Vdc, VBE(off) = 1.5 V, TC = 100_C)
ICEV
Collector Cutoff Current (VCE = 650 Vdc, RBE = 50 Ω, TC = 100_C)
ICER
—
—
1000
µAdc
Emitter–Base Leakage (VEB = 6 Vdc, IC = 0)
IEBO
—
—
10
µAdc
—
—
—
—
0.3
0.7
0.3
0.4
0.9
2.0
1.0
1.5
—
—
1.2
1.2
1.5
1.5
6
12
20
—
See Figures 11, 12, and 13
V
Cob
—
—
400
pF
tsv
—
700
1500
ns
tc
—
45
150
tfi
—
20
75
tsv
—
1000
2000
tc
—
50
200
tfi
—
25
125
td
—
15
—
tr
—
330
—
ts
—
800
—
tf
—
110
—
ts
—
500
—
tf
—
250
—
ON CHARACTERISTICS (1)
Collector–Emitter Saturation Voltage
(IC = 5 Adc, IB = 0.5 Adc)
(IC = 10 Adc, IB = 1.2 Adc)
(IC = 10 Adc, IB = 2 Adc)
(IC = 10 Adc, IB = 2 Adc, TC = 100_C)
VCE(sat)
Base–Emitter Saturation Voltage
(IC = 10 Adc, IB = 2 Adc)
(IC = 10 Adc, IB = 2 Adc, TC = 100_C)
VBE(sat)
DC Current Gain (IC = 15 Adc, VCE = 5 Vdc)
hFE
Vdc
Vdc
DYNAMIC CHARACTERISTICS
Dynamic Saturation
VCE(dsat)
Output Capacitance (VCE = 10 Vdc, IE = 0, ftest = 1 kHz)
SWITCHING CHARACTERISTICS
Inductive Load (Table 1)
Storage
TJ = 25_C
Crossover
Fall Time
Storage
IC = 10 A, IB1= 1 A,
VBE(off) = 5 V,
VCE(pk) = 250 V
TJ = 100_C
Crossover
Fall Time
Resistive Load (Table 2)
Delay Time
Rise Time
Storage Time
Fall Time
IB2 = 2 A,
RB2 = 4 Ω
IC = 10 A, IB1 = 1 A,
VCC = 250 V,
PW = 30 µs,
Duty Cycle = 2%
ns
ā
Storage Time
VBE(off) = 5 V
Fall Time
(1) Pulse Test: Pulse Width = 300 µs, Duty Cycle
2
2%.
Motorola Bipolar Power Transistor Device Data
30
TJ = 100°C
20
TJ = 25°C
10
VCE , COLLECTOR–EMITTER SATURATION
VOLTAGE (VOLTS)
hFE, DC CURRENT GAIN
TYPICAL STATIC CHARACTERISTICS
TJ = – 55°C
5
3
VCE = 5 V
2
0.2
0.3
0.5
3
1
2
5
IC, COLLECTOR CURRENT (AMPS)
10
3
2
1
0.7
0.5
0.3
0.2
TJ = 100°C
TJ = 25°C
0.07
0.05
IC/IB = 5
0.03
0.15 0.2 0.3
20
0.5 0.7 1
2
3
5
IC, COLLECTOR CURRENT (AMPS)
7
10
15
Figure 2. Collector–Emitter Saturation Voltage
3
VBE, BASE–EMITTER VOLTAGE (VOLTS)
VCE , COLLECTOR–EMITTER VOLTAGE (VOLTS)
IC/IB = 10
0.1
Figure 1. DC Current Gain
10
7
5
TJ = 100°C
TJ = 25°C
TJ = 25°C
2
10 A
15 A
1
0.7
0.5
5A
0.2
7A
IC = 3 A
0.1
0.1
0.2
0.5 0.7
1
2
5
7
IC/IB = 5 & 10
2
1.5
1
TJ = 25°C
0.7
0.5
TJ = 100°C
0.3
0.15 0.2
10
0.3
0.5 0.7
1
2
3
5
7
15
10
IB, BASE CURRENT (AMPS)
IC, COLLECTOR CURRENT (AMPS)
Figure 3. Collector–Emitter Saturation Region
Figure 4. Base–Emitter Saturation Region
C, CAPACITANCE (pF)
10K
5K
3K
2K
Cib
1K
500
300
200
100
Cob
50
30
20
10
0.1
TJ = 25°C
ftest = 1 kHz
0.3 0.5 1 3 5
10
30 50 100
300 600 1K
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
Figure 5. Capacitance
Motorola Bipolar Power Transistor Device Data
3
TYPICAL INDUCTIVE SWITCHING CHARACTERISTICS
IC/IB = 10, TC = 100°C, VCE(pk) = 250 V
1K
700
500
10K
7K
t c , CROSSOVER TIME (ns)
t sv, STORAGE TIME (ns)
5K
VBE(off) = 0 V
3K
2K
IB2 = 2 (IB1)
VBE(off) = 2 V
1K
700
500
VBE(off) = 5 V
300
300
VBE(off) = 0 V
200
IB2 = 2 (IB1)
VBE(off) = 5 V
100
70
50
VBE(off) = 2 V
30
20
100
1.5
3
5
10
7
10
1.5
15
2
3
5
7
IC, COLLECTOR CURRENT (AMPS)
IC, COLLECTOR CURRENT (AMPS)
Figure 6. Storage Time
Figure 7. Crossover Time
t fi , COLLECTOR CURRENT FALL TIME (ns)
2
10
15
1K
700
500
200
VBE(off) = 0 V
100
70
50
IB2 = 2 (IB1)
VBE(off) = 2 V
30
20
VBE(off) = 5 V
10
1.5
2
3
5
7
10
15
IC, COLLECTOR CURRENT (AMPS)
Figure 8. Fall Time
VCE(pk)
90% VCE(pk)
IC
tsv
90% IC(pk)
trv
tfi
tti
tc
VCE
IB
10% VCE(pk)
90% IB1
10%
IC(pk) 2% IC
t, TIME
Figure 9. Inductive Switching Measurements
4
I B2 , REVERSE BASE CURRENT (AMPS)
10
IC(pk)
9
8
7
6
IB1 = 2 A
5
1A
4
3
IC = 10 A
TC = 25°C
2
1
0
0
1
2
3
4
VBE(off), REVERSE BASE VOLTAGE (VOLTS)
Figure 10. Peak Reverse Base Current
Motorola Bipolar Power Transistor Device Data
5
Table 1. Inductive Load Switching
Drive Circuit
VCEO(sus)
L = 10 mH
RB2 = ∞
VCC = 20 Volts
IC(pk) = 20 mA
+15
1 µF
150 Ω
100 µF
100 Ω
MTP8P10
MTP8P10
A
+10
MPF930
RB2
50 Ω
MUR105
MJE210
1 µF
150 Ω
Voff
*Tektronix AM503
*P6302 or Equivalent
Scope — Tektronix
7403 or Equivalent
t1
VCE
IB1
IB
RBSOA
L = 200 µH
RB2 = 0
VCC = 20 Volts
RB1 selected for desired IB1
MTP12N10
500 µF
VCE(pk)
Inductive Switching
L = 200 µH
RB2 = 0
VCC = 20 Volts
RB1 selected for desired IB1
RB1
MPF930
IC(pk)
IC
IB2
*IC
A
(ICpk)
[ LcoilVCC
T1
T1 adjusted to obtain IC(pk)
Note: Adjust Voff to obtain desired VBE(off) at Point A.
L
T.U.T.
1N4246GP
+V
*IB
Vclamp
0V
VCC
–V
Table 2. Resistive Load Switching
+15
td and tr
H.P. 214
OR
EQUIV.
P.G.
1 µF
ts and tf
150 Ω
100 µF
100 Ω
V(off) adjusted
to give specified
off drive
T.U.T.
RB = 8.5 Ω
RL
50
RB1
MPF930
A
+10 V
MPF930
VCC
RB2
50 Ω
≈ 11 V
0V
tr ≤ 15 ns
VCC
250 Vdc
RL
25 Ω
IC
10 A
IB
1A
*Tektronix AM503
*P6302 or Equivalent
VCE
VCC
250 V
IC
10 A
IB1
1.0 A
IB2
Per Spec
RB1
15 Ω
RB2
Per Spec
RL
25 Ω
VCE(dsat) = DYNAMIC SATURATION VOLTAGE AND IS
MEASURED FROM THE 90% POINT OF IB1 (t = 0)
TO A MEASUREMENT POINT ON THE
TIME AXIS (t1, t2 or t3 etc.)
90% IB1
IB1
0
MUR105
MTP12N10
MJE210
500 µF
1 µF
150 Ω
Voff
T.U.T.
A
*IC
*IB
RL
VCC
VCE , COLLECTOR–EMITTER VOLTAGE (VOLTS)
Vin
0
MTP8P10
MTP8P10
*IC
*IB
t1
t2
t3
t4
t, TIME
t5
t6
t7
Figure 11. Definition of Dynamic Saturation
Measurement
Motorola Bipolar Power Transistor Device Data
t8
16
14
t = 1 µs
IC = 10 A
12
t = 2 µs
10
8
6
4
2
0
MAXIMUM
TYPICAL
0.5
1
1.5
IB, BASE CURRENT (AMPS)
2
2.5
Figure 12. Dynamic Saturation Voltage
5
DYNAMIC SATURATION VOLTAGE
For bipolar power transistors low DC saturation voltages
are achieved by conductivity modulating the collector region.
Since conductivity modulation takes a finite amount of time,
DC saturation voltages are not achieved instantly at turn–on.
In bridge circuits, two transistor forward converters, and two
transistor flyback converters dynamic saturation characteristics are responsible for the bulk of dynamic losses. The
MJ16110 has been designed specifically to minimize these
losses. Performance is roughly four times better than the
original version of MJ16010.
From a measurement point of view, dynamic saturation
voltage is defined as collector–emitter voltage at a specific
point in time after IB1 has been applied, where t = 0 is the
90% point on the IB1 rise time waveform, This definition is illustrated in Figure 11. Performance data was taken in the circuit that is shown in Figure 13. The 24 volt rail allows a
Tektronix 2445 or equivalent scope to operate at 1 volt per
division without input amplifier saturation.
Dynamic saturation performance is illustrated in Figure 12.
The MJ16110 reaches DC saturation levels in approximately
2 µs, provided that sufficient base drive is provided. The dependence of dynamic saturation voltage upon base drive
suggests a spike of IB1 at turn–on to minimize dynamic saturation losses, and also avoid overdrive at turn–off. However,
in order to simulate worst case conditions the guaranteed dynamic saturation limits in this data sheet are specified with a
constant level of IB1.
+ 24
Q1 MJ11012
1N5314
1k
4
100
µF
8
1N4111
7
1k
10 k
U1
MC1455
6
100 pF
(OSCILLATOR) 3
2
1 5
0.1 µF
2.4 Ω
20 W
100 Ω
1W
Q4
IRFD9120
4
10 µF
IC
47 Ω
1W
8
MUR405
1.8 k
IRFD9123
500 Ω
7
10 k
1N5831
2.4 mH
Q5
MTM8P08
0.01 µF
1N914
0.01 µF
Q2
6
2
IB
V CE
MUR405
Q6
MTP25N06
3
1
Q3
IRFD113
5
0.01 µF
0.01 µF
Figure 13. Dynamic Saturation Test Circuit
GUARANTEED SAFE OPERATING AREA INFORMATION
20
IC, COLLECTOR CURRENT (AMPS)
20
10
5
3
2
1
0.5
0.3
0.2
0.1
0.05
0.03
0.02
0.01
10 µs
MJ16110
MJW16110
REGION II —
EXPANDED FBSOA USING
MUR870 ULTRA-FAST
RECTIFIER, SEE FIGURE 16
IC, COLLECTOR CURRENT (AMPS)
TC = 25°C
50
1 ms
100
ns
dc
II
BONDING WIRE LIMIT
THERMAL LIMIT
SECONDARY BREAKDOWN
LIMIT
1
18
16
IC/IB1 = 5
TJ ≤ 100°C
14
12
10
8
VBE(off) = 1 to 5 V
6
4
2
2 3 5
10
20 30 50 100 200 300 500 1000
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
0
VBE(off) = 0 V
0
200
400
600
100
300
500
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
Figure 15. Reverse Bias Safe Operating Area
Figure 14. Forward Bias Safe Operating Area
VCE (650 V MAX)
+15
150 Ω
1 µF
100 Ω
100 µF
10 µF
MTP8P10
MTP8P10
RB1
10 mH
MUR870
MUR1100
MPF930
MUR105
+10
T.U.T.
MPF930
RB2
MUR105
50 Ω
MTP12N10
MJE210
500 µF
150 Ω
1 µF
Note: Test Circuit for Ultra–fast FBSOA
Note: RB2 = 0 and VOff = – 5 Volts
VOff
Figure 16. Switching Safe Operating Area
6
Motorola Bipolar Power Transistor Device Data
700
POWER DERATING FACTOR (%)
100
SECOND BREAKDOWN
DERATING
80
60
THERMAL
DERATING
40
MJ16110
MJW16110
20
0
0
40
80
120
TC, CASE TEMPERATURE (°C)
160
200
r(t), EFFECTIVE TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
Figure 17. Power Derating
1
0.7
0.5
D = 0.5
0.3
0.2
0.2
0.1
0.07
0.05
0.1
P(pk)
RθJC(t) = r(t) RθJC
RθJC = 1 or 0.92°CW
TJ(pk) – TC = P(pk) RθJC(t)
0.03
0.03
0.02
t1
0.02
SINGLE PULSE
0.01
0.01
0.02 0.03
0.05
0.1
t2
DUTY CYCLE, D = t1/t2
0.2 0.3
1
0.5
2 3
5
t, TIME (ms)
10
20
30
50
100
200 300
500
1000
Figure 18. Thermal Response
SAFE OPERATING AREA INFORMATION
FORWARD BIAS
There are two limitations on the power handling ability of a
transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC – VCE limits of
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
The data in Figure 14 is based on TC = 25_C; T J(pk) is
variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be derated
when TC ≥ 25_C. Second breakdown limitations do not derate the same as thermal limitations. Allowable current at the
voltages shown on Figure 14 may be found at any case temperature by using the appropriate curve on Figure 17.
T J(pk) may be calculated from the data in Figure 18. At
high case temperatures, thermal limitations will reduce the
power that can be handled to values less than the limitations
imposed by second breakdown.
REVERSE BIAS
For inductive loads, high voltage and high current must be
sustained simultaneously during turn–off, in most cases, with
the base–to–emitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be
Motorola Bipolar Power Transistor Device Data
accomplished by several means such as active clamping,
RC snubbing, load line shaping, etc. The safe level for these
devices is specified as Reverse Biased Safe Operating Area
and represents the voltage–current condition allowable during reverse biased turn–off. This rating is verified under
clamped conditions so that the device is never subjected to
an avalanche mode. Figure 15 gives the RBSOA characteristics.
SWITCHMODE DESIGN CONSIDERATIONS
FBSOA
Allowable dc power dissipation in bipolar power transistors
decreases dramatically with increasing collector–emitter
voltage. A transistor which safely dissipates 100 watts at
10 volts will typically dissipate less than 10 watts at its rated
V (BR)CEO(sus). From a power handling point of view, current
and voltage are not interchangeable (see Application Note
AN875).
TURN–ON
Safe turn–on load line excursions are bounded by pulsed
FBSOA curves. The 10 µs curve applies for resistive loads,
most capacitive loads, and inductive loads that are clamped
by standard or fast recovery rectifiers. Similarly, the 100 ns
curve applies to inductive loads which are clamped by ultra–
fast recovery rectifiers, and are valid for turn–on crossover
times less than 100 ns (AN952).
7
SWITCHMODE DESIGN CONSIDERATIONS (Cont.)
At voltages above 75% of V (BR)CEO(sus), it is essential
to provide the transistor with an adequate amount of base
drive VERY RAPIDLY at turn–on. More specifically, safe operation according to the curves is dependent upon base current rise time being less than collector current rise time. As a
general rule, a base drive compliance voltage in excess of
10 volts is required to meet this condition (see Application
Note AN875).
TURN–OFF
A bipolar transistor’s ability to withstand turn–off stress is
dependent upon its forward base drive. Gross overdrive violates the RBSOA curve and risks transistor failure. For this
reason, circuits which use fixed base drive are more likely to
fail at light loads due to heavy overdrive (see Application
Note AN875).
Therefore, it is important to design the driver so that its output is negative in the absence of anything but a clean crisp
input signal (see Application Note AN952).
RBSOA
Reversed Biased Safe Operating Area has a first order
dependency on circuit configuration and drive parameters.
The RBSOA curves in this data sheet are valid only for the
conditions specified. For a comparison of RBSOA results in
several types of circuits (see Application Note AN951).
DESIGN SAMPLES
Transistor parameters tend to vary much more from wafer
lot to wafer lot, over long periods of time, than from one device to the next in the same wafer lot. For design evaluation
it is advisable to use transistors from several different date
codes.
OPERATION ABOVE V(BR)CEO(sus)
When bipolars are operated above collector–emitter
breakdown, base drive is crucial. A rapid application of adequate forward base current is needed for safe turn–on, as is
a stiff negative bias needed for safe turn–off. Any hiccup in
the base–drive circuitry that even momentarily violates either
of these conditions will likely cause the transistor to fail.
8
BAKER CLAMPS
Many unanticipated pitfalls can be avoided by using Baker
Clamps. MUR105 and MUR170 diodes are recommended
for base drives less than 1 amp. Similarly, MUR405 and
MUR470 types are well–suited for higher drive requirements
(see Article Reprint AR131).
Motorola Bipolar Power Transistor Device Data
PACKAGE DIMENSIONS
A
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. ALL RULES AND NOTES ASSOCIATED WITH
REFERENCED TO–204AA OUTLINE SHALL APPLY.
C
SEATING
PLANE
–T–
E
D
K
2 PL
0.13 (0.005)
U
M
Y
M
DIM
A
B
C
D
E
G
H
K
L
N
Q
U
V
–Y–
L
V
T Q
M
2
H
G
B
M
T Y
1
–Q–
0.13 (0.005)
M
INCHES
MIN
MAX
1.550 REF
–––
1.050
0.250
0.335
0.038
0.043
0.055
0.070
0.430 BSC
0.215 BSC
0.440
0.480
0.665 BSC
–––
0.830
0.151
0.165
1.187 BSC
0.131
0.188
MILLIMETERS
MIN
MAX
39.37 REF
–––
26.67
6.35
8.51
0.97
1.09
1.40
1.77
10.92 BSC
5.46 BSC
11.18
12.19
16.89 BSC
–––
21.08
3.84
4.19
30.15 BSC
3.33
4.77
STYLE 1:
PIN 1. BASE
2. EMITTER
CASE: COLLECTOR
CASE 1–07
TO–204AA
(FORMERLY TO–3)
ISSUE Z
0.25 (0.010)
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
–T–
–Q–
T B M
E
–B–
C
4
U
A
R
1
K
2
3
–Y–
P
F
V
D
0.25 (0.010)
M
L
Y Q
S
H
J
DIM
A
B
C
D
E
F
G
H
J
K
L
P
Q
R
U
V
MILLIMETERS
MIN
MAX
20.40
20.90
15.44
15.95
4.70
5.21
1.09
1.30
1.50
1.63
1.80
2.18
5.45 BSC
2.56
2.87
0.48
0.68
15.57
16.08
7.26
7.50
3.10
3.38
3.50
3.70
3.30
3.80
5.30 BSC
3.05
3.40
STYLE 3:
PIN 1.
2.
3.
4.
G
INCHES
MIN
MAX
0.803
0.823
0.608
0.628
0.185
0.205
0.043
0.051
0.059
0.064
0.071
0.086
0.215 BSC
0.101
0.113
0.019
0.027
0.613
0.633
0.286
0.295
0.122
0.133
0.138
0.145
0.130
0.150
0.209 BSC
0.120
0.134
BASE
COLLECTOR
EMITTER
COLLECTOR
CASE 340F–03
TO–247AE
ISSUE E
Motorola Bipolar Power Transistor Device Data
9
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10
◊
Motorola Bipolar Power Transistor Device Data
*MJ16110/D*
MJ16110/D