ONSEMI MC10198

SEMICONDUCTOR TECHNICAL DATA
The MC10198 is a retriggerable monostable multivibrator. Two enable inputs
permit triggering on any combination of positive or negative edges as shown in
the accompanying table. The trigger input is buffered by Schmitt triggers
making it insensitive to input rise and fall times.
The pulse width is controlled by an external capacitor and resistor. The
resistor sets a current which is the linear discharge rate of the capacitor. Also,
the pulse width can be controlled by an external current source or voltage (see
applications information).
For high–speed response with minimum delay, a hi–speed input is also
provided. This input bypasses the internal Schmitt triggers and the output
responds within 2 nanoseconds typically.
Output logic and threshold levels are standard MECL 10,000. Test
conditions are per Table 2. Each “Precondition” referred to in Table 2 is per the
sequence of Table 1.
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
PD = 415 mW typ/pkg (No Load)
tpd = 4.0 ns typ Trigger Inpt to Q
2.0 ns typ Hi–Speed Input to Q
Min Timing Pulse Width
Max Timing Pulse Width
Min Trigger Pulse Width
Min Hi–Speed
Trigger Pulse Width
Enable Setup Time
Enable Hold Time
PWQmin
PWQmax
PWT
PWHS
10 ns typ1
>10 ms typ2
2.0 ns typ
3.0 ns typ
tset
thold
1.0 ns typ
1.0 ns typ
DIP
PIN ASSIGNMENT
1 CExt = 0 (Pin 4 open), RExt = 0
(Pin 6 to VEE)
2 CExt = 10 µF, RExt = 2.7 kΩ
5
7
10
TRIGGER
INPUT
15
HI–SPEED
INPUT
Q
2
15
HIGH–SPEED
INPUT
Q
3
14
N/C
CEXT
4
13
TRIGGER INPUT
EPOS
5
12
N/C
REXT
6
11
N/C
7
10
ENEG
VEE
8
9
N/C
4
CEXT
Q
3
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
Q
2
TRUTH TABLE
INPUT
EPos ENeg
L
L
H
L
L
H
H
H
OUTPUT
Triggers on both positive & negative input slopes
Triggers on positive input slope
Triggers on negative input slope
Trigger is disabled
3/93
 Motorola, Inc. 1996
VCC2
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
EXTERNAL PULSE
WIDTH CONTROL
ENEG
13
16
VCC
6
REXT
E pos
1
EXT.PULSE
WIDTH CONTROL
LOGIC DIAGRAM
VEE
VCC1
3–172
REV 5
MC10198
TABLE 1 — PRECONDITION SEQUENCE
1. At t = 0
w 10 ns
Apply VIHmax to Pin 5 and 10.
Apply VILmin to Pin 15.
Ground Pin 4.
2. At t
a.) Open Pin 1.
b.) Apply –3.0 Vdc to Pin 4.
Hold these conditions for
10 ns.
3. Return Pin 4 to Ground and perform test as
indicated in Table 2.
w 10 ns
w
Pin 4 Voltage (Vdc)
0(Gnd)
a.)
b.)
c.)
10 ns
w
–1.0
–2.0
–3.0
Pin 1
open
–4.0
–5.0
10
0
30
20
t(ns)
TABLE 2 — CONDITIONS FOR TESTING OUTPUT LEVELS
(See Table 1 for Precondition Sequence)
VIH max
VIHA max
VILA max
VIL min
P1
VIL min
P3
VIL min
P2
Pins 1, 16 = VCC = Ground
Pins 6, 8 = VEE = –5.2 Vdc
Outputs loaded 50 Ω to –2.0 Vdc
Pin Conditions
Test
P.U.T.
Precondition
VOH
2
VOH
3
Precondition
VOL
3
VOL
2
Precondition
VOHA 2
VOHA 3
Precondition
VOHA 2
VOHA 3
Precondition
VOHA 2
VOHA 3
Precondition
VOHA 2
VOHA 3
Precondition
VOHA 2
VOHA 3
MECL Data
DL122 — Rev 6
5
10
13
Pin Conditions
15
VIL min
P1
VIL min
P1
VILA max
VIHA min
VIL min
P3
P2
P3
VIH max
VIH max
P2
P3
VIH max
VIH max
P1
P1
Test
P.U.T.
Precondition
VOHA 2
VOHA 3
Precondition
VOLA 3
VOLA 2
Precondition
VOLA 2
VOLA 3
Precondition
VOLA 3
VOLA 2
Precondition
VOLA 3
VOLA 2
Precondition
VOLA 3
VOLA 2
Precondition
VOLA 3
VOLA 2
3–173
5
10
13
VIHA min
VILA max
P1
P1
15
VILA max
VIHA min
VIL min
VIL min
P2
P3
VIH max
VIH max
P2
P3
VIHA min
VILA max
VIH max
VIH max
P1
P1
VIH max
VIH max
VIHA min
VILA max
P1
P1
MOTOROLA
MC10198
ELECTRICAL CHARACTERISTICS
Test Limits
Characteristic
Power Supply Drain Current
Input Current
Symbol
Pin
Pi
Under
Test
IE
8
110
IinH
5, 10
13
15
415
350
560
IinL
5
0.5
–30°C
Min
+25°C
Max
Min
+85°C
Max
Unit
100
110
mAdc
260
220
350
260
220
350
µAdc
Typ
Max
80
0.5
Min
µAdc
0.3
Output Voltage
Logic 1
VOH
2
3
–1.060
–1.060
–0.890
–0.890
–0.960
–0.960
–0.810
–0.810
–0.890
–0.890
–0.700
–0.700
Vdc
Output Voltage
Logic 0
VOL
2
3
–1.890
–1.890
–1.675
–1.675
–1.850
–1.850
–1.650
–1.650
–1.825
–1.825
–1.615
–1.615
Vdc
Threshold Voltage
Logic 1
VOHA
2
3
–1.080
–1.080
Threshold Voltage
Logic 0
VOLA
2
3
tT+Q+
tT–Q+
3
3
2.5
2.5
6.5
6.5
2.5
2.5
4.0
4.0
5.5
5.5
High Speed Trigger Input
tHS+Q+
3
1.5
3.2
1.5
2.0
2.8
Minimum Timing Pulse Width
PWQmin
3
10.0
ns
Maximum Timing Pulse Width
PWQmax
3
>10
ms
PWT
3
2.0
ns
PWHS
3
3.0
ns
Switching Times
–0.980
–0.980
–0.910
–0.910
–1.655
–1.655
–1.630
–1.630
Vdc
–1.595
–1.595
Vdc
2.5
2.5
6.5
6.5
ns
1.5
3.2
ns
(50Ω Load)
Trigger Input
Min Trigger Pulse Width
Min Hi–Spd Trig Pulse Width
Rise Time
(20 to 80%)
3
1.5
4.0
1.5
3.5
1.5
4.0
ns
Fall Time
(20 to 80%)
3
1.5
4.0
1.5
3.5
1.5
4.0
ns
Enable Setup Time
tsetup (E)
3
Enable Hold Time
thold (E)
3
1. The monostable is in the timing mode at the time of this test.
2. CEXT = 0 (Pin 4 Open); REXT = 0 (Pin 6 tied to VEE).
3. CEXT = 10µF (Pin); REXT = 2.7k (Pin 6).
1.0
ns
1.0
ns
VIHmax
4.
P1
MOTOROLA
VILmin
3–174
MECL Data
DL122 — Rev 6
MC10198
ELECTRICAL CHARACTERISTICS (continued)
TEST VOLTAGE VALUES (Volts)
Characteristic
Power Supply Drain Current
Input Current
Output Voltage
Logic 1
Output Voltage
Logic 0
Threshold Voltage
Logic 1
Threshold Voltage
Logic 0
Switching Times
@ Test Temperature
VIHmax
VILmin
VIHAmin
VILAmax
VEE
–30°C
–0.890
–1.890
–1.205
–1.500
–5.2
+25°C
–0.810
–1.850
–1.105
–1.475
–5.2
+85°C
–0.700
–1.825
–1.035
–1.440
–5.2
Symbol
Pin
Under
Test
IE
8
IinH
5, 10
13
15
IinL
5
VOH
2
3
VOL
VOHA
VOLA
2
3
3
3
High Speed Trigger Input
tHS+Q+
3
Minimum Timing Pulse Width
PWQmin
3
Maximum Timing Pulse Width
PWQmax
3
PWT
3
PWHS
3
Minimum Hi–Spd Trigger Pulse Width
Rise Time
(20 to 80%)
Fall Time
(20 to 80%)
Enable Setup Time
VEE
(VCC)
Gnd
6, 8
1, 4, 16
6, 8
6, 8
6, 8
1, 4, 16
1, 4, 16
1, 4, 16
5
6, 8
1, 4, 16
13
6, 8
6, 8
1, 4, 16
1, 4, 16
6, 8
6, 8
1, 4, 16
1, 4, 16
6, 8
6, 8
1, 16, 4
1, 16, 4
15
6, 8
6, 8
1, 16, 4
1, 16, 4
VILmin
VIHAmin
VILAmax
5,10
13
15
13 (4.)
13 (4.)
13
15
15
2
3
tT+Q+
tT–Q+
Minimum Trigger Pulse Width
VIHmax
2
3
(50Ω Load)
Trigger Input
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
15
+1.11V
Pulse In
Pulse Out
–3.2 V
+2.0 V
10
5
13
13
3
3
6, 8
6, 8
1, 16, 4
1, 16, 4
3
6, 8
1, 16, 4
Note 2.
6, 8
1, 16, 4
Note 3.
6, 8
1, 16, 4
13
3
6, 8
1, 16, 4
15
3
6, 8
1, 16, 4
6, 8
1, 16, 4
15
3
3
tsetup (E)
3
Enable Hold Time
thold (E)
3
1. The monostable is in the timing mode at the time of this test.
2. CEXT = 0 (Pin 4 Open); REXT = 0 (Pin 6 tied to VEE).
3. CEXT = 10µF (Pin); REXT = 2.7k (Pin 6).
6, 8
1, 16, 4
5
3
6, 8
1, 16, 4
5
3
6, 8
1, 16, 4
VIHmax
4.
P1
VILmin
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.
Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the
same manner.
MECL Data
DL122 — Rev 6
3–175
MOTOROLA
MC10198
SWITCHING TIME TEST CIRCUIT AND WAVEFORMS @ 25°C
VCC1 = VCC2 = +2.0 Vdc
Vin
25 µF
Vout
0.1 µF
Coax
Coax
5
7
Input
TPin
10
Pulse Generator
+1.11 V
13
0.1 µF
15
EPos
External Pulse
Width Control
Q
3
ENeg
TPout
Trigger Input
Hi–Speed Input
Input Pulse
t+ = t– = 2.0 ± 0.2 ns
(20 to 80%)
6
RExt
Q
2
4
CExt
50–ohm termination to ground located
in each scope channel input.
0.1 µF
All input and output cables to the scope
are equal lengths of 50–ohm coaxial
cable. Wire length should be < 1/4 inch
from TPin to input pin and TPout to
output pin.
Unused outputs are tied to a
50–ohm resistor to ground.
VEE = –3.2 Vdc
50%
EPos
tsetup (E)
Trigger Input
50%
tT+Q+
Q
PWT
tT–Q+
50%
tHold(E)
50%
PWQ
High–Speed
Trigger Input
tHS+Q+
PWHS
Q
PWQ
MOTOROLA
3–176
MECL Data
DL122 — Rev 6
MC10198
APPLICATIONS INFORMATION
Circuit Operation:
Figure 2 shows typical curves for pulse width
versus CExt and RExt (total resistance includes RInt).
Any low leakage capacitor can be used and RExt can
vary from 0 to 16 k–ohms.
1.PULSE WIDTH TIMING — The pulse width is determined by the external resistor and capacitor. The
MC10198 also has an internal resistor (nominally 284
ohms) that can be used in series with RExt. Pin 7, the
external pulse width control, is a constant voltage node
(–3.60 V nominally). A resistance connected in series
from this node to VEE sets a constant timing current IT.
This current determines the discharge rate of the capacitor:
∆V
IT = CExt
∆T
2.TRIGGERING —The Epos and ENeg inputs control the
trigger input. The MC10198 can be programmed to trigger on the positive edge, negative edge, or both. Also,
the trigger input can be totally disabled. The truth table
is shown on the first page of the data sheet.
The device is totally retriggerable. However, as
duty cycle approaches 100%, pulse width jitter can
occur due to the recovery time of the circuit. Recovery
time is basically dependent on capacitance CExt.
Figure 3 shows typical recovery time versus capacitance at IT = 5 mA.
where
∆T = pulse width
∆V = 1.9 V change in capacitor voltage
Then:
FIGURE 2 – TIMING PULSE WIDTH versus CExt and RExt
1.9 V
∆T = CExt
IT
If RExt + RInt are in series to VEE:
IT = [(–3.60 V) – (–5.2 V)] ÷ [RExt + 284 Ω]
IT = 1.6 V/(RExt + 284)
The timing equation becomes:
∆T = [(CExt)(1.9 V)] ÷ [1.6 V/(RExt + 284)]
∆T = CExt (RExt + 284) 1.19
PULSE WIDTH ( µ s)
100
10
10 kΩ
3 kΩ
1
500 Ω
100
where ∆T = Sec
RExt = Ohms
CExt = Farads
10
10 pF
FIGURE 1 —
RExt = 0
100 pF
NOTE: TOTAL RESISTANCE
= RExt + RInt
1000 pF
0.01 µF
CExt – TIMING CAPACITANCE
0.1 µF
FIGURE 3 — RECOVERY TIME versus CExt @ IT = 5 mA
10 µs
4
MC10198
7
RInt
284 Ω
6
–3.60 V External
Pulse Width Control
RECOVERY TIME
CExt
1 µs
100 ns
10 ns
RExt
1 ns
10 pF
VEE = –5.2 V
MECL Data
DL122 — Rev 6
3–177
100 pF
0.01 µF
1000 pF
CExt – TIMING CAPACITANCE
0.1 µF
MOTOROLA
MC10198
FIGURE 5 — PULSE WIDTH versus IT @ CExt = 13 pF
1000
PULSE WIDTH (ns)
3.HI–SPEED INPUT — This input is used for stretching
very narrow pulses with minimum delay between the
output pulse and the trigger pulse. The trigger input
should be disabled when using the high–speed input.
The MC10198 triggers on the rising edge, using this input, and input pulse width should narrow, typically less
than 10 nanoseconds.
USAGE RULES:
1.Capacitor lead lengths should be kept very short to minimize ringing due to fast recovery rise times.
2.The E inputs should not be tied to ground to establish a
high logic level. A resistor divider or diode can be used
to establish a –0.7 to –0.9 voltage level.
3.For optimum temperature stability; 0.5 mA is the best timing current IT. The device is designed to have a constant
voltage at the EXTERNAL PULSE WIDTH CONTROL
over temperature at this current value.
4.Pulse Width modulation can be attained with the EXTERNAL PULSE WIDTH CONTROL. The timing current can
be altered to vary the pulse width. Two schemes are:
a. The internal resistor is not used. A dependent current source is used to set the timing current as
shown in Figure 4. A graph of pulse width versus
timing current (CExt = 13 pF) is shown in Figure 5.
100
10
0.01 mA
0.1 mA
1 mA
b. A control voltage can also be used to vary the
pulse width using an additional resistor (Figure 6).
The current (IT + IC) is set by the voltage drop
across RInt + RExt. The control current IC modifies
IT and alters the pulse width. Current IC should
never force IT to zero. RC typically 1 kΩ.
FIGURE 6 —
FIGURE 4 —
4
4
10 mA
IT – TIMING CURRENT
CExt
CExt
IT
7
IC
MC10198
–3.6
V
284
RC
Control
Voltage
7
6
I
IT + IC
RExt
–5.2 V
MOTOROLA
3–178
MECL Data
DL122 — Rev 6
MC10198
5.The MC10198 can be made non–retriggerable. The Q
output is fed back to disable the trigger input during the
triggered state (Logic Diagram). Figure 7 shows a positive triggered configuration; a similar configuration can
be made for negative triggering.
FIGURE 7 —
VEE
VCC
RExt
CExt
6
4
Q
E Pos
External Pulse
Width Control
–0.9 V
ENeg
Trigger
Input
Hi–Speed
Input
MECL Data
DL122 — Rev 6
Q
3–179
MOTOROLA
MC10198
OUTLINE DIMENSIONS
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 775–02
ISSUE C
0.007 (0.180) M T L–M
B
Y BRK
–N–
U
N
S
0.007 (0.180) M T L–M
S
S
N
S
D
–L–
–M–
Z
W
20
D
1
V
0.010 (0.250)
G1
X
S
T L–M
N
S
S
VIEW D–D
A
0.007 (0.180) M T L–M
S
N
S
R
0.007 (0.180) M T L–M
S
N
S
Z
C
H
–T–
SEATING
PLANE
F
VIEW S
G1
0.010 (0.250) S T L–M
S
0.007 (0.180)
M
T L–M
S
N
S
VIEW S
S
N
S
NOTES:
1. DATUMS –L–, –M–, AND –N– DETERMINED
WHERE TOP OF LEAD SHOULDER EXITS PLASTIC
BODY AT MOLD PARTING LINE.
2. DIMENSION G1, TRUE POSITION TO BE
MEASURED AT DATUM –T–, SEATING PLANE.
3. DIMENSIONS R AND U DO NOT INCLUDE MOLD
FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250)
PER SIDE.
4. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
5. CONTROLLING DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMALLER THAN THE
PACKAGE BOTTOM BY UP TO 0.012 (0.300).
DIMENSIONS R AND U ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS,
GATE BURRS AND INTERLEAD FLASH, BUT
INCLUDING ANY MISMATCH BETWEEN THE TOP
AND BOTTOM OF THE PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE GREATER THAN 0.037 (0.940).
THE DAMBAR INTRUSION(S) SHALL NOT CAUSE
THE H DIMENSION TO BE SMALLER THAN 0.025
(0.635).
MOTOROLA
N
K
0.004 (0.100)
J
S
K1
E
G
0.007 (0.180) M T L–M
3–180
DIM
A
B
C
E
F
G
H
J
K
R
U
V
W
X
Y
Z
G1
K1
INCHES
MIN
MAX
0.385
0.395
0.385
0.395
0.165
0.180
0.090
0.110
0.013
0.019
0.050 BSC
0.026
0.032
0.020
–––
0.025
–––
0.350
0.356
0.350
0.356
0.042
0.048
0.042
0.048
0.042
0.056
–––
0.020
2_
10 _
0.310
0.330
0.040
–––
MILLIMETERS
MIN
MAX
9.78
10.03
9.78
10.03
4.20
4.57
2.29
2.79
0.33
0.48
1.27 BSC
0.66
0.81
0.51
–––
0.64
–––
8.89
9.04
8.89
9.04
1.07
1.21
1.07
1.21
1.07
1.42
–––
0.50
2_
10 _
7.88
8.38
1.02
–––
MECL Data
DL122 — Rev 6
MC10198
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
ISSUE V
–A–
16
9
1
8
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
–B–
C
L
DIM
A
B
C
D
E
F
G
H
K
L
M
N
–T–
K
N
SEATING
PLANE
M
E
F
J
G
D
16 PL
0.25 (0.010)
16 PL
0.25 (0.010)
M
T A
T B
M
–A–
9
1
8
B
F
C
L
S
–T–
SEATING
PLANE
K
H
G
D
M
J
16 PL
0.25 (0.010)
M
MILLIMETERS
MIN
MAX
19.05
19.93
6.10
7.49
–––
5.08
0.39
0.50
1.27 BSC
1.40
1.65
2.54 BSC
0.21
0.38
3.18
4.31
7.62 BSC
0_
15 _
0.51
1.01
S
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
16
S
INCHES
MIN
MAX
0.750
0.785
0.240
0.295
–––
0.200
0.015
0.020
0.050 BSC
0.055
0.065
0.100 BSC
0.008
0.015
0.125
0.170
0.300 BSC
0_
15 _
0.020
0.040
T A
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
DIM
A
B
C
D
F
G
H
J
K
L
M
S
INCHES
MIN
MAX
0.740
0.770
0.250
0.270
0.145
0.175
0.015
0.021
0.040
0.70
0.100 BSC
0.050 BSC
0.008
0.015
0.110
0.130
0.295
0.305
0_
10 _
0.020
0.040
MILLIMETERS
MIN
MAX
18.80
19.55
6.35
6.85
3.69
4.44
0.39
0.53
1.02
1.77
2.54 BSC
1.27 BSC
0.21
0.38
2.80
3.30
7.50
7.74
0_
10 _
0.51
1.01
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution;
P.O. Box 5405, Denver, Colorado 80217. 303–675–2140 or 1–800–441–2447
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,
3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 81–3–3521–8315
Mfax: [email protected] – TOUCHTONE 602–244–6609
INTERNET: http://Design–NET.com
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
◊
MECL Data
DL122 — Rev 6
3–181
*MC10198/D*
MC10198/D
MOTOROLA