VISHAY SIHFP26N60L-E3

IRFP26N60L, SiHFP26N60L
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Superfast Body Diode Eliminates the Need for
External Diodes in ZVS Applications
600
RDS(on) (Ω)
VGS = 10 V
0.21
Qg (Max.) (nC)
180
Qgs (nC)
61
Qgd (nC)
Requirements
• Enhanced dV/dt Capabilities Offer Improved Ruggedness
85
Configuration
Available
RoHS*
• Lower Gate Charge Results in Simpler Drive COMPLIANT
Single
• Higher Gate Voltage Threshold Offers Improved Noise
Immunity
D
• Lead (Pb)-free Available
TO-247
APPLICATIONS
G
• Zero Voltage Switching (SMPS)
• Telecom and Server Power Supplies
S
D
• Uninterruptible Power Suplies
S
G
• Motor Control Applications
N-Channel MOSFET
ORDERING INFORMATION
Package
TO-247
IRFP26N60LPbF
Lead (Pb)-free
SiHFP26N60L-E3
IRFP26N60L
SnPb
SiHFP26N60L
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
600
Gate-Source Voltage
VGS
± 30
Continuous Drain Current
VGS at 10 V
TC = 25 °C
TC = 100 °C
Pulsed Drain Currenta
ID
UNIT
V
26
17
A
IDM
100
3.8
W/°C
Single Pulse Avalanche Energyb
EAS
570
mJ
Repetitive Avalanche Currenta
IAR
26
A
Repetitive Avalanche Energya
EAR
47
mJ
Linear Derating Factor
Maximum Power Dissipation
TC = 25 °C
Peak Diode Recovery dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Mounting Torque
for 10 s
6-32 or M3 screw
PD
470
W
dV/dt
21
V/ns
TJ, Tstg
- 55 to + 150
300d
°C
10
lbf · in
1.1
N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting TJ = 25 °C, L = 1.7 mH, RG = 25 Ω, IAS = 26 A, dV/dt = 21 V/ns (see fig. 12).
c. ISD ≤ 26 A, dI/dt ≤ 480 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91218
S-81264-Rev. B, 21-Jul-08
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IRFP26N60L, SiHFP26N60L
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
40
Case-to-Sink, Flat, Greased Surface
RthCS
0.24
-
Maximum Junction-to-Case (Drain)
RthJC
-
0.27
UNIT
°C/W
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
VGS = 0 V, ID = 250 µA
600
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.33
-
V/°C
VGS(th)
VDS = VGS, ID = 250 µA
3.0
-
5.0
V
Gate-Source Leakage
IGSS
VGS = ± 30 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 600 V, VGS = 0 V
-
-
50
µA
VDS = 480 V, VGS = 0 V, TJ = 125 °C
-
-
2.0
mA
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
-
0.21
0.25
Ω
gfs
VDS = 50 V, ID = 16 A
13
-
-
S
Input Capacitance
Ciss
5020
-
Coss
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
-
Output Capacitance
-
450
-
-
34
-
-
230
-
-
170
-
-
-
180
-
-
61
-
-
85
-
31
-
-
110
-
-
47
-
-
42
-
-
-
26
-
-
100
Drain-Source On-State Resistance
RDS(on)
Forward Transconductance
ID = 16 Ab
VGS = 10 V
Dynamic
Reverse Transfer Capacitance
Crss
Effective Output Capacitance
Coss eff.
Effective Output Capacitance
(Energy Related)
Coss eff. (ER)
Total Gate Charge
Gate-Source Charge
Qgs
Qgd
Turn-On Delay Time
td(on)
Rise Time
Fall Time
VDS = 0 V to 480 Vc
VGS = 10 V
ID = 26 A, VDS = 480 V,
see fig. 7 and 15b
Qg
Gate-Drain Charge
Turn-Off Delay Time
VGS = 0 V
tr
td(off)
VDD = 300 V, ID = 26 A,
RG = 4.3 Ω,VGS = 10 V
see fig. 11a and 11bb
tf
pF
nC
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Currenta
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Reverse Recovery Current
Forward Turn-On Time
IRRM
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
S
TJ = 25 °C, IS = 26 A, VGS = 0 Vb
-
-
1.5
TJ = 25 °C, IF = 26 A
-
170
250
TJ = 125 °C, dI/dt = 100 A/µsb
-
210
320
TJ = 25 °C, IF = 26 A, VGS = 0 Vb
-
670
1000
-
1050
1570
-
7.3
11
TJ = 125 °C, dI/dt = 100
TJ = 25 °C
A/µsb
V
ns
nC
A
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS.
Coss eff. (ER) is a fixed capacitance that stores the same energy as Coss while VDS is rising from 0 to 80 % VDS.
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Document Number: 91218
S-81264-Rev. B, 21-Jul-08
IRFP26N60L, SiHFP26N60L
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
ID, Drain-to-Source Current (A)
Top
100
Bottom
1000.00
VGS
15 V
12 V
10 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
ID, Drain-to-Source Current (A)
1000
10
1
5.5 V
0.1
100.00
TJ = 150 °C
10.00
TJ = 25 °C
1.00
20 μs PULSE WIDTH
TJ = 25 °C
0.10
2.0
0.01
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
RDS(on), Drain-to-Source On Resistance (Normalized)
VGS
15 V
12 V
10 V
8.0 V
7.0 V
6.5 V
6.0 V
Bottom 5.5 V
ID, Drain-to-Source Current (A)
5.5 V
1
20 μs PULSE WIDTH
TJ = 150 °C
0.1
0.1
1
10
VDS, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
Document Number: 91218
S-81264-Rev. B, 21-Jul-08
6.0
8.0
10.0
14.0
12.0
16.0
Fig. 3 - Typical Transfer Characteristics
Top
10
4.0
VGS, Gate-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
100
VDS = 50 V
20 μs PULSE WIDTH
100
3.0
ID = 26 A
VGS = 10 V
2.5
2.0
1.5
1.0
0.5
- 60 - 40 - 20 0 20 40 60 80 100 120 140 160
TJ, Junction Temperature
Fig. 4 - Normalized On-Resistance vs. Temperature
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IRFP26N60L, SiHFP26N60L
Vishay Siliconix
12.0
VGS = 0 V,
Ciss = Cgs + Cgd, Cds
Crss = Cgd
Coss = Cds + Cgd
10000
C, Capacitance (pF)
ID = 26 A
f = 1 MHz
SHORTED
VGS, Gate-to-Source Voltage (V)
1000000
Ciss
1000
Coss
100
VDS = 480 V
VDS = 300 V
10.0
VDS = 120 V
8.0
6.0
4.0
2.0
Crss
10
1
0.0
1000
100
10
0
25
VDS, Drain-to-Source Voltage (V)
125
150
Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
1000.00
30
ISD, Reverse Drain Current (A)
25
20
Energy (μJ)
100
50
75
QG, Total Gate Charge (nC)
15
10
100.00
TJ = 150 °C
10.00
TJ = 25 °C
1.00
5
VGS = 0 V
0.10
0
0
100
200
300
400
500
600
700
VDS, Drain-to-Source Voltage (V)
Fig. 6 - Typical Output Capacitance Stored Energy vs.VDS
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0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
VSD, Source-to-Drain Voltage (V)
Fig. 8 - Typical Source-Drain Diode Forward Voltage
Document Number: 91218
S-81264-Rev. B, 21-Jul-08
IRFP26N60L, SiHFP26N60L
Vishay Siliconix
1000
30
OPERATING IN THIS AREA LIMITED
BY RDS(on)
25
ID, Drain Current (A)
ID, Drain Current (A)
100
100 μsec
10
20
15
10
1 msec
1
5
TC = 25 °C
TJ = 150 °C
Single Pulse
0.1
10 msec
0
1
10
1000
100
10000
50
25
Fig. 9a - Maximum Safe Operating Area
125
100
150
Fig. 10 - Maximum Drain Current vs. Case Temperature
RD
VDS
75
TC, Case Temperature (°C)
VDS, Drain-to-Source Voltage (V)
VDS
90 %
VGS
D.U.T.
RG
+
- VDD
10 %
VGS
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
td(on)
Fig. 11a - Switching Time Test Circuit
tr
td(off) tf
Fig. 11b - Switching Time Waveforms
Thermal Response (ZthJC)
1
0.1
D = 0.50
0.20
0.10
0.05
0.01
0.02
0.01
PDM
t1
SINGLE PULSE
(THERMAL RESPONSE)
0.001
t2
Notes:
1. Duty factor D = t1/ t2
2. Peak TJ = PDM x ZthJC + TC
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
Fig. 12 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Document Number: 91218
S-81264-Rev. B, 21-Jul-08
www.vishay.com
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IRFP26N60L, SiHFP26N60L
Vishay Siliconix
1050
EAS, Single Pulse Avalanche Energy (mJ)
VGS(th), Gate threshold Voltage (V)
6.0
5.0
4.0
ID = 250 μA
3.0
2.0
TOP
900
BOTTOM
ID
12 A
16 A
26 A
750
600
450
300
150
0
-75
-50
50
-25
0
75
25
TJ, Temperature (°C)
125
100
150
50
25
75
Fig. 13 - Threshold Voltage vs. Temperature
tp
QGD
VG
+
A
- VDD
IAS
20 V
QGS
Driver
D.U.T
RG
150
QG
VGS V
L
125
Fig. 14c - Maximum Avalanche Energy vs. Drain Current
15 V
VDS
100
Starting TJ, Junction Temperature (°C)
Charge
0.01 Ω
Fig. 14a - Unclamped Inductive Test Circuit
Fig. 15a - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
VDS
50 kΩ
tp
12 V
0.2 µF
0.3 µF
+
D.U.T.
-
VDS
VGS
IAS
3 mA
IG
ID
Current sampling resistors
Fig. 14b - Unclamped Inductive Waveforms
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Fig. 15b - Gate Charge Test Circuit
Document Number: 91218
S-81264-Rev. B, 21-Jul-08
IRFP26N60L, SiHFP26N60L
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
•
•
•
•
RG
dV/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - device under test
Driver gate drive
P.W.
+
Period
D=
+
-
VDD
P.W.
Period
VGS = 10 V*
D.U.T. ISD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Body diode
VDD
forward drop
Inductor current
Ripple ≤ 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 16 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?91218.
Document Number: 91218
S-81264-Rev. B, 21-Jul-08
www.vishay.com
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Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
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information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
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Document Number: 91000
Revision: 18-Jul-08
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