IRFP23N50L, SiHFP23N50L Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • Superfast Body Diode Eliminates the Need for External Diodes in ZVS Applications 500 RDS(on) (Ω) VGS = 10 V 0.190 Qg (Max.) (nC) 150 Qgs (nC) 44 Qgd (nC) 72 Configuration • Lower Gate Charge Results in Simpler Drive Requirements Available RoHS* COMPLIANT • Enhanced dV/dt Capabilities Offer Improved Ruggedness • Higher Gate Voltage Threshold Offers Improved Noise Immunity Single D • Lead (Pb)-free Available TO-247 APPLICATIONS • Zero Voltage Switching SMPS G • Telecom and Server Power Supplies • Uninterruptible Power Supplies S • Motor Control Applications D S G N-Channel MOSFET ORDERING INFORMATION Package TO-247 IRFP23N50LPbF Lead (Pb)-free SiHFP23N50L-E3 IRFP23N50L SnPb SiHFP23N50L ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Drain-Source Voltage SYMBOL VDS LIMIT 500 Gate-Source Voltage VGS ± 30 Continuous Drain Current VGS at 10 V TC = 25 °C TC = 100 °C Pulsed Drain Currenta ID UNIT V 23 15 A IDM 92 2.9 W/°C Single Pulse Avalanche Energyb EAS 410 mJ Repetitive Avalanche Currenta IAR 23 A Repetitive Avalanche Energya EAR 37 mJ PD 370 W dV/dt 14 V/ns TJ, Tstg - 55 to + 150 Linear Derating Factor Maximum Power Dissipation TC = 25 °C Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque for 10 s 6-32 or M3 screw 300d °C 10 lbf · in 1.1 N·m Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 °C, L = 1.5 mH, RG = 25 Ω, IAS = 23 A (see fig. 12). c. ISD ≤ 23 A, dI/dt ≤ 430 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91209 S-81352-Rev. A, 16-Jun-08 www.vishay.com 1 IRFP23N50L, SiHFP23N50L Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient Case-to-Sink, Flat, Greased Surface Maximum Junction-to-Case (Drain) SYMBOL RthJA RthCS RthJC TYP. 0.24 - MAX. 40 0.34 UNIT °C/W SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT V V/°C Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage VDS VGS = 0 V, ID = 250 µA 500 - - ΔVDS/TJ Reference to 25 °C, ID = 1 mAd - 0.27 - VGS(th) VDS = VGS, ID = 250 µA 3.0 - 5.0 V Gate-Source Leakage IGSS VGS = ± 30 V - - ± 100 nA Zero Gate Voltage Drain Current IDSS VDS = 500 V, VGS = 0 V - - 50 µA VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 2.0 mA Drain-Source On-State Resistance RDS(on) Forward Transconductance gfs - 0.190 0.235 Ω VDS = 50 V, ID = 14 Ab 12 - - S ID = 14 Ab VGS = 10 V Dynamic Input Capacitance Ciss VGS = 0 V, - 3600 - Output Capacitance Coss VDS = 25 V, - 380 - Crss f = 1.0 MHz, see fig. 5 Reverse Transfer Capacitance Output Capacitance Coss Effective Output Capacitance Coss eff. Effective Output Capacitance (Energy Related) Coss eff. (ER) Internal Gate Resistance RG Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Turn-On Delay Time td(on) Rise Time Turn-Off Delay Time Fall Time tr VGS = 0 V - 37 - VDS = 1.0 V , f = 1.0 MHz - 4800 - VDS = 400 V , f = 1.0 MHz - 100 - VDS = 0 V to 400 Vc - 220 - VDS = 0 V to 400 Vd - 160 - - 1.2 - f = 1 MHz, open drain VGS = 10 V ID = 23 A, VDS = 400 V see fig. 6 and 13b VDD = 250 V, ID = 23 A - - 150 - - 44 - - - 26 72 - - 94 - td(off) RG = 6.0, VGS = 10 V - 53 - tf see fig. 10b - 45 - - - 23 S - - 92 TJ = 25 °C, IS = 14 A, VGS = 0 Vb - - 1.5 - 170 250 - 220 330 - 560 840 - 980 1500 - 7.6 11 pF Ω nC ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Currenta ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time trr Qrr IRRM ton MOSFET symbol showing the integral reverse p - n junction diode D A G TJ = 25 °C TJ = 125 °C TJ = 25 °C IF = 23 A, dI/dt = 100 A/µsb TJ =1 25 °C TJ = 25 °C V ns µC A Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising fom 0 to 80 % VDS. d. Coss eff. (ER) is a fixed capacitance that stores the same energy time as Coss while VDS is rising fom 0 to 80 % VDS. www.vishay.com 2 Document Number: 91209 S-81352-Rev. A, 16-Jun-08 IRFP23N50L, SiHFP23N50L Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 100 1000.00 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 10 ID, Drain-to Source Current (A) ID, Drain-to-Source Current (A) TOP 1 0.1 4.5 V 0.01 TJ = 25 °C 100.00 TJ = 150 °C 10.00 20 µs PULSE WIDTH 20µs PULSE WIDTH Tj = 25 °C 0.001 TJ = 150°C 1.00 0.1 1 10 100 1.0 6.0 VDS, Drain-to-Source Voltage (V) Fig. 1 - Typical Output Characteristics 100 3.0 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V RDS(ON), Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current (A) 16.0 Fig. 3 - Typical Transfer Characteristics ID = 23 A TOP 10 11.0 VGS, Gate-to-Source Voltage (V) 1 4,5 V 20µs PULSE WIDTH Tj = 150 °C 2.5 2.0 1.5 1.0 0.5 VGS = 10 V 0.1 0.0 1 10 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics Document Number: 91209 S-81352-Rev. A, 16-Jun-08 100 -60 -40 -20 0 20 40 60 TJ, Junction Temperature 80 100 120 140 160 (°C) Fig. 4 - Normalized On-Resistance vs. Temperature www.vishay.com 3 IRFP23N50L, SiHFP23N50L Vishay Siliconix 12 f = 1 MHZ VGS = 0 V, Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd 10000 VGS, Gate-to-Source Voltage (V) C, Capacitance (pF) 100000 Ciss 1000 Coss 100 ID = 23 VDS = 400 V VDS = 250 V VDS = 100 V 10 7 5 2 Crss 10 0 1 10 100 0 1000 24 120 96 QG, Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage 25 ISD, Reverse Drain Current (A) 100.00 20 Energy (µJ) 72 48 15 10 5 TJ = 150 °C 10.00 TJ = 25 °C 1.00 VGS = 0 V 0 0.10 0 100 200 300 400 500 600 0.0 1.5 1.0 0.5 2.0 VSD, Source-to-Drain Voltage (V) VDS , Drain-to-Source Voltage (V) Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 8 - Typical Source-Drain Diode Forward Voltage 25 1000 OPERATION IN THIS AREA LIMITED BY RDS(ON) ID, Drain Current (A) ID, Drain Current (A) 20 100 10us 100us 10 15 10 1ms 5 1 TC = 25 °C TJ = 150 °C Single Pulse 10 10ms 0 100 1000 10000 VDS, Drain-to-Source Voltage (V) Fig. 9 - Maximum Safe Operating Area www.vishay.com 4 25 50 75 100 TC, Case Temperature 125 150 (°C) Fig. 10 - Maximum Drain Current vs. Case Temperature Document Number: 91209 S-81352-Rev. A, 16-Jun-08 IRFP23N50L, SiHFP23N50L Vishay Siliconix RD VDS VDS 90 % VGS D.U.T. RG + - VDD 10 % VGS 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % td(on) Fig. 11a - Switching Time Test Circuit td(off) tf tr Fig. 11b - Switching Time Waveforms (Z thJC) 10 1 Thermal Response D = 0.50 0.1 0.20 0.10 PDM 0.05 0.01 0.02 0.01 t1 SINGLE PULSE (THERMAL RESPONSE) t2 Notes: 1. Duty factor D = t1 / t2 2. PeakT J = P DM x Z thJC + T C 0.001 0.00001 0.0001 0.001 0.01 0.1 1 t1, Rectangular Pulse Duration (sec) Fig. 12 - Maximum Effective Transient Thermal Impedance, Junction-to-Case 750 4.5 4.0 ID = 250 µA 3.5 3.0 2.5 2.0 1.5 1.0 EAS, Single Pulse Avalanche Energy (mJ) VGS(th) Gate Threshold Voltage (V) 5.0 ID 10A 15A BOTTOM 23A TOP 600 450 300 150 0 - 75 - 50 - 25 0 25 50 75 100 125 150 TJ, Temperature (°C) Fig. 13 - Threshold Voltage vs. Temperature Document Number: 91209 S-81352-Rev. A, 16-Jun-08 25 50 75 100 Starting T , Junction Temperature 150 125 (°C) Fig. 14 - Maximum Avalanche Energy s. Drain Current www.vishay.com 5 IRFP23N50L, SiHFP23N50L Vishay Siliconix VDS tp 15 V L VDS Driver D.U.T RG + - VDD IAS 20 V tp A IAS 0.01Ω Fig. 15a - Unclamped Inductive Test Circuit Fig. 15b - Unclamped Inductive Waveforms Current regulator Same type as D.U.T. 50 kΩ 12 V QG 10 V 0.2 µF 0.3 µF QGS + D.U.T. - VDS QGD VG VGS 3 mA Charge IG ID Current sampling resistors Fig. 16a - Gate Charge Test Circuit www.vishay.com 6 Fig. 16b - Basic Gate Charge Waveform Document Number: 91209 S-81352-Rev. A, 16-Jun-08 IRFP23N50L, SiHFP23N50L Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - • • • • RG dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive P.W. + Period D= + - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current dI/dt D.U.T. VDS Waveform Diode Recovery dV/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig. 17 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91209. Document Number: 91209 S-81352-Rev. A, 16-Jun-08 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1