IRFR420A, IRFU420A, SiHFR420A, Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • Low Gate Charge Qg Results in Simple Drive Requirement 500 RDS(on) (Ω) VGS = 10 V 3.0 Qg (Max.) (nC) 17 Qgs (nC) 4.3 Qgd (nC) 8.5 Configuration • Improved Gate, Avalanche and Dynamic dV/dt Ruggedness COMPLIANT • Fully Characterized Capacitance and Avalanche Voltage and Current Single • Effective Coss Specified D DPAK (TO-252) Available RoHS* • Lead (Pb)-free Available IPAK (TO-251) APPLICATIONS • Switch Mode Power Supply (SMPS) G • Uninterruptible Power Supply • High Speed Power Switching S N-Channel MOSFET ORDERING INFORMATION Package Lead (Pb)-free SnPb DPAK (TO-252) DPAK (TO-252) IRFR420APbF IRFR420ATRPbFa DPAK (TO-252) IPAK (TO-251) IRFR420ATRLPbF IRFU420APbF SiHFR420A-E3 SiHFR420AT-E3a SiHFR420ATL-E3 SiHFU420A-E3 IRFR420A - - IRFU420A SiHFR420A - - SiHFU420A Note a. See device orientation. ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 500 Gate-Source Voltage VGS ± 30 Continuous Drain Current VGS at 10 V TC = 25 °C ID TC = 100 °C Pulsed Drain Currenta IDM Linear Derating Factor UNIT V 3.3 2.1 A 10 0.67 W/°C Single Pulse Avalanche Energyb EAS 140 mJ Repetitive Avalanche Currenta IAR 2.5 A EAR 5.0 mJ PD 83 W dV/dt 3.4 V/ns TJ, Tstg - 55 to + 150 Repetitive Avalanche Energya TC = 25 °C Maximum Power Dissipation Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) for 10 s 300d °C Notes a. b. c. d. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). Starting TJ = 25 °C, L = 45 mH, RG = 25 Ω, IAS = 2.5 A (see fig. 12). ISD ≤ 2.5 A, dI/dt ≤ 270 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91274 S-Pending-Rev. A, 21-Jul-08 WORK-IN-PROGRESS www.vishay.com 1 IRFR420A, IRFU420A, SiHFR420A, Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 62 Case-to-Sink, Flat, Greased Surface RthCS 0.50 - Maximum Junction-to-Case (Drain) RthJC - 1.5 UNIT °C/W SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VGS = 0 V, ID = 250 µA 500 - - V ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.60 - V/°C VGS(th) VDS = VGS, ID = 250 µA 2.0 - 4.5 V nA Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance IGSS IDSS RDS(on) gfs VGS = ± 30 V - - ± 100 VDS = 500 V, VGS = 0 V - - 25 VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 250 - - 3.0 Ω VDS = 50 V, ID = 1.5 A 1.4 - - S VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 - 340 - - 53 - - 2.7 - VDS = 1.0 V, f = 1.0 MHz - 490 - VDS = 400 V, f = 1.0 MHz - 15 - - 28 - - - 17 ID = 1.5 Ab VGS = 10 V µA Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Output Capacitance Coss Effective Output Capacitance VGS = 0 V Coss eff. VDS = 0 V to 400 Vc Total Gate Charge Qg Gate-Source Charge Qgs - - 4.3 Gate-Drain Charge Qgd - - 8.5 Turn-On Delay Time td(on) - 8.1 - tr - 12 - - 16 - - 13 - - - 3.3 - - 10 Rise Time Turn-Off Delay Time Fall Time td(off) VGS = 10 V ID = 2.5 A, VDS = 400 V, see fig. 6 and 13b VDD = 250 V, ID = 2.5 A, RG = 21 Ω, RD = 97 Ω, see fig. 10b tf pF pF nC ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage IS ISM VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G TJ = 25 °C, IS = 2.5 A, VGS = 0 S Vb TJ = 25 °C, IF = 2.5 A, dI/dt = 100 A/µsb - - 1.6 V - 330 500 ns - 760 1140 µC Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS. www.vishay.com 2 Document Number: 91274 S-Pending-Rev. A, 21-Jul-08 IRFR420A, IRFU420A, SiHFR420A, Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 10 10 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) TOP 1 0.1 4.5V 20μs PULSE WIDTH TJ = 25 °C 0.01 0.1 1 10 100 TJ = 150 ° C 1 TJ = 25 ° C 0.1 0.01 4.0 Fig. 1 - Typical Output Characteristics I D , Drain-to-Source Current (A) 1 4.5V 20μs PULSE WIDTH TJ = 150 ° C 10 VDS , Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics Document Number: 91274 S-Pending-Rev. A, 21-Jul-08 100 RDS(on) , Drain-to-Source On Resistance (Normalized) 3.0 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 1 6.0 7.0 8.0 9.0 Fig. 3 - Typical Transfer Characteristics TOP 0.1 5.0 VGS , Gate-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) 10 V DS = 50V 20μs PULSE WIDTH ID = 2.5A 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature ( °C) Fig. 4 - Normalized On-Resistance vs. Temperature www.vishay.com 3 IRFR420A, IRFU420A, SiHFR420A, Vishay Siliconix 10000 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd C, Capacitance(pF) ISD , Reverse Drain Current (A) Coss = Cds + Cgd 1000 10 Ciss 100 Coss 10 Crss TJ = 150 ° C 1 TJ = 25 ° C 1 1 10 100 1000 0.1 0.4 VDS, Drain-to-Source Voltage (V) V GS = 0 V 0.6 0.8 1.0 1.2 VSD ,Source-to-Drain Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage ID = 2.5A 100 VDS = 400V VDS = 250V VDS = 100V OPERATION IN THIS AREA LIMITED BY RDS(on) 15 I D , Drain Current (A) VGS , Gate-to-Source Voltage (V) 20 10 5 0 10 100us 1 FOR TEST CIRCUIT SEE FIGURE 13 0 4 8 12 16 QG , Total Gate Charge (nC) Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage 10us 0.1 1ms TC = 25 ° C TJ = 150 ° C Single Pulse 10 10ms 100 1000 10000 VDS, Drain-to-Source Voltage (V) Fig. 8 - Maximum Safe Operating Area www.vishay.com 4 Document Number: 91274 S-Pending-Rev. A, 21-Jul-08 IRFR420A, IRFU420A, SiHFR420A, Vishay Siliconix RD VDS 5.0 VGS D.U.T. RG + - VDD 4.0 ID , Drain Current (A) 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 3.0 Fig. 10a - Switching Time Test Circuit 2.0 VDS 1.0 90 % 0.0 25 50 75 100 125 150 ( ° C) TC , Case Temperature 10 % VGS td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms Thermal Response (Z thJC ) 10 1 D = 0.50 0.20 0.10 P DM 0.1 0.05 t1 SINGLE PULSE (THERMAL RESPONSE) 0.02 0.01 t2 Notes: 1. Duty factor D = 2. Peak T 0.01 0.00001 0.0001 0.001 0.01 t1/ t 2 J = P DM x Z thJC +T C 0.1 1 t 1, Rectangular Pulse Duration (sec) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case VDS 15 V tp L VDS D.U.T RG IAS 20 V tp Driver + A - VDD IAS 0.01 Ω Fig. 12a - Unclamped Inductive Test Circuit Document Number: 91274 S-Pending-Rev. A, 21-Jul-08 Fig. 12b - Unclamped Inductive Waveforms www.vishay.com 5 IRFR420A, IRFU420A, SiHFR420A, 300 TOP 250 BOTTOM ID 1.1A 1.6A 2.5A 200 150 100 700 V DSav , Avalanche Voltage ( V ) EAS , Single Pulse Avalanche Energy (mJ) Vishay Siliconix 650 600 50 550 0.0 0.5 0 25 50 75 100 125 Starting TJ , Junction Temperature ( °C) 150 Fig. 12c - Maximum Avalanche Energy vs. Drain Current 1.0 1.5 2.0 2.5 IAV , Avalanche Current ( A) Fig. 12d - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. QG 50 kΩ 12 V 10 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform www.vishay.com 6 Fig. 13b - Gate Charge Test Circuit Document Number: 91274 S-Pending-Rev. A, 21-Jul-08 IRFR420A, IRFU420A, SiHFR420A, Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - RG • • • • dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test Driver gate drive P.W. + Period D= + - VDD P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage VDD Body diode forward drop Inductor current Ripple ≤ 5 % ISD * VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91274. Document Number: 91274 S-Pending-Rev. A, 21-Jul-08 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1