VISHAY SIHFR430A

IRFR430A, IRFU430A, SiHFR430A, SiHFU430A
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Low Gate Charge Qg Results in Simple Drive
Requirement
500
RDS(on) (Ω)
VGS = 10 V
1.7
Qg (Max.) (nC)
24
Qgs (nC)
6.5
Qgd (nC)
Ruggedness
• Fully Characterized Capacitance and Avalanche Voltage
and Current
13
Configuration
Available
• Improved Gate, Avalanche and Dynamic dV/dt RoHS*
COMPLIANT
Single
• Effective Coss Specified
D
• Lead (Pb)-free Available
DPAK
(TO-252)
IPAK
(TO-251)
APPLICATIONS
G
• Switch Mode Power Supply (SMPS)
• Uninterruptible Power Supply
• High Speed Power Switching
S
N-Channel MOSFET
ORDERING INFORMATION
Package
DPAK (TO-252)
IRFR430APbF
SiHFR430A-E3
IRFR430A
SiHFR430A
Lead (Pb)-free
SnPb
DPAK (TO-252)
IRFR430ATRPbFa
SiHFR430AT-E3a
IRFR430ATRa
SiHFR430ATa
DPAK (TO-252)
IRFR430ATRLPbFa
SiHFR430ATL-E3a
IRFR430ATRLa
SiHFR430ATLa
DPAK (TO-252)
IRFR430ATRRPbFa
SiHFR430ATR-E3a
IRFR430ATRRa
SiHFR430ATRa
IPAK (TO-251)
IRFU430APbF
SiHFU430A-E3
IRFU430A
SiHFU430A
Note
a. See device orientation.
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
500
Gate-Source Voltage
VGS
± 30
Continuous Drain Current
VGS at 10 V
TC = 25 °C
TC = 100 °C
Pulsed Drain Currenta
ID
IDM
Linear Derating Factor
UNIT
V
5.0
3.2
A
20
0.91
W/°C
EAS
130
mJ
Currenta
IAR
5.0
A
Repetitive Avalanche Energya
EAR
11
mJ
PD
110
W
dV/dt
3.0
V/ns
TJ, Tstg
- 55 to + 150
Single Pulse Avalanche Energyb
Repetitive Avalanche
Maximum Power Dissipation
Peak Diode Recovery
TC = 25 °C
dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
for 10 s
300d
°C
Notes
a.
b.
c.
d.
Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
Starting TJ = 25 °C, L = 11 mH, RG = 25 Ω, IAS = 5.0 A (see fig. 12).
ISD ≤ 5.0 A, dI/dt ≤ 320 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91276
S-81366-Rev. A, 07-Jul-08
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IRFR430A, IRFU430A, SiHFR430A, SiHFU430A
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
62
Case-to-Sink, Flat, Greased Surface
RthCS
0.50
-
Maximum Junction-to-Case (Drain)
RthJC
-
1.1
UNIT
°C/W
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
VGS = 0 V, ID = 250 µA
500
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.60
-
V/°C
VGS(th)
VDS = VGS, ID = 250 µA
2.0
-
4.5
V
nA
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
IGSS
IDSS
RDS(on)
gfs
VGS = ± 30 V
-
-
± 100
VDS = 500 V, VGS = 0 V
-
-
25
VDS = 400 V, VGS = 0 V, TJ = 125 °C
-
-
250
-
-
1.7
Ω
VDS = 50 V, ID = 3.0 A
2.3
-
-
S
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
-
490
-
-
75
-
-
4.5
-
VDS = 1.0 V, f = 1.0 MHz
-
750
-
VDS = 400 V, f = 1.0 MHz
-
25
-
-
51
-
-
-
24
ID = 3.0 Ab
VGS = 10 V
µA
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Output Capacitance
Coss
Effective Output Capacitance
VGS = 10 V
Coss eff.
VDS = 0 V to 400
Vc
Total Gate Charge
Qg
Gate-Source Charge
Qgs
-
-
6.5
Gate-Drain Charge
Qgd
-
-
13
Turn-On Delay Time
td(on)
-
8.7
-
tr
-
27
-
-
17
-
-
16
-
-
-
5.0
-
-
20
Rise Time
Turn-Off Delay Time
Fall Time
td(off)
VGS = 10 V
ID = 5.0 A, VDS = 400 V,
see fig. 6 and 13b
VDD = 250 V, ID = 5.0 A,
RG = 15 Ω, RD = 50 Ω, see fig. 10b
tf
pF
pF
nC
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward Currenta
Body Diode Voltage
IS
ISM
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IS = 5.0 A, VGS = 0
S
Vb
TJ = 25 °C, IF = 5.0 A, dI/dt = 100 A/µsb
-
-
1.5
V
-
410
620
ns
-
1.4
2.1
µC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS.
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Document Number: 91276
S-81366-Rev. A, 07-Jul-08
IRFR430A, IRFU430A, SiHFR430A, SiHFU430A
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
100
100.00
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
10
ID, Drain-to-Source Current (Α )
ID, Drain-to-Source Current (A)
TOP
1
0.1
4.5V
0.01
10.00
T J = 150°C
1.00
T J = 25°C
0.10
20μs PULSE WIDTH
Tj = 25°C
VDS = 100V
20μs PULSE WIDTH
0.01
0.001
0.1
1
10
100
4.0
100
3.0
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
4.5V
0.1
20μs PULSE WIDTH
Tj = 150°C
0.01
1
10
VDS, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
Document Number: 91276
S-81366-Rev. A, 07-Jul-08
10.0
12.0
14.0
16.0
I D = 5.0A
100
2.0
(Normalized)
1
0.1
8.0
2.5
RDS(on) , Drain-to-Source On Resistance
ID, Drain-to-Source Current (A)
TOP
10
6.0
VGS, Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
VDS, Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
1.5
1.0
0.5
V GS = 10V
0.0
-60
-40
-20
0
20
40
60
TJ , Junction Temperature
80
100
120
140
160
( ° C)
Fig. 4 - Normalized On-Resistance vs. Temperature
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IRFR430A, IRFU430A, SiHFR430A, SiHFU430A
Vishay Siliconix
100
10000
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
C, Capacitance(pF)
I SD , Reverse Drain Current (A)
Coss = Cds + Cgd
1000
Ciss
100
Coss
10
Crss
10
TJ = 25 ° C
TJ = 150 ° C
1
1
V GS= 0 V
1
10
100
0.1
1000
0.2
0.5
VDS, Drain-to-Source Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
OPERATION IN THIS AREA
LIMITED BY R DS(on)
VDS = 400V
VDS = 250V
VDS = 100V
VGS , Gate-to-Source Voltage (V)
10
7
5
2
10
100μsec
1
1msec
0.1
0
4
8
12
16
20
QG , Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
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1.4
100
I D = 5.0A
0
1.1
Fig. 7 - Typical Source-Drain Diode Forward Voltage
ID , Drain-to-Source Current (A)
12
0.8
V SD,Source-to-Drain Voltage (V)
Tc = 25°C
Tj = 150°C
Single Pulse
10
10msec
100
1000
10000
VDS , Drain-toSource Voltage (V)
Fig. 8 - Maximum Safe Operating Area
Document Number: 91276
S-81366-Rev. A, 07-Jul-08
IRFR430A, IRFU430A, SiHFR430A, SiHFU430A
Vishay Siliconix
5.5
RD
VDS
VGS
D.U.T.
RG
4.4
+
- VDD
ID , Drain Current (A)
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
3.3
Fig. 10a - Switching Time Test Circuit
2.2
VDS
1.1
90 %
0.0
25
50
75
100
125
150
10 %
VGS
( ° C)
TC , Case Temperature
td(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
td(off) tf
tr
Fig. 10b - Switching Time Waveforms
(Z thJC )
10
1
Thermal Response
D = 0.50
0.20
P DM
0.10
0.1
0.05
t1
SINGLE PULSE
(THERMAL RESPONSE)
0.02
0.01
t2
Notes:
1. Duty factor D =
2. Peak T
0.01
0.00001
0.0001
0.001
0.01
t1/ t 2
J = P DM x Z thJC
+TC
0.1
1
t1, Rectangular Pulse Duration (sec)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
VDS
15 V
tp
L
VDS
D.U.T
RG
IAS
20 V
tp
Driver
+
A
- VDD
IAS
0.01 Ω
Fig. 12a - Unclamped Inductive Test Circuit
Document Number: 91276
S-81366-Rev. A, 07-Jul-08
Fig. 12b - Unclamped Inductive Waveforms
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IRFR430A, IRFU430A, SiHFR430A, SiHFU430A
Vishay Siliconix
5.0
250
EAS , Single Pulse Avalanche Energy (mJ)
200
TOP
2.2A
3.2A
BOTTOM
5.0A
VGS(th) Gate threshold Voltage (V)
ID
150
100
50
4.5
ID = 250μA
4.0
3.5
3.0
2.5
-75
0
25
50
75
100
Starting Tj, Junction Temperature
125
-50
-25
0
25
50
75
100 125
150
150
( ° C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
T J , Temperature ( °C )
Fig. 12d - Threshold Voltage vs. Temperature
Current regulator
Same type as D.U.T.
50 kΩ
QG
VGS
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
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Fig. 13b - Gate Charge Test Circuit
Document Number: 91276
S-81366-Rev. A, 07-Jul-08
IRFR430A, IRFU430A, SiHFR430A, SiHFU430A
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
RG
•
•
•
•
dV/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - device under test
Driver gate drive
P.W.
+
Period
D=
+
-
VDD
P.W.
Period
VGS = 10 V*
D.U.T. ISD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
VDD
Body diode forward drop
Inductor current
Ripple ≤ 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?91276.
Document Number: 91276
S-81366-Rev. A, 07-Jul-08
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Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
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therein, which apply to these products.
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Document Number: 91000
Revision: 18-Jul-08
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