VISHAY SIHFP21N60L

IRFP21N60L, SiHFP21N60L
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Superfast Body Diode Eliminates the Need for
External Diodes in ZVS Applications
600
RDS(on) (Ω)
VGS = 10 V
0.27
Qg (Max.) (nC)
150
Qgs (nC)
46
Qgd (nC)
64
Configuration
Available
• Lower Gate Charge Results in Simple Drive RoHS*
COMPLIANT
Requirements
• Enhanced dV/dt Capabilities Offer Improved Ruggedness
• Higher Gate Voltage Threshold Offers Improved Noise
Immunity
Single
D
• Lead (Pb)-free Available
TO-247
APPLICATIONS
• Zero Voltage Switching SMPS
G
• Telecom and Server Power Supplies
• Uniterruptible Power Supplies
S
• Motor Control Applications
D
G
S
N-Channel MOSFET
ORDERING INFORMATION
Package
TO-247
IRFP21N60LPbF
SiHFP21N60L-E3
IRFP21N60L
SiHFP21N60L
Lead (Pb)-free
SnPb
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
600
Gate-Source Voltage
VGS
± 30
Continuous Drain Current
VGS at 10 V
TC = 25 °C
ID
TC = 100 °C
Pulsed Drain Currenta
UNIT
V
21
13
A
IDM
84
2.6
W/°C
Single Pulse Avalanche Energyb
EAS
420
mJ
Repetitive Avalanche Currenta
IAR
21
A
Repetitive Avalanche Energya
EAR
33
mJ
Linear Derating Factor
Maximum Power Dissipation
TC = 25 °C
PD
330
W
dV/dt
16
V/ns
TJ, Tstg
- 55 to + 150
Peak Diode Recovery dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Mounting Torque
for 10 s
6-32 or M3 screw
300d
°C
10
lbf · in
1.1
N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting TJ = 25 °C, L = 1.9 mH, RG = 25 Ω, IAS = 21 A, dV/dt = 11 V/ns (see fig. 12a).
c. ISD ≤ 21 A, dI/dt ≤ 530 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91206
S-81273-Rev. B, 16-Jun-08
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IRFP21N60L, SiHFP21N60L
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
Case-to-Sink, Flat, Greased Surface
Maximum Junction-to-Case (Drain)
SYMBOL
TYP.
MAX.
UNIT
RthJA
RthCS
RthJC
0.24
-
40
0.38
°C/W
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
VDS
VGS = 0 V, ID = 250 µA
600
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
420
-
mV/°C
VGS(th)
VDS = VGS, ID = 250 µA
3.0
-
5.0
V
Gate-Source Leakage
IGSS
VGS = ± 30 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 600 V, VGS = 0 V
-
-
50
µA
VDS = 480 V, VGS = 0 V, TJ = 125 °C
-
-
2.0
mA
-
0.27
0.32
Ω
VDS = 50 V, ID = 13 A
11
-
-
S
Drain-Source On-State Resistance
RDS(on)
Forward Transconductance
gfs
ID = 13 Ab
VGS = 10 V
Dynamic
Input Capacitance
Ciss
VGS = 0 V,
-
4000
-
Output Capacitance
Coss
VDS = 25 V,
-
340
-
Crss
f = 1.0 MHz, see fig. 5
-
29
-
-
170
-
-
130
-
-
-
150
-
-
46
-
-
64
Reverse Transfer Capacitance
Effective Output Capacitance
Coss eff.
Effective Output Capacitance
(Energy Related)
Coss eff. (ER)
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
VGS = 0 V,
VDS = 0 V to 480 Vc
RG
td(on)
tr
td(off)
tf
VGS = 10 V
ID = 21 A, VDS = 480 V
see fig. 7 and 15b
f = 1 MHz, open drain
VDD = 300 V, ID = 21 A,
RG = 1.3 Ω, VGS = 10 V,
see fig. 11a and 11bb
-
0.63
-
-
20
-
-
58
-
-
33
-
-
10
-
-
-
21
-
-
84
pF
nC
Ω
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Currenta
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Reverse Recovery Time
IRRM
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
S
TJ = 25 °C, IS = 21 A, VGS = 0 Vb
-
-
1.5
TJ = 25 °C, IF = 21 A
-
160
240
TJ = 125 °C, dI/dt = 100 A/µsb
-
400
610
TJ = 25 °C, IF = 21 A, VGS = 0 Vb
-
480
730
TJ = 125 °C, dI/dt = 100 A/µsb
-
1540
2310
TJ = 25 °C
-
5.3
7.9
V
ns
nC
A
Forward Turn-On Time
ton
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising form 0 to 80 % VDS.
Coss eff. (ER) is a fixed capacitance that stores the same energy as Coss while VDS is rising from 0 to 80 % VDS.
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Document Number: 91206
S-81273-Rev. B, 16-Jun-08
IRFP21N60L, SiHFP21N60L
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
1000
1000
10
BOTTOM
ID, Drain-to-Source Current (Α )
ID, Drain-to-Source Current (A)
TOP
100
VGS
15V
12V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
1
0.1
5.5V
0.01
100
T J = 150°C
10
1
T J = 25°C
0.1
VDS = 50V
20µs PULSE WIDTH
20µs PULSE WIDTH
Tj = 25°C
0.01
0.001
0.1
1
10
100
4
1000
Fig. 1 - Typical Output Characteristics
8
10
12
14
16
Fig. 3 - Typical Transfer Characteristics
3.0
100
BOTTOM
5.5V
1
0.1
20µs PULSE WIDTH
Tj = 150°C
ID = 21A
2.5
VGS = 10V
2.0
(Normalized)
10
VGS
15V
12V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
RDS(on) , Drain-to-Source On Resistance
TOP
ID, Drain-to-Source Current (A)
6
VGS , Gate-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
1.5
1.0
0.5
0.0
0.01
0.1
1
10
100
-60 -40 -20
0
20
40
60
80 100 120 140 160
VDS, Drain-to-Source Voltage (V)
T J , Junction Temperature (°C)
Fig. 2 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91206
S-81273-Rev. B, 16-Jun-08
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IRFP21N60L, SiHFP21N60L
Vishay Siliconix
12.0
100000
VGS = 0V,
f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = Cgd
VGS , Gate-to-Source Voltage (V)
Coss = Cds + Cgd
10000
C, Capacitance(pF)
ID= 21A
Ciss
1000
Coss
100
Crss
VDS= 120V
8.0
6.0
4.0
2.0
0.0
10
1
10
100
0
1000
20
VDS, Drain-to-Source Voltage (V)
40
60
80
100
120
Q G Total Gate Charge (nC)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
25
Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage
ISD, Reverse Drain Current (A)
100.00
20
Energy (µJ)
VDS= 480V
VDS= 300V
10.0
15
10
5
T J = 150°C
10.00
T J = 25°C
1.00
VGS = 0V
0
0.10
0
100
200
300
400
500
600
700
VDS, Drain-to-Source Voltage (V)
Fig. 6 - Typical Output Capacitance Stored Energy vs. VDS
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0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
VSD, Source-to-Drain Voltage (V)
Fig. 8 - Typical Source-Drain Diode Forward Voltage
Document Number: 91206
S-81273-Rev. B, 16-Jun-08
IRFP21N60L, SiHFP21N60L
Vishay Siliconix
ID, Drain-to-Source Current (A)
1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
RD
VDS
100
VGS
D.U.T.
RG
10
100µsec
+
- VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
1msec
1
Tc = 25°C
Tj = 150°C
Single Pulse
Fig. 11a - Switching Time Test Circuit
10msec
0.1
1
10
100
1000
10000
VDS, Drain-to-Source Voltage (V)
Fig. 9 - Maximum Safe Operating Area
VDS
25
90 %
ID, Drain Current (A)
20
10 %
VGS
15
td(on)
td(off) tf
tr
Fig. 11b - Switching Time Waveforms
10
5
0
25
50
75
100
125
150
T C , Case Temperature (°C)
Fig. 10 - Maximum Drain Current vs. Case Temperature
Thermal Response ( Z thJC )
1
D = 0.50
0.1
0.20
0.10
0.05
0.01
0.02
0.01
P DM
t1
0.001
t2
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty factor D =
2. Peak T
t1/ t 2
J = P DM x Z thJC
+T C
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig. 12 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Document Number: 91206
S-81273-Rev. B, 16-Jun-08
www.vishay.com
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IRFP21N60L, SiHFP21N60L
Vishay Siliconix
5.0
VDS
VGS(th) Gate threshold Voltage (V)
tp
4.0
ID = 250µA
3.0
IAS
Fig. 14c - Unclamped Inductive Waveforms
2.0
Current regulator
Same type as D.U.T.
50 kΩ
1.0
-75
-50
-25
0
25
50
75
100
125
150
12 V
0.2 µF
0.3 µF
T J , Temperature ( °C )
+
Fig. 13 - Threshold Voltage vs. Temperature
D.U.T.
VDS
VGS
800
EAS , Single Pulse Avalanche Energy (mJ)
-
ID
9.4A
13A
BOTTOM 21A
700
3 mA
TOP
600
IG
ID
Current sampling resistors
Fig. 15a - Gate Charge Test Circuit
500
400
300
QG
200
VGS
100
QGS
QGD
0
25
50
75
100
125
150
VG
Starting T J , Junction Temperature (°C)
Fig. 14a - Maximum Avalanche Energy vs. Drain Current
Charge
Fig. 15b - Basic Gate Charge Waveform
15 V
L
VDS
D.U.T
RG
IAS
20 V
tp
Driver
+
A
- VDD
A
0.01 Ω
Fig. 14b - Unclamped Inductive Test Circuit
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Document Number: 91206
S-81273-Rev. B, 16-Jun-08
IRFP21N60L, SiHFP21N60L
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
RG
•
•
•
•
dV/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - device under test
Driver gate drive
P.W.
+
Period
D=
+
-
VDD
P.W.
Period
VGS = 10 V*
D.U.T. ISD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
VDD
Body diode forward drop
Inductor current
Ripple ≤ 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 16 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?91206.
Document Number: 91206
S-81273-Rev. B, 16-Jun-08
www.vishay.com
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Disclaimer
All product specifications and data are subject to change without notice.
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Document Number: 91000
Revision: 18-Jul-08
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