STLC1 LED LAMPS CLUSTER DRIVER ■ ■ ■ ■ ■ ■ ■ FULLY MONOLITHIC FIXED FREQUENCY SMPS THREE LOW SIDE DRIVERS FOR STOP TAIL AND TURN LED LAMPS ARRAYS DRIVING PROGRAMMABLE LOW SIDE DRIVER OVER CURRENT LIMIT PROTECTION UNDER CURRENT DIAGNOSTIC INPUT OVERVOLTAGE PROTECTION VERY LOW STAND-BY CURRENT THERMAL PROTECTION WITH HYSTERESIS PowerSO-20TM DESCRIPTION The STLC1, a device realized with the well established BCD technology, is a fixed frequency fully monolithic SMPS, with three independent smart low side driver, primarily intended for automotive rear led lamps driving. The output voltage is set using a simple resistor divider. Thermal shutdown with hysteresis, input over-voltage and overcurrent protections give robust design solutions. SCHEMATIC DIAGRAM B+ OSCILLATOR THERMAL PROTECTION P-OUT TURN I N P U T STOP TAIL PWM SWITCH CONTOLLER Rs COMP1 + CNTL PWM COMP TS -PWM FDBK ERR AMP 1.24V + PULSE WIDTH CONTROLLER REF REF TR -DRV M1 OSC ST -DRV GND M2 TL -DRV M3 LMP -OUT LAMP OUTAGE DETECT TL -L September 2002 ST -L TR -L 1/16 STLC1 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VB+ Transient Supply Voltage (load dump) 60 V VB+ Operating Supply Voltage 24 V VB+ + 0.3 V VTURN, VSTOP, VTAIL TURN, STOP and TAIL input pins voltage ITURN, ISTOP, ITAIL TURN, STOP and TAIL pins current ± 10 mA ITR-DRV, ITL-DRV, IST-DRV TR-DRV, TL-DRV and ST-DRV pins sink current 1.5 A ILMP-OUT LMP-OUT pin sink current 120 mA VP-OUT P-OUT DC Voltage 60 V IP-OUT P-OUT pin sink current Tstg TJ Internally Limited A Storage Temperature Range -55 to +150 °C Operating Junction Temperature Range -40 to +125 °C PowerSO-20TM Unit 2 °C/W 50 °C/W THERMAL DATA Symbol Parameter Rthj-case Thermal Resistance Junction-case Rthj-amb Thermal Resistance Junction-Ambient CONNECTION DIAGRAM (top view) PowerSO-20TM 2/16 STLC1 PIN DESCRIPTION Pin N° Symbol Name and Function 1 2 3 GND TR-DRV TR-L 4 5 ST-DRV ST-L 6 7 TL-DRV TL-L 8 CNTL 9 10 11 12 13 REF GND GND B+ TAIL 14 STOP 15 TURN 16 17 18 FDBK P-OUT TS-PWM 19 LMP-OUT 20 GND Ground The Low Side Driver drain pin for the TURN LED array The Low Side Driver source pin, used to detect either a lamp outage or an over-current condition for the TURN LED array The Low Side Driver drain pin for the STOP LED array The Low Side Driver source pin, used to detect either a lamp outage or an over-current condition for the STOP LED array The Low Side Driver drain pin for the TAIL LED array The Low Side Driver source pin, used to detect either a lamp outage or an over-current condition for the TAIL LED array Determines, according to a percentange of VREF, the Pulse Width Controller internal oscillator duty cycle Stable Reference Voltage Ground Ground Power Supply TAIL input pin. When brought high, TAIL activates the IC and drives the TAIL led array. STOP input pin. When brought high, STOP activates the IC and drives the STOP led array. TURN input pin. When brought high, TURN activates the IC and drives the TURN led array. Internal Error Amplifier Inverting Pin Power MOSFET drain pin A Three State Input. It determine the control logic for TAIL and STOP Low Side Drivers. A weak pulled up signal during lamps No Fault condition and an active pulldown when a Fault condition is detected. Ground ORDERING INFORMATION TYPE PowerSO-20TM STLC1 STLC1PD 3/16 STLC1 TYPICAL APPLICATION CIRCUIT Iout OUT TAIL COUT TURN RF1 STOP GND RLR TR-DRV RLS RLT TR-L RTR RTS RTT RC1 RC2 CREF ST-DRV TS-PWM P-OUT ST-L FDBK TL-DRV TURN TL-L STOP CNTL RF2 GND LMP-OUT IP-OUT CSEPIC TAIL REF B+ GND GND ELECTRICAL CHARACTERISTICS FOR SMPD SECTION (TJ=-40 to 125°C unless otherwise specified. Typical values are referred at TJ=25°C, VB+=14V) Symbol Parameter VB+ Supply Operating Voltage VSD B+ Input Overvoltage Shutdown Total Off State Quiescent Current ISQ fosc RP(on) ID(off) ILIMIT tSMPS-ON Test Conditions Normal Operating Range Normal Operating Range - TAIL only Min. 9 6 28 Typ. Max. Unit V 30 24 24 32 V 120 180 µA 180 240 kHz VB+ = 14V, =0V PWM Oscillator Frequency VB+ = 14V VTURN = VSTOP = VTAIL Static drain to ground SMPS N-channel switch on resistance P-OUT Off State leakage Current IP-OUT Current Limit VB+ = 9V, IP-OUT=4A 180 mΩ VB+ = 14V, IP-OUT=4A 170 mΩ 140 VB+ = 16V, VB+ = 14V, 20 VFDBK = 1V 8 12 16 µA A SMPS Turn On Delay CREF = 1µF (see note 1,4 and Fig 1, 2) 1.6 ms VLOAD Load Regulation VB+ = 14V, IOUT = 0.6 to 3A VOUT = 10V 60 mV VLINE Line Regulation VB+ = 9 to 16V, IOUT = 1.5A VOUT = 10V 15 mV 4/16 STLC1 ELECTRICAL CHARACTERISTICS FOR LOW SIDE DRIVER SECTION (TJ=-40 to 125°C unless otherwise specified. Typical values are referred at TJ=25°C, VB+=14V) Symbol Parameter R(on) Static drain to source LSD N-channel switch on resistance Test Conditions VB+ = 9V, VSTOP = VB+ VST-L = 0V IST-DRV=1A 500 mΩ VTAIL = VB+ ITL-DRV=1A 500 mΩ VTL-L = 0V tLSD-ON LSD Turn On Delay CREF = 1µF COUT = 220µF (see note 2,4 and Fig 1, 2) VLS-ON FDBK Voltage over which LSD’s are enabled FDBK Voltage over which LSD’s are disabled Pulse Width Controller Internal Oscillator Frequency Input Threshold voltage to enable LSD Input Threshold voltage to disable LSD VIN(ON) VIN(OFF) Unit mΩ VTURN = VSTOP = VTAIL =0V VTR-DRV = VST-DRV = VTL-DRV = VB+ VTAIL = VB+ Max. 500 OFF State LSD’S leakage current fLSD Typ. VTURN = VB+ VTR-L = 0V ITR-DRV=1A ILSD(off) VLS-OFF Min. VTS-PWM = VREF/2 10 200 µA 2 ms 0.95VFB V 0.5VFB V 380 500 Hz VB+ = 9 to 16V 0.6VB+ V VB+ = 9 to 16V 0.4VB+ V 5/16 STLC1 ELECTRICAL CHARACTERISTICS FOR FEEDBACK AND CONTROL (TJ=-40 to 125°C unless otherwise specified. Typical values are referred at TJ=25°C, VB+=14V) Symbol VLOUT VH-SHORT VREF VFB VLH(en) VLH(dis) VLL Parameter Lamp Outage Detect Threshold Voltage Output Overcurrent Threshold Voltage External Voltage Reference Internal Band-gap Voltage Reference (see schematic diagram) Device Enabled Lamp Outage no fault High Voltage Device Disabled Lamp Outage no fault High Voltage Lamp Outage fault Low Voltage TURN, STOP and TAIL Input Resistance TSHDN Thermal Shutdown Threshold Thermal Shutdown THYST Hysteresis Time to Fault Indication tF(on) ON Time to Fault Indication tF(off) OFF VTS-PWM(L) TS-PWM Low State Voltage (see table 1) VTS-PWM(M) TS-PWM Mid State Voltage (see table 1) VTS-PWM(H) TS-PWM High State Voltage (see table 1) R(IN) Test Conditions Min. Typ. Max. Unit TJ=25°C 150 200 250 mV TJ=25°C 1.2 1.3 1.6 V VTURN = VSTOP = VTAIL = VB+ IREF = 500µA 3.6 3.8 4 V VTURN = VSTOP =VTAIL = VB+ 1.15 1.24 1.3 V VB+-2 VB+ V VB+-2 VB+ V VB+ = 9 to 16V, ILMP-OUT < -4mA least one input enabled. No fault condition. VB+ = 9 to 16V, ILMP-OUT < -2mA VTURN = VSTOP = VTAIL = 0V At VB+ = 9 to 16V ILMP-OUT < 100mA At least one input enabled. Fault condition. VB+ = 12V, 1.5 V 18.5 kΩ (see Note 4) 150 °C (see Note 4) 10 °C 60 µs 8 ms 0.21VREF 0.98VREF 0.1VREF V 0.79VREF V V Note 1: The device is powered. If only one of the three inputs is enabled (the remaining inputs are shorted to ground), tSMPS-ON is the time required for the OUT voltage to reach the10% of its own steady state value Note 2: The device is powered. If only one of the three inputs is brought high (the remaining inputs are shorted to ground), TLSD-ON is the time required for the current to flow in the enabled LSD Note 3: The device is powered and at least one input is enabled. If this input is disabled, T LSD-OFF is the time required for the current to become zero in the previously enabled LSD. Note 4: Guaranteed by design, not tested in production. FUNCTIONAL DESCRIPTION SMPS The N-channel Power MOSFET is source grounded, thus it is possible to use any converter configuration with the power switch connected to ground. A SEPIC topology (Single Ended Primary Inductor Current) is shown in the typical application schematic. INPUTS PINS The IC’s inputs are TURN, STOP and TAIL. If all inputs are disabled, SMPS and most of the 6/16 internal control and diagnostic circuitry are not active. This is done in order to maintain the stand-by quiescent current at very low values. When only one of these inputs is put high (e.g connected to VB+), a device start-up phase begins. First the CREF capacitor is charged and, once the voltage on it has reached about 95% of its steady state value (VREF), the SMPS is enabled. In order to allow the output to reach the regulated voltage value faster, the LSD corresponding to the input enabled will conduct STLC1 only when the OUT voltage is about 95% of its final value. Such a start-up phase takes place when only one input is enabled. LOW SIDE DRIVER: The purpose of the low side drivers is to connect the LED cluster to ground, creating a path for the current. Using external resistors, current flowing into the LED cluster is set according to the following formula: V OUT – V ARRAY I ARRAY = ---------------------------------------------R T + R L + R ( on ) where (see typical application schematic): RL = R LT, RLS, or RLR RT = R TT, RTS, or RTR R(on) = Static drain to source LSD on resistance VOUT = Output Voltage VARRAY = Expected LED array voltage drop. LSD over-current protection and under-current diagnostic (see LAMP OUTAGE DETECTION section) is performed by sensing the voltage on resistors, when the corresponding LSD are enabled. If the voltage on exceeds VH-SHORT, the over-current protection acts by reducing the LSD average current by switching ON and OFF the LSD itself. LAMP OUTAGE DETECTION Resistors are used to sense the LED array current. In case one or more LEDs fail (open circuit) the current on the corresponding resistor will drop due to the increased LED array resistance. As soon as the voltage drop on is lower than VLOUT, a LED lamp fault condition is detected and the LMP-OUT pin becomes active (low). The LAMP-OUTAGE functionality is AND-ed with each input, that is a fault condition can be detected only when the LED arrays are enabled. DIMMING The dimming of the LED lamps can be obtained by using the internal PULSE WIDTH controller (it drives the LSD TAIL and STOP gates). The duty cycle of this internal oscillator (whose frequency is 380Hz typical) can be set, forcing the voltage of the CNTL pin to be a fraction of VREF, by using a simple resistor divider (as shown in the typical application scheme). In this case the duty cycle percentage can be calculated with the following approximated formula: DC% ≅ R C1 0.2 3.8 if ---------------------------- ≤ -------------- R C1 + R C2 V REF R C1 ---------------------------• 100 Elsewhere R C1 + R C2 The TS-PWM pin voltage, according to the TABLE1 determines which LSD is PULSE WIDTH CONTROLLER driven. Internal dimming can only be performed on the TAIL and STOP arrays. The TURN array can be externally dimmed (as well as TAIL and STOP) by driving the corresponding input witha a square pulse signal whose maximum frequency must be 200Hz. 7/16 STLC1 TS-PWM ENCODING TABLE DRIVE TYPE TYPE LOW (VTS-PWM<0.1VREF) MID (VTS-PWM<0.1VREF/2 or floating) HIGH (VTS-PWM>0.98VREF) INPUTS ACTIVATED TAIL STOP TAIL AND STOP TAIL STOP TAIL AND STOP TAIL STOP TAIL AND STOP TAIL ARRAY STOP ARRY PWM OFF PWM PWM OFF PWM PWM ON ON PWM ON ON OFF ON ON PWM ON ON Figure 1 : Start-up phase and input signal timing diagram (with TS-PWM floating) 8/16 STLC1 Figure 2 : Magnified start-up phase timing diagram Figure 3 : Fault indication on and off timing diagram 9/16 STLC1 TYPICAL CHARACTERISTICS (See PCB BOM) Figure 4 : Output Voltage vs Output Current Figure 7 : Output Voltage vs Output Current Figure 5 : Output Voltage vs Output Current Figure 8 : Duty Cycle Oscillator Frequency vs CNTL Voltage Figure 6 : Output Voltage vs Output Current Figure 9 : LMP-OUT Voltage (Fault Condition) vs LMP-OUT Sinked Current 10/16 STLC1 Figure 10 : Total OFF State Quiescent Current vs Temperature Figure 13 : External Reference Voltage vs Temperature Figure 11 : Time to Fault Indication ON vs Temperature Figure 14 : VFB Voltage vs Temperature Figure 12 : Time to Fault Indication OFF vs Temperature 11/16 STLC1 Figure 15 : Demoboard Schematic Figure 16 : PCB Components outline 12/16 STLC1 Figure 17 : PBC Top Layer Figure 18 : PBC Bottom Layer 13/16 STLC1 PCB BOM 14/16 REFERENCE DESCRIPTION L1, L2 C4, C5, C6 C16 C7 C1, C2 C8, C9 C14 C18 C11 C12 R10 R11 R15 R16 R18 R12, R13, R14 R4, R6, R8 R5, R7, R9 TR1 RLP D1 DLP T1 JP1, JP2, JP3 VK200 22µF-35V Electrolytic Capacitor Low ESR 220nF-35V Ceramic Capacitor X7R Dielectric 47µF-35V Electrolytic Capacitor 4.7nF-35V Ceramic Capacitor X7R Dielectric 220µF-35V Electrolytic Capacitor Low ESR 560pF 560pF-50V 1µF-35V Tantalium Capacitor 220pF Ceramic Capacitor 9.1kΩ Resistor 125mW 0.1% 1.3kΩ Resistor 125mW 0.1% 4.7kΩ Resistor 125mW 5% 56Ω Resistor 125mW 5% 10Ω Resistor 250mW 5% 1.2kΩ Resistor 125mW 5% 2.2Ω Resistor 1W 5% 1Ω Resistor 1W 5% 10kΩ Trimmer 1.5kΩ Resistor 125mW 5% Schottky Diode STPS3L40S Led Diode SEPIC inductor, Toroid Horizontal THT 20µH@10ADC, 200-250KHz Jumper STLC1 PowerSO-20 MECHANICAL DATA mm. DIM. MIN. inch TYP MAX. A MIN. TYP. MAX. 3.60 a1 0.10 0.1417 0.30 a2 0.0039 0.0118 0.0039 3.30 0.1299 a3 0 0.10 0 b 0.40 0.53 0.0157 0.0209 c 0.23 0.32 0.0090 0.0013 D (1) 15.80 16.00 0.6220 0.630 E 13.90 14.50 0.5472 e 0.5710 1.27 e3 0.0500 11.43 E1 (1) 0.4500 10.90 11.10 E2 0.4291 0.4370 0.0000 0.0039 2.90 G 0 0.1141 0.10 h 1.10 L 0.80 0.0433 1.10 N 0.0314 0.0433 10˚ S 0˚ 10˚ 8˚ T 0˚ 8˚ 10.0 0.3937 (1) “D and E1” do not include mold flash or protusions - Mold flash or protusions shall not exceed 0.15mm (0.006”) N R N a2 b A a1 e DETAIL A c DETAIL B E e3 D DETAIL A lea d 20 11 slug a3 DETAIL B E2 E1 0.35 Gage Plan e T - C- S L SEATING PLANE G C (COPLANARITY) 1 1 0 PSO20MEC h x 45˚ 0056635 15/16 STLC1 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. © http://www.st.com 16/16