VND830PEP ® DOUBLE CHANNEL HIGH SIDE DRIVER TARGET SPECIFICATION TYPE VND830PEP RDS(on) 60 mΩ (*) IOUT 6.0 A (*) VCC 36 V (*) Per each channel CMOS COMPATIBLE INPUTS OPEN DRAIN STATUS OUTPUTS ■ ON STATE OPEN LOAD DETECTION ■ OFF STATE OPEN LOAD DETECTION ■ SHORTED LOAD PROTECTION ■ UNDERVOLTAGE AND OVERVOLTAGE SHUTDOWN ■ PROTECTION AGAINST LOSS OF GROUND ■ VERY LOW STAND-BY CURRENT ■ ■ ■ PowerSSO-24 ORDER CODES PACKAGE TUBE T&R PowerSSO-24 VND830PEP VND830PEP13TR REVERSE BATTERY PROTECTION (**) DESCRIPTION The VND830PEP is a monolithic device designed in STMicroelectronics VIPower M0-3 Technology, intended for driving any kind of load with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart protects the device against overload. The device detects open load condition both in on and off state. Output shorted to VCC is detected in the off state. Device automatically turns off in case of ground pin disconnection. BLOCK DIAGRAM Vcc Vcc CLAMP OVERVOLTAGE UNDERVOLTAGE GND CLAMP 1 OUTPUT1 INPUT1 DRIVER 1 CLAMP 2 STATUS1 CURRENT LIMITER 1 LOGIC DRIVER 2 OUTPUT2 OVERTEMP. 1 OPENLOAD ON 1 CURRENT LIMITER 2 INPUT2 OPENLOAD OFF 1 OPENLOAD ON 2 STATUS2 OPENLOAD OFF 2 OVERTEMP. 2 (**) See application schematic at page 8 October 2003 - Revision 1.3 (Working document) 1/14 This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice. VND830PEP ABSOLUTE MAXIMUM RATING Symbol VCC - VCC - IGND IOUT - IOUT IIN Istat VESD Ptot Tj Tc Tstg Parameter DC Supply Voltage Reverse DC Supply Voltage DC Reverse Ground Pin Current DC Output Current Reverse DC Output Current DC Input Current DC Status Current Electrostatic Discharge (Human Body Model: R=1.5KΩ; C=100pF) Value 41 - 0.3 - 200 Internally Limited -6 +/- 10 +/- 10 Unit V V mA A A mA mA - INPUT 4000 V - STATUS 4000 V - OUTPUT 5000 V 5000 74 Internally Limited - 40 to 150 - 55 to 150 V W °C °C °C - VCC Power Dissipation TC=25°C Junction Operating Temperature Case Operating Temperature Storage Temperature CONNECTION DIAGRAM (TOP VIEW) VCC GND NC NC INPUT1 STATUS1 NC STATUS2 NC INPUT2 NC VCC 1 2 3 4 5 6 24 23 22 21 20 19 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 7 8 9 10 11 12 18 17 16 15 14 13 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 TAB = VCC CURRENT AND VOLTAGE CONVENTIONS IS IIN1 VCC VCC INPUT 1 ISTAT1 VIN1 STATUS 1 VSTAT1 IOUT1 IIN2 OUTPUT 1 INPUT 2 VIN2 ISTAT2 IOUT2 STATUS 2 VSTAT2 GND OUTPUT 2 VOUT2 IGND 2/14 1 VOUT1 VND830PEP THERMAL DATA Symbol Rthj-case Parameter Thermal Resistance Junction-case Value 1.7 Unit °C/W Rthj-amb Thermal Resistance Junction-ambient 60 (*) °C/W (*) When mounted on a standard single-sided FR-4 board with 1 cm2 of Cu (at least 35µm thick) connected to all VCC pins. ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C< Tj <150°C, unless otherwise specified) (Per each channel) POWER OUTPUTS Symbol VCC VUSD VOV RON IS Parameter Operating Supply Voltage Undervoltage Shut-down Overvoltage Shut-down On State Resistance Supply Current Test Conditions Min 5.5 3 36 Typ 13 4 Max 36 5.5 IOUT=2A; Tj=25°C 60 Unit V V V mΩ IOUT=2A; VCC>8V Off State; VCC=13V; VIN=VOUT=0V 12 120 40 mΩ µA Off State; VCC=13V; VIN=VOUT=0V; Tj=25°C 12 25 µA 5 7 50 0 5 3 mA µA µA µA µA Typ Max Unit On State; VCC=13V; VIN=5V; IOUT=0A IL(off1) IL(off2) IL(off3) IL(off4) Off State Output Current Off State Output Current Off State Output Current Off State Output Current VIN=VOUT=0V VIN=0V; VOUT=3.5V VIN=VOUT=0V; VCC=13V; Tj =125°C VIN=VOUT=0V; VCC=13V; Tj =25°C 0 -75 Test Conditions RL=6.5Ω from VIN rising edge to VOUT=1.3V RL=6.5Ω from VIN falling edge to VOUT=11.7V RL=6.5Ω from VOUT=1.3V to VOUT=10.4V RL=6.5Ω from VOUT=11.7V to VOUT=1.3V Min SWITCHING (VCC=13V) Symbol Parameter td(on) Turn-on Delay Time td(off) Turn-off Delay Time dVOUT/ dt(on) dVOUT/ dt(off) Turn-on Voltage Slope Turn-off Voltage Slope 30 µs 30 µs 0.5 V/µs 0.25 V/µs LOGIC INPUT Symbol VIL IIL VIH IIH VI(hyst) VICL Parameter Input Low Level Low Level Input Current Input High Level High Level Input Current Input Hysteresis Voltage Input Clamp Voltage Test Conditions VIN = 1.25V Min Typ 1 3.25 VIN = 3.25V IIN = 1mA Max 1.25 10 0.5 6 IIN = -1mA 6.8 8 -0.7 Unit V µA V µA V V V VCC - OUTPUT DIODE Symbol VF Parameter Forward on Voltage Test Conditions -IOUT=2A; Tj=150°C Min Typ Max 0.6 Unit V 3/14 1 VND830PEP ELECTRICAL CHARACTERISTICS (continued) STATUS PIN Symbol VSTAT ILSTAT CSTAT VSCL Parameter Test Conditions Status Low Output Voltage ISTAT= 1.6 mA Status Leakage Current Normal Operation; VSTAT= 5V Status Pin Input Normal Operation; VSTAT= 5V Capacitance ISTAT= 1mA Status Clamp Voltage ISTAT= - 1mA Min 6 Typ 6.8 Max 0.5 10 Unit V µA 100 pF 8 V -0.7 V PROTECTIONS Symbol TTSD TR Thyst tSDL Parameter Shut-down Temperature Reset Temperature Thermal Hysteresis Status Delay in Overload Conditions Ilim Current limitation Vdemag Turn-off Output Clamp Voltage Test Conditions Min 150 135 7 Typ 175 9 5.5V<VCC<36V IOUT=2A; L=6mH Unit °C °C °C 20 µs 15 A 15 A 15 Tj>TTSD 6 Max 200 VCC-41 VCC-48 VCC-55 V OPENLOAD DETECTION Symbol IOL tDOL(on) VOL tDOL(off) Parameter Openload ON State Detection Threshold Openload ON State Detection Delay Openload OFF State Voltage Detection Threshold Openload Detection Delay at Turn Off Test Conditions Min Typ Max Unit 50 100 200 mA 200 µs 3.5 V 1000 µs VIN=5V IOUT=0A VIN=0V 1.5 OPEN LOAD STATUS TIMING (with external pull-up) IOUT < IOL VOUT> VOL VINn OVERTEMP STATUS TIMING Tj > TTSD VINn VSTAT n VSTAT n tSDL tDOL(off) 4/14 2 2.5 tDOL(on) tSDL VND830PEP Switching time Waveforms VOUTn 90% 80% dVOUT/dt(off) dVOUT/dt(on) 10% t VINn td(on) td(off) t TRUTH TABLE CONDITIONS Normal Operation Current Limitation Overtemperature Undervoltage Overvoltage Output Voltage > VOLn Output Current < I OLn INPUTn L H L H H L H L H L H L H L H OUTPUTn L H L X X L L L L L L H H L H STATUSn H H H (Tj < TTSD) H (Tj > TTSD) L H L X X H H L H H L 5/14 VND830PEP ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E 6/14 I II TEST LEVELS III IV -25 V +25 V -25 V +25 V -4 V +26.5 V -50 V +50 V -50 V +50 V -5 V +46.5 V -75 V +75 V -100 V +75 V -6 V +66.5 V -100 V +100 V -150 V +100 V -7 V +86.5 V I C C C C C C TEST LEVELS RESULTS II III C C C C C C C C C C E E Delays and Impedance 2 ms 10 Ω 0.2 ms 10 Ω 0.1 µs 50 Ω 0.1 µs 50 Ω 100 ms, 0.01 Ω 400 ms, 2 Ω IV C C C C C E CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device. VND830PEP Figure1: Waveforms NORMAL OPERATION INPUTn OUTPUT VOLTAGEn STATUSn UNDERVOLTAGE VCC VUSDhyst VUSD INPUTn OUTPUT VOLTAGEn STATUSn undefined OVERVOLTAGE VCC<VOV VCC>V OV VCC INPUTn OUTPUT VOLTAGEn STATUSn OPEN LOAD with external pull-up INPUTn VOUT>VOL OUTPUT VOLTAGEn VOL STATUSn OPEN LOAD without external pull-up INPUTn OUTPUT VOLTAGEn STATUSn OVERTEMPERATURE Tj TTSD TR INPUTn OUTPUT CURRENTn STATUSn 7/14 1 VND830PEP APPLICATION SCHEMATIC +5V +5V +5V VCC Rprot STATUS1 Dld µC Rprot INPUT1 OUTPUT1 Rprot STATUS2 Rprot INPUT2 OUTPUT2 GND RGND VGND GND PROTECTION REVERSE BATTERY NETWORK AGAINST Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND ≤ 600mV / IS(on)max. 2) RGND ≥ (−VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device’s datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary 8/14 DGND depending on how many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1kΩ) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT and STATUS pin is to leave them unconnected. VND830PEP LOAD DUMP PROTECTION OPEN LOAD DETECTION IN OFF STATE Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds VCC max DC rating. The same applies if the device will be subject to transients on the VCC line that are greater than the ones shown in the ISO T/R 7637/1 table. Off state open load detection requires an external pull-up resistor (RPU) connected between OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the microprocessor. The external resistor has to be selected according to the following requirements: 1) no false open load indication when load is connected: in this case we have to avoid VOUT to be higher than VOlmin; this results in the following condition VOUT=(VPU/(RL+RPU))RL<VOlmin. 2) no misdetection when load is disconnected: in this case the VOUT has to be higher than VOLmax; this results in the following condition RPU<(VPU–VOLmax)/ IL(off2). Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pull-up resistor RPU should be connected to a supply that is switched OFF when the module is in standby. The values of VOLmin, VOLmax and IL(off2) are available in the Electrical Characteristics section. µC I/Os PROTECTION: If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the µC I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of µC and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC I/Os. -VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and I latchup ≥ 20mA; VOHµC ≥ 4.5V 5kΩ ≤ Rprot ≤ 65kΩ. Recommended Rprot value is 10kΩ. Open Load detection in off state V batt. VPU VCC RPU INPUT DRIVER + LOGIC IL(off2) OUT + R STATUS VOL RL GROUND 9/14 VND830PEP Off State Output Current High Level Input Current TBD Input Clamp Voltage TBD Status Leakage Current TBD Status Low Output Voltage TBD 10/14 TBD Status Clamp Voltage TBD VND830PEP On State Resistance Vs Tcase On State Resistance Vs VCC TBD Openload On State Detection Threshold TBD Input High Level TBD Input Low Level TBD Input Hysteresis Voltage TBD TBD 11/14 VND830PEP Overvoltage Shutdown Openload Off State Voltage Detection Threshold TBD Turn-on Voltage Slope TBD ILIM Vs Tcase TBD 12/14 TBD Turn-off Voltage Slope TBD VND830PEP mm. DIM. MIN. A2 1.9 a1 0 b 0.34 c 0.23 D 10.2 E 7.4 e H L 0.4 0.46 0.32 10.4 7.6 8.8 10.1 PR EL h 0.07 IM G1 2.15 0.8 e3 G MAX. 2.22 A 1.9 IN A TYP RY PowerSSO-24™ MECHANICAL DATA 0.55 N 0.1 0.06 10.5 0.4 0.85 10º X 3.9 4.3 Y 6.1 6.5 13/14 VND830PEP Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 2003 STMicroelectronics - Printed in ITALY- All Rights Reserved. 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