FDZ202P P-Channel 2.5V Specified PowerTrench BGA MOSFET General Description Features Combining Fairchild’s advanced 2.5V specified PowerTrench process with state of the art BGA packaging, the FDZ202P minimizes both PCB space This BGA MOSFET embodies a and RDS(ON). breakthrough in packaging technology which enables the device to combine excellent thermal transfer characteristics, high current handling capability, ultralow profile packaging, low gate charge, and low RDS(ON). • –5.5 A, –20 V. RDS(ON) = 45 mΩ @ VGS = –4.5 V RDS(ON) = 75 mΩ @ VGS = –2.5 V • Occupies only 5 mm2 of PCB area: only 55% of the area of SSOT-6 • Ultra-thin package: less than 0.80 mm height when mounted to PCB Applications • Outstanding thermal transfer characteristics: 4 times better than SSOT-6 • Battery management • Load switch • Ultra-low Qg x RDS(ON) figure-of-merit • Battery protection • High power and current handling capability D D S S S G S S D D D S Pin 1 F202 Pin 1 D Bottom Top Absolute Maximum Ratings Symbol VDSS VGSS ID PD TJ, TSTG G D TA=25oC unless otherwise noted Parameter Ratings Units Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous (Note 1a) – Pulsed Power Dissipation (Steady State) (Note 1a) Operating and Storage Junction Temperature Range –20 ±12 –5.5 –20 2 –55 to +150 V V A W °C 64 8 0.7 °C/W °C/W °C/W Thermal Characteristics RθJA RθJB RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Ball Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) (Note 1) Package Marking and Ordering Information Device Marking 202P 2004 Fairchild Semiconductor Corporation Device FDZ202P Reel Size 7’’ Tape width 8mm Quantity 3000 units FDZ202P Rev. D2 (W) FDZ202P January 2004 Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Min VGS = 0 V, ID = –250 µA ID = –250 µA, Referenced to 25°C –20 Typ Max Units –17 V mV/°C Off Characteristics BVDSS ∆BVDSS ∆TJ IDSS IGSSF IGSSR Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate–Body Leakage, Forward Gate–Body Leakage, Reverse On Characteristics –1 –100 100 µA nA nA –0.9 3 –1.5 V mV/°C VGS= –4.5 V, ID= –5.5 A VGS= –2.5 V, ID= –4.0 A VGS= –4.5 V, ID= –5.5 A, TJ=125°C VDS = –5 V, ID = –5.5 A 37 57 50 15 45 75 65 mΩ VDS = –10 V, f = 1.0 MHz 884 pF 258 pF 103 pF VDS = –16 V, VGS = –12 V, VGS = 12 V, VGS = 0 V VDS = 0 V VDS = 0 V (Note 2) VDS = VGS, ID = –250 µA ID = –250 µA, Referenced to 25°C VGS(th) ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance gFS Forward Transconductance –0.6 S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time V GS = 0 V, (Note 2) VDD = –6 V, VGS = –4.5 V, ID = –1 A, RGEN = 6 Ω 12 22 ns 9 18 ns td(off) Turn–Off Delay Time 36 58 ns tf Turn–Off Fall Time 24 38 ns Qg Total Gate Charge 9 13 nC Qgs Gate–Source Charge Qgd Gate–Drain Charge VDS = –10 V, VGS = –4.5 V ID = –5.5 A, 2 nC 3 nC Drain–Source Diode Characteristics and Maximum Ratings IS VSD trr Qrr Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward VGS = 0 V, IS = –1.7 A Voltage Diode Reverse Recovery Time IF = –5.5 A, diF/dt = 100 A/µs Diode Reverse Recovery Charge –0.76 (Note 2) –1.7 –1.2 25 26 A V nS nC Notes: 1. RθJA is determined with the device mounted on a 1 in² 2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. The thermal resistance from the junction to the circuit board side of the solder ball, RθJB, is defined for reference. For RθJC, the thermal reference point for the case is defined as the top surface of the copper chip carrier. RθJC and RθJB are guaranteed by design while RθJA is determined by the user's board design. a) 64°C/W when mounted on a 1in2 pad of 2 oz copper, 1.5” x 1.5” x 0.062” thick PCB b) 128°C/W when mounted on a minimum pad of 2 oz copper Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDZ202P Rev D2 (W) FDZ202P Electrical Characteristics FDZ202P Dimensional Outline and Pad Layout FDZ202P Rev D2 (W) FDZ202P Typical Characteristics 2 VGS = -4.5V -3.0V -ID, DRAIN CURRENT (A) -3.5V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 20 -2.5V 15 10 -2.0V 5 1.8 VGS = -2.5V 1.6 1.4 -3.0V 1.2 -3.5V -4.0V 0.8 0 0 1 2 3 0 4 5 Figure 1. On-Region Characteristics. 15 20 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.18 1.6 ID = -5.5A VGS = -4.5V RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 10 -ID, DRAIN CURRENT (A) -VDS, DRAIN-SOURCE VOLTAGE (V) 1.4 1.2 1 0.8 0.6 ID = -2.8 A 0.14 0.1 TA = 125oC 0.06 TA = 25oC 0.02 -50 -25 0 25 50 75 100 125 150 1.5 2 o TJ, JUNCTION TEMPERATURE ( C) 2.5 3 3.5 4 4.5 5 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 15 25oC -IS, REVERSE DRAIN CURRENT (A) TA = -55oC VDS = -5V -ID, DRAIN CURRENT (A) -4.5V 1 125oC 10 5 VGS = 0V 10 TA = 125oC 1 25oC 0.1 -55oC 0.01 0.001 0.0001 0 0.5 1 1.5 2 2.5 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 3 0 0.2 0.4 0.6 0.8 1 1.2 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDZ202P Rev D2 (W) FDZ202P Typical Characteristics 1600 ID = -5.5A VDS = -5V f = 1MHz VGS = 0 V -10V 4 CAPACITANCE (pF) -VGS, GATE-SOURCE VOLTAGE (V) 5 -15V 3 2 1200 1 CISS 800 COSS 400 CRSS 0 0 0 2 4 6 8 10 0 12 5 Figure 7. Gate Charge Characteristics. 15 20 Figure 8. Capacitance Characteristics. 100 P(pk), PEAK TRANSIENT POWER (W) 50 RDS(ON) LIMIT 1ms 10ms 10 100ms 1s 1 DC VGS = -4.5V SINGLE PULSE R JA = 128oC/W 0.1 TA = 25oC 0.01 0.1 1 10 S IN G LE P U LS E R πJA = 128°C /W T A = 25°C 40 30 20 10 0 0.001 100 VDS, DRAIN-SOURCE VOLTAGE (V) 0.01 0.1 1 10 100 1000 t 1 , TIM E (sec) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE ID, DRAIN CURRENT (A) 10 -VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) + RθJA RθJA = 128 °C/W 0.2 0.1 0.1 P(pk) t1 0.05 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 0.02 0.01 SINGLE PULSE 0.01 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDZ202P Rev D2 (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FACT Quiet Series™ ActiveArray™ FAST Bottomless™ FASTr™ CoolFET™ FPS™ CROSSVOLT™ FRFET™ DOME™ GlobalOptoisolator™ EcoSPARK™ GTO™ E2CMOSTM HiSeC™ EnSignaTM I2C™ FACT™ ImpliedDisconnect™ Across the board. Around the world.™ The Power Franchise™ Programmable Active Droop™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench QFET QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ SILENT SWITCHER SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I7