FAIRCHILD FDZ2553N

FDZ2553N
Monolithic Common Drain N-Channel 2.5V Specified PowerTrench BGA MOSFET
General Description
Features
Combining Fairchild’s advanced 2.5V specified
PowerTrench process with state-of-the-art BGA
packaging, the FDZ2553N minimizes both PCB space
and RDS(ON). This Monolithic Common Drain BGA
MOSFET embodies a breakthrough in packaging
technology which enables the device to combine
excellent thermal transfer characteristics, high current
handling capability, ultra-low profile packaging, low gate
charge, and low RDS(ON).
• 9.6 A, 20 V.
RDS(ON) = 14 mΩ @ VGS = 4.5 V
RDS(ON) = 20 mΩ @ VGS = 2.5 V
• Occupies only 0.10 cm2 of PCB area:
1/3 the area of SO-8.
• Ultra-thin package: less than 0.80 mm height when
mounted to PCB.
Applications
• Outstanding thermal transfer characteristics:
significantly better than SO-8.
• Battery management
• Load switch
• Ultra-low Qg x RDS(ON) figure-of-merit
• Battery protection
• High power and current handling capability
Pin 1
D
D
D
S
S
S
G
S
S
S
S
S
G
S
S
D
D
D
G
Q2
PD
TJ, TSTG
Top
S
TA=25oC unless otherwise noted
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous
(Note 1a)
– Pulsed
Power Dissipation (Steady State)
(Note 1a)
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA
RθJB
RθJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Ball
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
(Note 1)
Package Marking and Ordering Information
Device Marking
2553N
2003 Fairchild Semiconductor Corporation
Q2
G
Absolute Maximum Ratings
Symbol
Q1
D
Q1
Bottom
VDSS
VGSS
ID
S
Pin 1
Device
FDZ2553N
Reel Size
7’’
Ratings
20
±12
9.6
20
2.1
–55 to +150
60
6.3
0.6
Tape width
12mm
Units
V
V
A
W
°C
°C/W
Quantity
3000 units
FDZ2553N Rev D2 (W)
FDZ2553N
February 2003
Symbol
Parameter
Off Characteristics
BVDSS
∆BVDSS
∆TJ
IDSS
IGSSF
IGSSR
TA = 25°C unless otherwise noted
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
On Characteristics
Test Conditions
VGS = 0 V,
ID = 250 µA
ID = 250 µA, Referenced to 25°C
VDS = 16 V,
VGS = 12 V,
VGS = –12 V,
Min
Typ
Max Units
20
V
mV/°C
14
1
100
–100
µA
nA
nA
0.9
–3
1.5
V
mV/°C
11
15
15
14
20
20
mΩ
VGS = 0 V
VDS = 0 V
VDS = 0 V
(Note 2)
VGS(th)
∆VGS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID(on)
gFS
On–State Drain Current
Forward Transconductance
VDS = VGS,
ID = 250 µA
ID = 250 µA, Referenced to 25°C
VGS = 4.5 V,
ID = 9.6 A
VGS = 2.5 V,
ID = 7.9 A
VGS = 4.5 V, ID = 9.6 A, TJ=125°C
VGS = 4.5 V,
VDS = 5 V
VDS = 5 V,
ID = 9.6 A
0.6
10
45
A
S
1299
pF
317
pF
166
pF
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
VDS = 10 V,
f = 1.0 MHz
V GS = 0 V,
(Note 2)
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
td(off)
Turn–Off Delay Time
29
46
ns
tf
Turn–Off Fall Time
11
20
ns
Qg
Total Gate Charge
12
17
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
VDD = 10 V,
VGS = 4.5 V,
VDS = 10 V,
VGS = 4.5 V
ID = 1 A,
RGEN = 6 Ω
ID = 9.6 A,
9.0
18
ns
11
20
ns
nC
3.2
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
VSD
trr
Qrr
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
VGS = 0 V, IS = 1.7 A
Voltage
Diode Reverse Recovery Time
IF = 9.6A,
diF/dt = 100 A/µs
Diode Reverse Recovery Charge
(Note 2)
nC
2.3
0.7
1.7
1.2
A
V
21
nS
13
nC
Notes:
1. RθJA is determined with the device mounted on a 1 in² 2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. The thermal resistance from the junction to
the circuit board side of the solder ball, RθJB, is defined for reference. For RθJC, the thermal reference point for the case is defined as the top surface of the
copper chip carrier. RθJC and RθJB are guaranteed by design while RθJA is determined by the user'
s board design.
(a). RθJA = 60°C/W when mounted on a 1in2 pad of 2 oz copper, 1.5” x 1.5” x 0.062” thick PCB
(b). RθJA = 108°C/W when mounted on a minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDZ2553N Rev D2 (W)
FDZ2553N
Electrical Characteristics
FDZ2553N
Dimensional Outline and Pad Layout
FDZ2553N Rev D2 (W)
FDZ2553N
Typical Characteristics
40
1.6
VGS=4.5V
ID, DRAIN CURRENT (A)
3.5V
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
3.0V
2.5V
30
2.0V
20
10
0
VGS = 2.5V
1.4
3.0V
1.2
3.5V
4.0V
0.8
0
0.5
1
1.5
2
0
10
VDS, DRAIN-SOURCE VOLTAGE (V)
30
40
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.045
ID = 9.6A
VGS = 4.5V
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
1.6
20
ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
1.4
1.2
1
0.8
0.6
ID = 4.8 A
0.035
TA = 125oC
0.025
TA = 25oC
0.015
0.005
-50
-25
0
25
50
75
100
125
150
1
2
o
Figure 3. On-Resistance Variation with
Temperature.
IS, REVERSE DRAIN CURRENT (A)
25oC
TA = -55oC
VDS = 5V
o
125 C
30
4
5
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
40
3
VGS, GATE TO SOURCE VOLTAGE (V)
TJ, JUNCTION TEMPERATURE ( C)
ID, DRAIN CURRENT (A)
4.5V
1
20
10
VGS = 0V
10
1
TA = 125oC
0.1
25oC
-55oC
0.01
0.001
0.0001
0
0.5
1
1.5
2
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
2.5
0
0.2
0.4
0.6
0.8
1
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDZ2553N Rev D2 (W)
FDZ2553N
Typical Characteristics
2000
ID = 9.6A
VDS = 5V
f = 1MHz
VGS = 0 V
10V
4
CAPACITANCE (pF)
VGS, GATE-SOURCE VOLTAGE (V)
5
15V
3
2
1
1500
CISS
1000
COSS
500
CRSS
0
0
2
4
6
8
10
12
0
14
0
5
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
P(pk), PEAK TRANSIENT POWER (W)
ID, DRAIN CURRENT (A)
20
50
RDS(ON) LIMIT
1ms
10ms
10
100ms
1s
10s
1
DC
VGS = 4.5V
SINGLE PULSE
RθJA = 108oC/W
TA = 25oC
0.1
1
10
SINGLE PULSE
RθJA = 108°C/W
TA = 25°C
40
30
20
10
0.01
0
0.01
100
0.1
1
10
100
1000
t1, TIME (sec)
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
15
Figure 8. Capacitance Characteristics.
100
0.1
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) * RθJA
RθJA = 108 °C/W
0.2
0.1
0.1
P(pk)
0.05
t1
0.02
0.01
0.01
SINGLE PULSE
0.001
0.001
0.01
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDZ2553N Rev D2 (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
FACT™
ActiveArray™
FACT Quiet Series™
Bottomless™
FASTâ
CoolFET™
FASTr™
CROSSVOLT™ FRFET™
DOME™
GlobalOptoisolator™
EcoSPARK™
GTO™
E2CMOSTM
HiSeC™
EnSignaTM
I2C™
Across the board. Around the world.™
The Power Franchise™
Programmable Active Droop™
ImpliedDisconnect™ PACMAN™
POP™
ISOPLANAR™
Power247™
LittleFET™
PowerTrenchâ
MicroFET™
QFET™
MicroPak™
QS™
MICROWIRE™
QT Optoelectronics™
MSX™
Quiet Series™
MSXPro™
RapidConfigure™
OCX™
RapidConnect™
OCXPro™
SILENT SWITCHERâ
OPTOLOGICâ
SMART START™
OPTOPLANAR™
SPM™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogicâ
TruTranslation™
UHC™
UltraFETâ
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
2. A critical component is any component of a life
1. Life support devices or systems are devices or
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I2