FDM2509NZ Monolithic Common Drain N-Channel 2.5V Specified PowerTrench MOSFET General Description Features This dual N-Channel MOSFET has been designed using Fairchild Semiconductor’s advanced Power Trench process to optimize the RDS(ON) @ VGS = 2.5v on special MicroFET lead frame with all the drains on one side of the package. • 8.7 A, 20 V Applications • Low Profile – 0.8mm maximum – in the new package RDS(ON) = 18 mΩ @ VGS = 4.5 V RDS(ON) = 24 mΩ @ VGS = 2.5 V • ESD protection diode (note 3) MicroFET 2x5 mm • Li-Ion Battery Pack PIN 1 S1 S1 G1 S2 S2 G2 Drain-Source Voltage Gate-Source Voltage ID Drain Current S2 5 S2 6 Q2 3 G1 2 S1 Q1 1 S1 TA=25oC unless otherwise noted – Continuous – Pulsed Power Dissipation (Steady State) (Note 1a) (Note 1a) (Note 1b) TJ, TSTG 4 Bottom Drain Contact Parameter VDSS VGSS PD G2 MLP 2x5 Absolute Maximum Ratings Symbol Bottom Drain Contact Operating and Storage Junction Temperature Range Ratings Units 20 V V ±12 8.7 30 2.2 W 0.8 –55 to +150 °C 55 °C/W A Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient RθJC Thermal Resistance, Junction-to-Case (Drain) (Note 1a) 2 Package Marking and Ordering Information Device Marking 2509Z 2006 Fairchild Semiconductor Corporation Device FDM2509NZ Reel Size 7’’ Tape width 12mm Quantity 3000 units FDM2509NZ Rev C2 FDM2509NZ February 2006 Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS ∆BVDSS ∆TJ IDSS IGSS Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate–Body Leakage, On Characteristics VGS = 0 V, ID = 250 µA 20 ID = 250 µA, Referenced to 25°C V 12 mV/°C 1 ±10 µA µA 0.9 –3 1.5 V mV/°C VGS = 4.5 V, ID = 8.7 A ID = 8.5 A VGS = 4.0 V, ID = 8.1 A VGS = 3.1 V, ID = 7.6 A VGS = 2.5 V, VGS = 4.5 V, ID = 8.7 A, TJ = 125°C VDS = 5 V, ID = 8.7 A 13 13.5 15.5 18 18.4 36 18 19 21 24 25 mΩ VDS = 10 V, f = 1.0 MHz 1200 pF 320 pF pF VDS = 16 V, VGS = ±12 V, VGS = 0 V VDS = 0 V (Note 2) ID = 250 µA VDS = VGS, ID = 250 µA, Referenced to 25 C VGS(th) ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance gFS Forward Transconductance 0.6 S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss RG Reverse Transfer Capacitance Gate Resistance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time V GS = 0 V, V GS = 50mV, f = 1.0 MHz 185 2 VDD = 10 V, VGS = 4.5 V, ID = 1 A, RGEN = 6 Ω 11 20 ns 15 27 ns Ω (Note 2) td(off) Turn–Off Delay Time 27 43 ns tf Turn–Off Fall Time 12 22 ns 12 17 Qg Total Gate Charge Qgs Gate–Source Charge Qgd Gate–Drain Charge VDS = 10 V, VGS = 4.5 V ID = 8.7 A, nC 2 nC 4 nC Drain–Source Diode Characteristics and Maximum Ratings IS VSD trr Qrr Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward VGS = 0 V, IS = 1.8 A Voltage IF = 8.7 A, Diode Reverse Recovery Time Diode Reverse Recovery Charge dIF/dt = 100 A/µs 0.7 (Note 2) 1.8 1.2 A V 20 nS 6.4 nC Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 55°C/W when mounted on a 1in2 pad of 2 oz copper Scale 1 : 1 on letter size paper b) 145°C/W when mounted on a minimum pad of 2 oz copper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% 3. The diode connected between the gate and the source serves only as protection against ESD. No gate overvoltage rating is implied. FDM2509NZ Rev C2 FDM2509NZ Electrical Characteristics FDM2509NZ Typical Characteristics 30 VGS = 4.5V 2.4 2.5V 3.5V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID, DRAIN CURRENT (A) 25 3.0V 20 2.0V 15 10 5 2.2 2 VGS = 2.0V 1.8 1.6 1.4 2.5V 1.2 3.0V 0 0.25 0.5 0.75 1 1.25 0 1.5 5 10 15 20 25 30 ID, DRAIN CURRENT (A) VDS, DRAIN-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.047 1.6 ID = 8.7A VGS = 4.5V ID = 4.4A RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 4.5V 0.8 0 1.4 1.2 1 0.8 0.6 -50 -25 0 25 50 75 100 125 0.042 0.037 0.032 TA = 125oC 0.027 0.022 TA = 25oC 0.017 0.012 150 1 2 o TJ, JUNCTION TEMPERATURE ( C) 3 4 5 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 VDS = 5V TA = -55oC 25 IS, REVERSE DRAIN CURRENT (A) 30 ID, DRAIN CURRENT (A) 3.5V 1 25oC o 125 C 20 15 10 5 VGS = 0V 10 1 TA = 125oC 0.1 25oC 0.01 -55oC 0.001 0.0001 0 0.5 1 1.5 2 VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 2.5 0 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDM2509NZ Rev C2 FDM2509NZ Typical Characteristics 5 1800 4 f = 1MHz VGS = 0 V 1600 VDS = 5V 1400 10V CAPACITANCE (pF) VGS, GATE-SOURCE VOLTAGE (V) ID = 8.7A 15V 3 2 Ciss 1200 1000 800 600 Coss 400 1 200 0 Crss 0 0 3 6 9 12 15 0 4 Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics. 16 20 50 P(pk), PEAK TRANSIENT POWER (W) RDS(ON) LIMIT 100us 10 1ms 10ms 100ms 1s 1 10s DC VGS = 4.5V SINGLE PULSE RθJA = 145oC/W 0.1 TA = 25oC 0.01 0.1 1 10 100 SINGLE PULSE RθJA = 145°C/W TA = 25°C 40 30 20 10 0 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 12 Figure 8. Capacitance Characteristics. 100 ID, DRAIN CURRENT (A) 8 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) * RθJA RθJA =145 °C/W 0.2 0.1 P(pk) 0.1 t1 0.05 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 0.02 0.01 SINGLE PULSE 0.01 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDM2509NZ Rev C2 FDM2509NZ Dimensional Outline and Pad Layout FDM2509NZ Rev C2 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FAST® ActiveArray™ FASTr™ Bottomless™ FPS™ Build it Now™ FRFET™ CoolFET™ GlobalOptoisolator™ CROSSVOLT™ GTO™ DOME™ HiSeC™ EcoSPARK™ I2C™ E2CMOS™ i-Lo™ EnSigna™ ImpliedDisconnect™ FACT™ IntelliMAX™ FACT Quiet Series™ Across the board. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I18