FAIRCHILD FDMA8884

Single N-Channel Power Trench® MOSFET
30 V, 6.5 A, 23 mΩ
Features
General Description
„ Max rDS(on) = 23 mΩ at VGS = 10 V, ID = 6.5 A
This N-Channel MOSFET is produced using Fairchild
Semiconductor‘s advanced Power Trench® process that has
been optimized for rDS(on) switching performance.
„ Max rDS(on) = 30 mΩ at VGS = 4.5 V, ID = 6.0 A
„ High performance trench technology for extremely low rDS(on)
„ Fast switching speed
Application
„ RoHS Compliant
„ Primary Switch
Pin 1
D
D
G
Drain
Bottom Drain Contact
D
D
D
D
G
S
Source
S
D
D
MicroFET 2X2 (Bottom View)
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
(Note 3)
Drain Current -Continuous (Package limited) TC = 25 °C
ID
TA = 25 °C
-Continuous
TJ, TSTG
Units
V
±20
V
8.0
(Note 1a)
-Pulsed
PD
Ratings
30
6.5
A
25
Power Dissipation
(Note 1a)
1.9
Power Dissipation
(Note 1b)
0.7
Operating and Storage Junction Temperature Range
-55 to +150
W
°C
Thermal Characteristics
RθJA
Thermal Resistance, Junction to Ambient
(Note 1a)
65
RθJA
Thermal Resistance, Junction to Ambient
(Note 1b)
180
°C/W
Package Marking and Ordering Information
Device Marking
884
Device
FDMA8884
©2012 Fairchild Semiconductor Corporation
FDMA8884 Rev.C3
Package
MicroFET 2x2
1
Reel Size
7 ’’
Tape Width
12 mm
Quantity
3000 units
www.fairchildsemi.com
FDMA8884 N-Channel Power Trench® MOSFET
April 2012
FDMA8884
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
IGSS
Gate to Source Leakage Current, Forward VGS = 20 V, VDS = 0 V
30
V
15
mV/°C
1
μA
100
nA
3.0
V
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
VGS = 10 V, ID = 6.5 A
19
23
rDS(on)
Static Drain to Source On Resistance
VGS = 4.5 V, ID = 6.0 A
25
30
VGS = 10 V, ID = 6.5 A, TJ = 125 °C
25
30
VDD = 5 V, ID = 6.5 A
26
gFS
Forward Transconductance
1.2
1.8
-5
mV/°C
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
VDS = 15 V, VGS = 0 V,
f = 1 MHz
339
450
132
175
pF
pF
18
28
pF
Ω
1.1
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg(TOT)
VDD = 15 V, ID = 6.5 A,
VGS = 10 V, RGEN = 6 Ω
5
10
ns
1
10
ns
11
20
ns
1
10
ns
nC
Total Gate Charge
VGS = 0 V to 10 V
5.4
7.5
Total Gate Charge
VGS = 0 V to 4.5 V VDD = 15 V
ID = 6.5 A
2.7
3.7
Qgs
Total Gate Charge
Qgd
Gate to Drain “Miller” Charge
nC
1.0
nC
0.9
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 6.5 A
(Note 2)
0.86
1.2
V
16
28
ns
4
10
nC
IF = 6.5 A, di/dt = 100 A/μs
NOTES:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
RθJC is guaranteed by design while RθCA is determined by the user's board design.
a. 65 °C/W when mounted
on a 1 in2 pad of 2 oz copper.
b. 180 °C/W when mounted on a
minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
©2012 Fairchild Semiconductor Corporation
FDMA8884 Rev.C3
2
www.fairchildsemi.com
FDMA8884 N-Channel Power Trench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
25
3.5
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
VGS = 10 V
VGS = 6 V
20
VGS = 4.5 V
15
VGS = 4 V
VGS = 3.5 V
10
5
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0
0.4
0.8
1.2
1.6
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
3.0
VGS = 3.5 V
2.5
VGS = 4 V
2.0
VGS = 4.5 V
1.5
1.0
0
VDS, DRAIN TO SOURCE VOLTAGE (V)
15
20
25
80
ID = 6.5 A
VGS = 10 V
1.4
rDS(on), DRAIN TO
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
10
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.5
1.3
1.2
1.1
1.0
0.9
0.8
0.7
-75
-50
-25
0
25
50
75
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
60
ID = 6.5 A
40
TJ = 125 oC
20
TJ = 25 oC
0
100 125 150
TJ, JUNCTION TEMPERATURE (oC)
2
4
6
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs Junction Temperature
Figure 4. On-Resistance vs Gate to
Source Voltage
25
30
20
IS, REVERSE DRAIN CURRENT (A)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
ID, DRAIN CURRENT (A)
5
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
VDS = 5 V
15
TJ = 150 oC
10
TJ = 25 oC
5
TJ = -55
0
VGS = 10 V
VGS = 6 V
0.5
2.0
1
2
3
oC
4
TJ = 150 oC
1
TJ = 25 oC
0.1
TJ = -55 oC
0.01
0.2
5
VGS, GATE TO SOURCE VOLTAGE (V)
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
©2012 Fairchild Semiconductor Corporation
FDMA8884 Rev.C3
VGS = 0 V
10
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
3
www.fairchildsemi.com
FDMA8884 N-Channel Power Trench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
FDMA8884 N-Channel Power Trench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
VGS, GATE TO SOURCE VOLTAGE (V)
10
500
ID = 6.5 A
Ciss
VDD = 10 V
CAPACITANCE (pF)
8
VDD = 15 V
6
VDD = 20 V
4
2
0
100
Coss
f = 1 MHz
VGS = 0 V
0
1
2
3
4
5
Qg, GATE CHARGE (nC)
1
10
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain
to Source Voltage
30
P(PK), PEAK TRANSIENT POWER (W)
200
10
ID, DRAIN CURRENT (A)
Crss
10
0.1
6
100 μs
1
0.1
THIS AREA IS
LIMITED BY rDS(on)
10 ms
SINGLE PULSE
TJ = MAX RATED
100 ms
1s
1 ms
RθJA = 180 oC/W
10 s
DC
TA = 25 oC
0.01
0.01
0.1
1
10
100
SINGLE PULSE
RθJA = 180 oC/W
100
TA = 25 oC
10
1
0.5 -4
10
-3
10
-2
10
-1
10
1
10
100
3
10
t, PULSE WIDTH (sec)
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 9. Forward Bias Safe
Operating Area
Figure 10. Single Pulse Maximum
Power Dissipation
2
DUTY CYCLE-DESCENDING ORDER
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
SINGLE PULSE
o
RθJA = 180 C/W
0.01
0.005
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 11. Junction-to-Ambient Transient Thermal Response Curve
Figure 12.
©2012 Fairchild Semiconductor Corporation
FDMA8884 Rev.C3
4
www.fairchildsemi.com
2.000
0.10 C
1.00
6
2X
4
1.35
0.66
2.30
1.05
2.000
NO DRAIN OR GATE
TRACES ALLOWED IN
THIS AREA
(0.47)
0.10 C
PIN#1 LOCATION
1
2X
3
0.40 TYP
0.65 TYP
RECOMMENDED LAND PATTERN OPT 1
0.8 MAX
0.10 C
(0.20)
0.08 C
0.05
0.00
C
SEATING
PLANE
1.00
6
(0.30)
PIN #1 IDENT
4
1.000
0.800
1
0.33
0.20
3
1.35
0.66 2.30
1.05
(0.56)
1.05
0.95
(0.47)
1
6
0.65 TYP
4
0.65
0.25~0.35
1.30
0.10
0.05
3
0.40 TYP
RECOMMENDED LAND PATTERN OPT 2
C A B
C
A. DOES NOT FULLY CONFORM TO JEDEC REGISTRATION
MO-229 DATED AUG/2003
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994
D. DRAWING FILENAME: MKT-MLP06Lrev2.
©2012 Fairchild Semiconductor Corporation
FDMA8884 Rev.C3
5
www.fairchildsemi.com
FDMA8884 N-Channel Power Trench® MOSFET
Dimensional Outline and Pad Layout
tm
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY
PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY
THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used here in:
1. Life support devices or systems are devices or systems which, (a) are
intended for surgical implant into the body or (b) support or sustain life,
and (c) whose failure to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably
expected to result in a significant injury of the user.
2.
A critical component in any component of a life support, device, or
system whose failure to perform can be reasonably expected to cause
the failure of the life support device or system, or to affect its safety or
effectiveness.
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Definition
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
No Identification Needed
Full Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I61
©2012 Fairchild Semiconductor Corporation
FDMA8884 Rev.C3
6
www.fairchildsemi.com
FDMA8884 N-Channel Power Trench® MOSFET
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