FREESCALE MC9RS08LE4

Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MC9RS08LE4
Rev. 2, 11/2008
MC9RS08LE4
TBD
28 W-SOIC
Case 751F
MC9RS08LE4
Features:
• 8-Bit RS08 Central Processor Unit (CPU)
– Up to 20 MHz CPU at 2.7 V to 5.5 V across temperature
range of –40°C to 85°C
– Subset of HC08 instruction set with added BGND
instructions
• On-Chip Memory
– 4 KB flash memory read/program/erase over full
operating voltage and temperature
– 256-byte random-access memory (RAM)
– Security circuitry to prevent unauthorized access to flash
memory contents
• Power-Saving Modes
– Wait and stop
• Clock Source Options
– Oscillator (XOSC) — Loop-control Pierce oscillator;
crystal or ceramic resonator range of 31.25 kHz to
39.0625 kHz or 1 MHz to 20 MHz
– Internal Clock Source (ICS) — Internal clock source
module containing a frequency-locked-loop (FLL)
controlled by internal or external reference; precision
trimming of internal reference allows 0.2% resolution
and 2% deviation over temperature and voltage;
supports bus frequencies up to 10 MHz
• System Protection
– Watchdog computer operating properly (COP) reset
with option to run from dedicated 1 kHz internal clock
source or bus clock
– Low-voltage detection with reset or interrupt
– Selectable trip points
– Illegal opcode detection with reset
– Illegal address detection with reset
– Flash memory block protection
• Development Support
– Single-wire background debug interface
– Breakpoint capability to allow single breakpoint setting
during in-circuit debugging
• Peripherals
– LCD — Up to 8 × 14 or 4 × 18 segments; compatible
with 5 V or 3 V LCD glass displays using on-chip
resistor bias network; functional in wait, stop modes for
very low power LCD operation; frontplane and
backplane pins multiplexed with GPIO functions;
selectable frontplane and backplane configurations
– ADC — 8-channel, 10-bit resolution; 2.5 μs conversion
time; automatic compare function; 1.7 mV/°C
temperature sensor; internal bandgap reference channel;
operation in stop; fully functional from 2.7 V to 5.5 V.
– TPM — Two 2-channel 16-bit timer/pulse-width
modulator (TPM) modules; selectable input capture,
output compare, or buffered edge- or center-aligned
PWM on each channel
– SCI — One serial communications interface module
with optional 13-bit break; LIN extensions
– KBI — 8-pin keyborad interrupt module
• Input/Output
– 26 GPIOs including 1 output-only pin and 1 input-only
pin
– Hysteresis and configurable pullup device on all input
pins; configurable slew rate and drive strength on all
output pins
• Package Options
– 28-pin SOIC
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2008. All rights reserved.
Table of Contents
1
2
3
MCU Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
3.2 Parameter Classification . . . . . . . . . . . . . . . . . . . . . . . . .5
3.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . .6
3.4 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . .6
3.5 ESD Protection and Latch-Up Immunity . . . . . . . . . . . . .7
3.6 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3.7 Supply Current Characteristics . . . . . . . . . . . . . . . . . . .14
4
5
3.8 External Oscillator (XOSC) Characteristics . . . . . . . . .
3.9 Internal Clock Source (ICS) Characteristics . . . . . . . .
3.10 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.10.1 Control Timing . . . . . . . . . . . . . . . . . . . . . . . . .
3.10.2 TPM Module Timing . . . . . . . . . . . . . . . . . . . . .
3.11 ADC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . .
3.12 Flash Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . .
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mechanical Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
17
17
17
18
19
21
23
24
Revision History
To provide the most up-to-date information, the revision of our documents on the World Wide Web will
be the most current. Your printed copy may be an earlier revision. To verify you have the latest information
available, refer to:
http://freescale.com/
The following revision history table summarizes changes contained in this document.
Revision
Date
Description of Changes
1
10/6/2008
Initial public release.
2
11/3/2008
In Table 8, updated the WIDD, added the maximum of RIDD and SIDD at 5 V and deleted RTI
adder from stop with 32.768 kHz crystal external clock source reference enabled.
Added maximum of IOLT in Table 7.
Related Documentation
Find the most current versions of all documents at: http://www.freescale.com
Reference Manual
(MC9RS08LE4RM)
Contains extensive product information including modes of operation, memory,
resets and interrupts, register definition, port pins, CPU, and all module
information.
MC9RS08LE4 MCU Data Sheet, Rev. 2
2
Freescale Semiconductor
1
MCU Block Diagram
The block diagram, Figure 1, shows the structure of the MC9RS08LE4 MCU.
8-CH 10-BIT
ANALOG-TO-DIGITAL
CONVERTER(ADC)
8-BIT KEYBOARD
ADP[7:0]
PTA1/TxD/LCD14
KBIP[0:7]
INTERRUPT(KBI)
RS08 CORE
SERIAL COMMUNICATION
INTERFACE (SCI)
BDC
CPU
2-CH TIMER/PWM
MODULE (TPM2)
RS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
COP
TxD
RxD
PTA2/TPM2CH1/LCD13
PTA3/TPM2CH0/LCD12
PTA4/KBIP0/LCD11
PTA5/KBIP1/LCD10
TPM2CH0
TPM2CH1
TCLK
PTA6/KBIP2/LCD9
PTA7/KBIP3/LCD8
PTB0/TCLK/RESET/VPP
RESET
PTB1/BKGD/MS
2-CH TIMER/PWM
RTI
MODULE (TPM1)
WAKEUP
PTA0/RxD/LCD15
PORT A
VREFH
VREFL
VDDAD
VSSAD
TPM1CH0
TPM1CH1
TCLK
LVD
PORT B
VDD
VSS
PTB2/ADP0/LCD21
PTB3/ADP1/LCD20
PTB4/ADP2/LCD19
PTB5/ADP3/LCD18
PTB6/TPM1CH0/LCD17
USER FLASH
4,096 BYTES
USER RAM
256 BYTES
PTB7/TPM1CH1/LCD16
PORT C
VPP
XTAL
EXTAL
20 MHz INTERNAL CLOCK
SOURCE (ICS)
VSS
PTC1/XTAL
PTD0/KBIP4/LCD0
PTD1/KBIP5/LCD1
VLL3
LIQUID CRYSTAL DISPLAY
DRIVER (LCD)
LCD[16:21]
PORT D
LCD[8:15]
LOW-POWER OSCILLATOR
31.25 kHz to 39.0625 kHz
1 MHz to 20 MHz
(XOSC)
VDD
PTC0/EXTAL
PTD2/KBIP6/LCD2
PTD3/KBIP7/LCD3
PTD4/ADP4/LCD4
PTD5/ADP5/LCD5
LCD[0:7]
VOLTAGE REGULATOR
PTD6/ADP6/LCD6
PTD7/ADP7/LCD7
NOTES:
1. PTB0/TCLK/RESET/VPP is an input-only pin when used as port pin
2. PTB1/BKGD/MS is an output-only pin
Figure 1. MC9RS08LE4 Block Diagram
2
Pin Assignments
This section shows the pin assignments in the packages available for the MC9RS08LE4.
MC9RS08LE4 MCU Data Sheet, Rev. 2
Freescale Semiconductor
3
Table 2-1. Pin Availability by Package Pin-Count
Pin Number
28
<-- Lowest Priority
Port Pin
Alt 1
--> Highest
Alt 2
Alt 3
1
PTD3
KBIP7
LCD3
2
PTD2
KBIP6
LCD2
3
PTD1
KBIP5
LCD1
4
PTD0
KBIP4
LCD0
5
VDD
6
VSS
7
PTC0
EXTAL
8
PTC1
XTAL
9
PTB0
RESET
VPP
10
PTB1
BKGD
MS
11
PTB2
ADP0
LCD21
12
PTB3
ADP1
LCD20
13
PTB4
ADP2
LCD19
14
PTB5
ADP3
LCD18
15
PTB6
TPM1CH0
LCD17
16
PTB7
TPM1CH1
LCD16
TCLK
17
PTA0
RxD
LCD15
18
PTA1
TxD
LCD14
19
PTA2
TPM2CH1
LCD13
20
PTA3
TPM2CH0
LCD12
21
PTA4
KBIP0
LCD11
22
PTA5
KBIP1
LCD10
23
PTA6
KBIP2
LCD9
24
PTA7
KBIP3
LCD8
25
PTD7
ADP7
LCD7
26
PTD6
ADP6
LCD6
27
PTD5
ADP5
LCD5
28
PTD4
ADP4
LCD4
MC9RS08LE4 MCU Data Sheet, Rev. 2
4
Freescale Semiconductor
Introduction
PTD3/KBIP7/LCD3
PTD2/KBIP6/LCD2
PTD1/KBIP5/LCD1
PTD0/KBIP4/LCD0
VDD
VSS
PTC0/EXTAL
PTC1/XTAL
PTB0/TCLK/RESET/VPP
PTB1/BKGD/MS
PTB2/ADP0/LCD21
PTB3/ADP1/LCD20
PTB4/ADP2/LCD19
PTB5/ADP3/LCD18
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
PTD4/ADP4/LCD4
PTD5/ADP5/LCD5
PTD6/ADP6/LCD6
PTD7/ADP7/LCD7
PTA7/KBIP3/LCD8
PTA6/KBIP2/LCD9
PTA5/KBIP1/LCD10
PTA4/KBIP0/LCD11
PTA3/TPM2CH0/LCD12
PTA2/TPM2CH1/LCD13
PTA1/TxD/LCD14
PTA0/RxD/LCD15
PTB7/TPM1CH1/LCD16
PTB6/TPM1CH0/LCD17
Figure 2. MC9RS08LE4 in 28-Pin SOIC Package
3
Electrical Characteristics
3.1
Introduction
This section contains electrical and timing specifications for the MC9RS08LE4 microcontroller available
at the time of publication.
3.2
Parameter Classification
The electrical parameters shown in this supplement are guaranteed by various methods. To give the
customer a better understanding the following classification is used and the parameters are tagged
accordingly in the tables where appropriate:
Table 2. Parameter Classifications
P
Those parameters are guaranteed during production testing on each individual device.
C
Those parameters are achieved by the design characterization by measuring a statistically relevant
sample size across process variations.
T
Those parameters are achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted. All values shown in the typical column are within this
category.
D
Those parameters are derived mainly from simulations.
MC9RS08LE4 MCU Data Sheet, Rev. 2
Freescale Semiconductor
5
Absolute Maximum Ratings
NOTE
The classification is shown in the column labeled “C” in the parameter
tables where appropriate.
3.3
Absolute Maximum Ratings
Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not
guaranteed. Stress beyond the limits specified in Table 3 may affect device reliability or cause permanent
damage to the device. For functional operating conditions, refer to the remaining tables in this chapter.
This device contains circuitry protecting against damage due to high static voltage or electrical fields;
however, it is advised that normal precautions be taken to avoid application of any voltages higher than
maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused
inputs are tied to an appropriate logic voltage level (for instance, either VSS or VDD) or the programmable
pull-up resistor associated with the pin is enabled.
Table 3. Absolute Maximum Ratings
Rating
Symbol
Value
Supply voltage
VDD
2.7 to 5.5
V
Maximum current into VDD
IDD
120
mA
Digital input voltage
VIn
–0.3 to VDD + 0.3
V
Instantaneous maximum current
Single pin limit (applies to all port pins)1, 2, 3
ID
±25
mA
Tstg
–55 to 150
°C
Storage temperature range
Unit
1
Input must be current limited to the value specified. To determine the value of the required current-limiting resistor,
calculate resistance values for positive (VDD) and negative (VSS) clamp voltages, then use the larger of the two
resistance values.
2 All functional non-supply pins are internally clamped to V
SS and VDD except the RESET/VPP pin which is internally
clamped to VSS only.
3 Power supply must maintain regulation within operating V
DD range during instantaneous and operating maximum
current conditions. If positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD
and could result in external power supply going out of regulation. Ensure external VDD load will shunt current greater
than maximum injection current. This will be the greatest risk when the MCU is not consuming power. Examples are:
if no system clock is present, or if the clock rate is very low which would reduce overall power consumption.
3.4
Thermal Characteristics
This section provides information about operating temperature range, power dissipation, and package
thermal resistance. Power dissipation on I/O pins is usually small compared to the power dissipation in
on-chip logic and voltage regulator circuits and it is user-determined rather than being controlled by the
MCU design. In order to take PI/O into account in power calculations, determine the difference between
actual pin voltage and VSS or VDD and multiply by the pin current for each I/O pin. Except in cases of
unusually high pin current (heavy loads), the difference between pin voltage and VSS or VDD will be very
small.
MC9RS08LE4 MCU Data Sheet, Rev. 2
6
Freescale Semiconductor
ESD Protection and Latch-Up Immunity
Table 4. Thermal Characteristics
Rating
Operating temperature range (packaged)
Maximum junction temperature
Thermal resistance
Single layer board 28-pin SOIC
Symbol
Value
Unit
TA
TL to TH
–40 to 85
°C
TJMAX
105
°C
θJA
70
°C/W
The average chip-junction temperature (TJ) in °C can be obtained from:
TJ = TA + (PD × θJA)
Eqn. 1
where:
TA = Ambient temperature, °C
θJA = Package thermal resistance, junction-to-ambient, °C /W
PD = Pint + PI/O
Pint = IDD × VDD, Watts chip internal power
PI/O = Power dissipation on input and output pins user determined
For most applications, PI/O << Pint and can be neglected. An approximate relationship between PD and TJ
(if PI/O is neglected) is:
PD = K ÷ (TJ + 273°C)
Eqn. 2
Solving Equation 1 and Equation 2 for K gives:
K = PD × (TA + 273°C) + θJA× (PD)2
Eqn. 3
where K is a constant pertaining to the particular part. K can be determined from Equation 3 by measuring
PD (at equilibrium) for a known TA. Using this value of K, the values of PD and TJ can be obtained by
solving equations 1 and 2 iteratively for any value of TA.
3.5
ESD Protection and Latch-Up Immunity
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions must be used to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade
Integrated Circuits. During the device qualification ESD stresses were performed for the human body
model (HBM), the machine model (MM) and the charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
MC9RS08LE4 MCU Data Sheet, Rev. 2
Freescale Semiconductor
7
DC Characteristics
specification at room temperature followed by hot temperature, unless specified otherwise in the device
specification.
Table 5. ESD and Latch-up Test Conditions
Model
Human
Body
Machine
Description
Symbol
Value
Unit
Series resistance
R1
1500
Ω
Storage capacitance
C
100
pF
Number of pulses per pin
—
3
—
Series resistance
R1
0
Ω
Storage capacitance
C
200
pF
Number of pulses per pin
—
3
—
Minimum input voltage limit
—
–2.5
V
Maximum input voltage limit
—
7.5
V
Latch-up
Table 6. ESD and Latch-Up Protection Characteristics
No.
Rating1
Symbol
Min
Max
Unit
1
Human body model (HBM)
VHBM
±2000
—
V
2
Machine model (MM)
VMM
±200
—
V
3
Charge device model (CDM)
VCDM
±500
—
V
ILAT
±1002
—
mA
ILAT
±753
—
mA
4
Latch-up current at TA = 85°C
Latch-up current at TA = 85°C
1
Parameter is achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted.
2
These pins meet JESD78A Class II (section 1.2) Level A (section 1.3) requirement of ±100 mA.
3
This pin meets JESD78A Class II (section 1.2) Level B (section 1.3) characterization to ±75 mA.
3.6
DC Characteristics
This section includes information about power supply requirements, I/O pin characteristics, and power
supply current in various operating modes.
Table 7. DC Characteristics (Temperature Range = –40 to 85°C Ambient)
Num
C
Parameter
Supply voltage (run, wait and stop modes.)
0 < fBus <10MHz
1
Minimum RAM retention supply voltage applied to VDD
2
C
3
P
4
C
Power on RESET (POR) voltage
5
C
Input high voltage (1.8 V ≤ VDD ≤ 2.3 V) (all digital
inputs)
Symbol
Min
Typical
Max
Unit
VDD
2.7
—
5.5
—
VRAM
0.81
—
—
V
VLVD
1.80
1.88
1.86
1.94
1.95
2.03
V
VPOR
0.9
—
1.7
V
0.70 × VDD
—
—
V
0.85 × VDD
—
—
V
Low-voltage Detection threshold
(VDD falling)
(VDD rising)
Input high voltage (VDD > 2.3V) (all digital inputs)
VIH
MC9RS08LE4 MCU Data Sheet, Rev. 2
8
Freescale Semiconductor
DC Characteristics
Table 7. DC Characteristics (Temperature Range = –40 to 85°C Ambient) (continued)
Num
C
Parameter
Symbol
Input low voltage (VDD > 2.3 V) (all digital inputs)
6
C
Input low voltage (1.8 V ≤ VDD ≤ 2.3 V)
VIL
(all digital inputs)
Min
Typical
Max
Unit
—
—
0.30 × VDD
V
—
—
0.30 × VDD
V
7
C
Input hysteresis (all digital inputs)
Vhys
0.06 × VDD
—
—
V
8
P
Input leakage current (per pin)
VIn = VDD or VSS, all input only pins
|IIn|
—
0.025
1.0
μA
9
P
High impedance (off-state) leakage current (per pin)
VIn = VDD or VSS, all input/output
|IOZ|
—
0.025
1.0
μA
10
P
Internal pullup/pulldown resistors2(all port pins)
RPU
20
45
65
kΩ
VOH
VDD – 0.8
—
—
—
—
—
—
V
|IOHT|
—
—
40
mA
VOL
—
—
—
—
—
—
0.8
0.8
0.8
V
IOLT
—
—
100
mA
—
—
—
—
0.2
0.8
mA
mA
—
—
7
pF
11
C
12
C
Output high voltage (port A)
IOH = –5 mA (VDD ≥ 4.5 V)
IOH = –3 mA (VDD ≥ 3 V)
IOH = –2 mA (VDD ≥ 1.8 V)
13
C
Maximum total IOH for all port pins
Output low voltage (port A)
IOL = 5 mA (VDD ≥ 4.5 V)
IOL = 3 mA (VDD ≥ 3 V)
IOL = 2 mA (VDD ≥ 1.8 V)
C
Maximum total IOL for all port pins
15
C
dc injection current3, 4, 5 ,6
VIn < VSS, VIn > VDD
Single pin limit
Total MCU limit, includes sum of all stressed pins
—
16
C
Input capacitance (all non-supply pins)
CIn
14
1
2
3
4
5
6
This parameter is characterized and not tested on each device.
Measurement condition for pull resistors: VIn = VSS for pullup and VIn = VDD for pulldown.
All functional non-supply pins are internally clamped to VSS and VDD except the RESET/VPP which is internally clamped to VSS
only
Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate
resistance values for positive and negative clamp voltages, then use the larger of the two values.
Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate
resistance values for positive and negative clamp voltages, then use the larger of the two values.
This parameter is characterized and not tested on each device.
MC9RS08LE4 MCU Data Sheet, Rev. 2
Freescale Semiconductor
9
DC Characteristics
Typical IOH vs. VOH (VDD = 5 V)
5
4.9
VOH(V)
4.8
-40C
25C
85C
4.7
4.6
4.5
4.4
-15
-10
-5
0
IOH(mA)
Figure 3. Typical IOH vs. VOH (VDD = 5 V)
Typical IOH vs. VOH (VDD = 3 V)
3.5
3
V OH(V)
2.5
-40C
25C
85C
2
1.5
1
0.5
0
-14
-12
-10
-8
-6
-4
-2
0
IOH(mA)
Figure 4. Typical IOH vs. VOH (VDD = 3 V)
MC9RS08LE4 MCU Data Sheet, Rev. 2
10
Freescale Semiconductor
DC Characteristics
Typical IOL vs. VOL (VDD = 5 V)
600
VOL(mV)
500
400
-40C
25C
85C
300
200
100
0
0
5
10
15
IOL(mA)
Figure 5. Typical IOL vs. VOL (VDD = 5 V)
Typical IOL vs. VOL (VDD = 3 V)
1200
VOL(mV)
1000
800
-40C
25C
85C
600
400
200
0
0
5
10
15
IOL(mA)
Figure 6. Typical IOL vs. VOL (VDD = 3 V)
MC9RS08LE4 MCU Data Sheet, Rev. 2
Freescale Semiconductor
11
DC Characteristics
Typical VOH vs. VDD (IOH = 2 mA)
6
VOH(V)
5
4
-40C
25C
85C
3
2
1
0
0
1
2
3
4
5
6
VDD(V)
Figure 7. Typical VOH vs. VDD (IOH = 2 mA)
Typical VOL vs. VDD (IOL = 2 mA)
250
VOL(mV)
200
-40C
25C
85C
150
100
50
0
0
1
2
3
4
5
6
VDD(V)
Figure 8. Typical VOL vs. VDD (IOL = 2 mA)
MC9RS08LE4 MCU Data Sheet, Rev. 2
12
Freescale Semiconductor
DC Characteristics
Pullup Resistor(kohm)
Typical Pullup Resistor
45
44
43
42
41
40
39
38
37
-40C
25C
85C
0
1
2
3
4
5
6
VDD(V)
Figure 9. Typical Pullup Resistor
Pulldown Resistor(kohm)
Typical Pulldown Resistor
45
44
43
42
-40C
25C
85C
41
40
39
38
37
36
0
1
2
3
4
5
6
VDD(V)
Figure 10. Typical Pulldown Resistor
MC9RS08LE4 MCU Data Sheet, Rev. 2
Freescale Semiconductor
13
Supply Current Characteristics
3.7
Supply Current Characteristics
Table 8. Supply Current Characteristics
Num
C
Parameter
Symbol
Bus Freq.
(MHz)
P
VDD (V)
Temp. (°C)
Typical
Max1
5
–40
25
85
3.78
3.81
3.83
20
3
–40
25
85
3.70
3.76
3.77
—
5
–40
25
85
0.94
0.95
0.95
—
—
—
3
–40
25
85
0.94
0.94
0.94
—
—
—
–40
25
85
932
943
947
—
—
—
3
–40
25
85
940
959
954
—
—
—
5
–40
25
85
712
714
717
—
—
—
3
–40
25
85
718
716
715
—
—
—
5
–40
25
85
1.14
1.43
3.75
15
0.61
0.88
2.96
—
—
—
10
C
Run supply
current2
1
RIDD
T
1.25
T
5
T
2
T
Wait supply
current2
2
WIDD
T
1
T
—
P
Stop mode supply
current
3
SIDD
C
—
3
–40
25
85
T
—
5
–40
25
85
119.85
128.72
131.70
—
—
—
115.28
123.86
126.60
—
—
—
ADC adder to
stop3
4
—
T
—
3
–40
25
85
T
—
5
–40
25
85
0.10
0.11
0.12
—
—
—
3
–40
25
85
0.11
0.11
0.12
—
—
—
5
T
RTI adder from
stop
with 1 kHz clock
source enabled4
—
—
Unit
mA
μA
μA
μA
μA
MC9RS08LE4 MCU Data Sheet, Rev. 2
14
Freescale Semiconductor
Supply Current Characteristics
Table 8. Supply Current Characteristics (continued)
Num
C
Parameter
T
LVI adder from
stop
(LVDE = 1 and
LVDSE = 1)
6
T
Symbol
Bus Freq.
(MHz)
VDD (V)
Temp. (°C)
Typical
Max1
—
5
–40
25
85
69.40
72.07
73.29
—
—
—
3
–40
25
85
69.74
72.19
72.67
—
—
—
—
—
Unit
μA
1
Maximum value is measured at the nominal VDD voltage times 10% tolerance. Values given here are preliminary estimates
prior to completing characterization
2
Does not include any dc loads on port pins
3
Required asynchronous ADC clock and LVD to be enabled.
4
Most customers are expecteed to find that auto-wakeup from stop can be used instead of the higher current wait mode.
Typical RIDD vs VDD (FEI, BusFreq. = 10 MHz)
4.5
RIDD(mA)
4
3.5
-40C
25C
85C
3
2.5
2
0
1
2
3
4
5
6
VDD(V)
Figure 11. Typical RIDD vs. VDD (FEI, BusFreq. = 10 MHz)
MC9RS08LE4 MCU Data Sheet, Rev. 2
Freescale Semiconductor
15
External Oscillator (XOSC) Characteristics
3.8
External Oscillator (XOSC) Characteristics
Refer to Figure 12 for crystal or resonator circuit.
Table 9. External Oscillator Specifications (Temperature Range = –40 to 85°C Ambient)
Num
1
C
D
Characteristic
Oscillator crystal or resonator (EREFS = 1)
Low range, ( IREFS = x)
High range, FLL bypassed external
(CLKS = 10, IREFS = x)
High range, FLL engaged external
(CLKS = 00, IREFS = 0)
Symbol
Min
Typical1
Max
Unit
flo
fhi_byp
32
1
—
—
38.4
5
kHz
MHz
fhi_eng
1
—
5
MHz
2
D
Load capacitors
C1
C2
See Note 2
3
D
Feedback resistor
Low range (32 kHz to 100 kHz)
High range (1 MHz to 16 MHz)
RF
10
1
D
Series resistor
Low range
Low Gain (HGO = 0)
High Gain (HGO = 1)
High range
Low Gain (HGO = 0)
High Gain (HGO = 1)
≥ 8 MHz
4 MHz
1 MHz
4
5
D
—
—
0
100
—
—
—
0
—
—
—
—
0
10
20
—
—
—
—
—
500
4
—
—
kΩ
RS
Crystal start-up time 3, 4
Low range
High range
MΩ
t
CSTL
t
CSTH
ms
Data in Typical column was characterized at 3.0 V, 25 °C or is typical recommended value.
See crystal or resonator manufacturer’s recommendation.
3 This parameter is characterized and not tested on each device.
4 Proper PC board layout procedures must be followed to achieve specifications.
1
2
XOSC
EXTAL
XTAL
RF
C1
RS
Crystal or Resonator
C2
Figure 12. Typical Crystal or Resonator Circuit
MC9RS08LE4 MCU Data Sheet, Rev. 2
16
Freescale Semiconductor
Internal Clock Source (ICS) Characteristics
3.9
Internal Clock Source (ICS) Characteristics
Table 10. ICS Frequency Specifications (Temperature Range = –40 to 85°C Ambient)
Symbol
Min
Typical1
Max
Unit
Square wave input clock frequency (EREFS = 0)
FLL bypass external (CLKS = 10)
FLL engaged external (CLKS = 00)
fextal
0
0.03125
—
—
20
5
MHz
C
Average internal reference frequency - untrimmed
fint_ut
25
31.25
41.66
kHz
C
Average internal reference frequency - trimmed
fint_t
31.25
31.25
39.0625
kHz
4
C
DCO output frequency range — untrimmed
fdco_ut
12.8
16
21.33
MHz
5
C
DCO output frequency range — trimmed
fdco_t
16
16
20
MHz
6
C
Resolution of trimmed DCO output frequency at
fixed voltage and temperature
Δfdco_res_t
—
—
±0.2
%fdco
7
C
Total deviation of trimmed DCO output frequency
over voltage and temperature
Δfdco_t
—
—
±2
%fdco
8
C
FLL acquisition time 3,2
tacquire
—
—
1
ms
CJitter
—
—
0.6
%fdco
Num
C
1
C
2
3
Characteristic
3
9
Long term Jitter of DCO output clock (averaged
over 2 ms interval)
C
Data in Typical column was characterized at 3.0 V, 25 °C or is typical recommended value.
This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or
changing from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as
the reference, this specification assumes it is already running.
3 Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f
BUS.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the FLL circuitry via VDD and VSS and variation in crystal oscillator frequency increase the CJitter percentage
for a given interval.
1
2
3.10
AC Characteristics
This section describes AC timing characteristics for each peripheral system.
3.10.1
Control Timing
Table 11. Control Timing
Num
C
1
D
2
D
3
4
5
6
1
D
D
D
C
Parameter
Symbol
Min
Typical
Max
Unit
Bus frequency (tcyc = 1/fBus)
fBus
0
—
10
MHz
Real time interrupt internal oscillator period
tRTI
700
1000
1300
μs
textrst
150
—
—
ns
tKBIPW
1.5 tcyc
—
—
ns
tKBIPWS
100
—
—
ns
tRise, tFall
—
—
11
35
—
—
ns
External RESET pulse
KBI pulse
width1
width2
KBI pulse width in
stop1
pF)3
Port rise and fall time (load = 50
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
This is the shortest pulse that is guaranteed to pass through the pin input filter circuitry. Shorter pulses may or may not be
recognized.
MC9RS08LE4 MCU Data Sheet, Rev. 2
Freescale Semiconductor
17
AC Characteristics
2
This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may
or may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.
3
Timing is shown with respect to 20% VDD and 80% VDD levels. Temperature range –40 °C to 85 °C.
textrst
RESET
Figure 13. Reset Timing
tKBIPWS
tKBIPW
KBI Pin
(rising or high level)
KBI Pin
(falling or low level)
tKBIPW
tKBIPWS
Figure 14. KBI Pulse Width
3.10.2
TPM Module Timing
Synchronizer circuits determine the shortest input pulses that can be recognized or the fastest clock that
can be used as the optional external source to the timer counter. These synchronizers operate from the
current bus rate clock.
Table 12. TPM/MTIM Input Timing
Num
C
Function
Symbol
Min
Max
Unit
1
D
External clock frequency
fTCLK
0
fBus1/4
MHz
2
D
External clock period
tTCLK
4
—
tCYC
3
D
External clock high time
tclkh
1.5
—
tCYC
4
D
External clock low time
tclkl
1.5
—
tCYC
5
D
Input capture pulse width
fICPW
1.5
—
tCYC
tTCLK
tclkh
TCLK
tclkl
Figure 15. Timer External Clock
MC9RS08LE4 MCU Data Sheet, Rev. 2
18
Freescale Semiconductor
ADC Characteristics
tICPW
TPMCHn
TPMCHn
tICPW
Figure 16. Timer Input Capture Pulse
3.11
ADC Characteristics
Figure 17. 5 Volt 10-bit ADC Operating Conditions
Symb
Min
Typical1
Max
Unit
VDDAD
1.8
—
5.5
V
Delta to VDD (VDD – VDDAD)2
ΔVDDAD
–100
0
100
mV
VSSAD)2
ΔVSSAD
–100
0
100
mV
Reference voltage high
VREFH
1.8
VDDAD
VDDAD
V
Reference voltage low
VREFL
VSSAD
VSSAD
VSSAD
V
Input voltage
VADIN
VREFL
—
VREFH
V
Input capacitance
CADIN
—
4.5
5.5
pF
Input resistance
RADIN
—
3
5
kΩ
RAS
—
—
—
—
5
10
kΩ
—
—
10
0.4
—
8.0
0.4
—
4.0
Characteristic
Conditions
Absolute
Supply voltage
Ground voltage
Analog source resistance
external to MCU
Delta to VSS (VSS –
10 bit mode
fADCK > 4MHz
fADCK < 4MHz
8 bit mode (all valid fADCK)
ADC conversion clock
frequency
High speed (ADLPC = 0)
Low power (ADLPC = 1)
fADCK
MHz
Typical values assume VDDAD = 5.0 V, Temp = 25 °C, fADCK = 1.0 MHz unless otherwise stated. Typical values are
for reference only and are not tested in production.
2
DC potential difference.
1
MC9RS08LE4 MCU Data Sheet, Rev. 2
Freescale Semiconductor
19
ADC Characteristics
SIMPLIFIED
INPUT PIN EQUIVALENT
CIRCUIT
ZADIN
SIMPLIFIED
CHANNEL SELECT
CIRCUIT
Pad
leakage
due to
input
protection
ZAS
RAS
ADC SAR
ENGINE
RADIN
+
VADIN
VAS
CAS
+
–
–
RADIN
INPUT PIN
RADIN
INPUT PIN
RADIN
INPUT PIN
CADIN
Figure 18. ADC Input Impedance Equivalency Diagram
Table 13. 10-bit ADC Characteristics (VREFH = VDDAD, VREFL = VSSAD)
Nu
m
1
2
3
4
Symb
Min
Typical1
Max
Unit
T
Supply current
ADLPC=1
ADLSMP=1
ADCO=1
IDDAD
—
133
—
μA
T
Supply current
ADLPC=1
ADLSMP=0
ADCO=1
IDDAD
—
218
—
μA
T
Supply current
ADLPC=0
ADLSMP=1
ADCO=1
IDDAD
—
327
—
μA
P
Supply current
ADLPC=0
ADLSMP=0
ADCO=1
VDDAD ≤ 5.5 V
IDDAD
—
0.582
1
mA
Supply current
Stop, reset, module off
IDDAD
—
0.011
1
μA
ADC
asynchronous
clock source
High speed (ADLPC = 0)
2
3.3
5
1.25
2
3.3
C
Characteristic
5
6
P
Conditions
Low power (ADLPC = 1)
fADACK
MHz
MC9RS08LE4 MCU Data Sheet, Rev. 2
20
Freescale Semiconductor
Flash Specifications
Table 13. 10-bit ADC Characteristics (VREFH = VDDAD, VREFL = VSSAD) (continued)
Nu
m
7
C
Characteristic
P
Conversion time
(Including
sample time)
Conditions
Symb
Short sample (ADLSMP = 0)
Long sample (ADLSMP = 1)
tADC
Short sample (ADLSMP = 0)
8
P
Sample time
Long sample (ADLSMP = 1)
9
P
Total
unadjusted
error
tADS
10-bit mode
ETUE
8-bit mode
10-bit mode
10
P
Min
Typical1
Max
—
20
—
—
40
—
—
3.5
—
—
23.5
—
—
±1
±2.5
—
±0.5
±1.0
—
±0.5
±1.0
—
±0.3
±0.5
DNL
Differential
non-linearity
8-bit mode
Unit
ADCK
cycles
ADCK
cycles
LSB2
LSB2
Monotonicity and no-missing-codes guaranteed
11
C
10-bit mode
Integral
non-linearity
8-bit mode
10-bit mode
12
P
Zero-scale error
EZS
8-bit mode
13
14
15
P
D
D
—
±0.5
±1.0
—
±0.3
±0.5
—
±0.5
±1.5
—
±0.5
±0.5
—
±0.5
±1.5
—
±0.5
±0.5
—
—
±0.5
—
—
±0.5
—
±0.2
±2.5
—
±0.1
±1
INL
Full-scale error
VADIN = VDDA
10-bit mode
Quantization
error
10-bit mode
Input leakage
error
pad leakage3 *
RAS
10 bit mode
EFS
8-bit mode
EQ
8-bit mode
EIL
8 bit mode
LSB2
LSB2
LSB2
LSB2
LSB2
Typical values assume VDDAD = 5.0 V, Temp = 25 °C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for
reference only and are not tested in production.
2
1 LSB = (VREFH – VREFL)/2N
3
Based on input pad leakage current. Refer to pad electrical.
1
3.12
Flash Specifications
This section provides details about program/erase times and program-erase endurance for the flash
memory. For detailed information about program/erase operations, see the reference manual.
Table 14. Flash Characteristics
Num
C
1
D
2
D
Symbol
Min
Typical1
Max
Unit
Supply voltage for program/erase
VDD
2.7
—
5.5
V
Program/Erase voltage
VPP
11.8
12
12.2
V
Characteristic
MC9RS08LE4 MCU Data Sheet, Rev. 2
Freescale Semiconductor
21
Flash Specifications
Table 14. Flash Characteristics (continued)
Min
Typical1
Max
Unit
IVPP_prog
IVPP_erase
—
—
—
—
200
100
μA
μA
VRead
1.8
—
5.5
V
20
—
40
μs
500
—
—
ms
—
—
8
ms
thv_total
—
—
2
hours
C
3
C
VPP current
Program
Mass erase
4
D
Supply voltage for read operation
0 < fBus < 10 MHz
5
P
Byte program time
tprog
6
P
Mass erase time
tme
7
C
Cumulative program HV time2
thv
C
Total cumulative HV time
(total of tme & thv applied to device)
8
Characteristic
Symbol
Num
9
D
HVEN to program setup time
tpgs
10
—
—
μs
10
D
PGM/MASS to HVEN setup time
tnvs
5
—
—
μs
11
D
HVEN hold time for PGM
tnvh
5
—
—
μs
12
D
HVEN hold time for MASS
tnvh1
100
—
—
μs
13
D
VPP to PGM/MASS setup time
tvps
20
—
—
ns
14
D
HVEN to VPP hold time
tvph
20
—
—
ns
15
D
VPP rise
time3
tvrs
200
—
—
ns
16
D
Recovery time
trcv
1
—
—
μs
17
D
Program/erase endurance
TL to TH = –40°C to 85°C
—
1000
—
—
cycles
18
C
Data retention
tD_ret
100
—
—
years
Typicals are measured at 25 °C.
thv is the cumulative high voltage programming time to the same row before next erase. Same address can not be
programmed more than twice before next erase.
3 Fast V
PP rise time may potentially trigger the ESD protection structure, which may result in over-current flowing into the
pad and cause permanent damage to the pad. External filtering for the VPP power source is recommended. An example
VPP filter is shown in Figure 19.
1
2
Figure 19. Example VPP Filtering
MC9RS08LE4 MCU Data Sheet, Rev. 2
22
Freescale Semiconductor
Flash Specifications
tprog
WRITE DATA1
Next
Data
Data
tpgs
PGM
tnvs
tnvh
trcv
HVEN
trs
VPP2
tvps
tvph
thv
1
2
Next Data applies if programming multiple bytes in a single row, refer to MC9RS08LE4 Reference Manual.
VDD must be at a valid operating voltage before voltage is applied or removed from the VPP pin.
Figure 20. Flash Program Timing
tme
trcv
MASS
tnvs
tnvh1
HVEN
trs
VPP1
1
tvps
tvph
VDD must be at a valid operating voltage before voltage is applied or removed from
the VPP pin.
Figure 21. Flash Mass Erase Timing
4
Ordering Information
This section contains ordering numbers for MC9RS08LE4 devices. See below for an example of the
device numbering system.
MC9RS08LE4 MCU Data Sheet, Rev. 2
Freescale Semiconductor
23
Flash Specifications
Table 15. Device Numbering System
Memory
Package
Device Number
MC9RS08LE4
Flash
RAM
Type
Designator
Document No.
4 KB
256 bytes
28 SOIC
PC
98ASB42345B
MC 9 RS08 LE 4 C XX
Status
(MC = Fully qualified)
Memory
(9 = Flash-based)
Core
Package designator (See Table 15)
Temperature range
(C = –40°C to 85°C)
Approximate memory size (in KB)
Family
5
Mechanical Drawings
This following pages contain mechanical specifications for MC9RS08LE4 package options.
• 28-pin SOIC (small outline integrated circuit)
MC9RS08LE4 MCU Data Sheet, Rev. 2
24
Freescale Semiconductor
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Document Number: MC9RS08LE4
Rev. 2
11/2008
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