INFINEON 2ED020I12FA

Preliminary Datasheet, Version 1.2, Jan 2010
EICEDRIVER®
2ED020I12FA
Dual IGBT Driver IC
Power Management & Drives
N e v e r
s t o p
t h i n k i n g .
2ED020I12FA
Revision History:
2010-09-20
Previous Version:
1.1
Page
Version 1.2
Subjects (major changes since 1.1)
Edition 2010-09-20
Published by Infineon Technologies AG,
Campeon 1-12,
85579 Neubiberg, Germany
© Infineon Technologies AG 2010.
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits,
descriptions and charts stated herein.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon
Technologies Office (www.infineon.com).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in question please
contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of
Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support
device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended
to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is
reasonable to assume that the health of the user or other persons may be endangered.
EICEDRIVER®
2ED020I12FA
Dual IGBT Driver IC
Product Highlights
•
•
•
•
•
Coreless transformer isolated driver
Galvanic Insulation
Integrated protection features
Suitable for operation at high ambient temperature
Automotive Qualified (pending)
Features
•
•
•
•
•
Typical
Application
Dual channel isolated IGBT Driver
For 600V/1200V IGBTs
2A rail-to-rail output
Vcesat-detection
Active Miller Clamp
•
•
•
•
AC and Brushless DC Motor Drives
High Voltage DC/DC-Converter
UPS-Systems
Welding
VCC2HS
VCC1HS
DESATHS
INHS+, INHS-,
/RSTHS
/FLTHS,
RDYHS
EiceDRIVER TM
2ED020I12FA
OUTHS
CLAMPHS
High Side
GND2HS
VEE2HS
CPU
VCC1LS
VCC2LS
Low Side
INLS+, INLS-,
/RSTLS
DESATLS
/FLTLS,
RDYLS
OUTLS
CLAMPLS
GND1
GND2LS
VEE2LS
Figure 1:
Typical Application
Type
Gate drive current
Package
2ED020I12FA
+/- 2A
PG-DSO-36/32-1
Preliminary Datasheet
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Version 1.2, 2010-09-20
EICEDRIVER®
2ED020I12FA
Preliminary Datasheet
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Version 1.2, 2010-09-20
EICEDRIVER®
1ED020I12FTA
1
Block Diagram and Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.3
2.4
2.5
2.5.1
2.5.2
2.6
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Internal Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Undervoltage Lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
READY status output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Active Shut-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Non-Inverting and Inverting Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Driver Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
External Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3
3.1
3.2
Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4
4.1
4.2
4.3
4.4
4.4.1
4.4.2
4.4.3
4.4.4
4.4.5
4.4.6
4.4.7
Electrical Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Recommended Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Desaturation protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
16
18
18
19
19
19
21
21
21
23
23
5
5.1
5.2
5.3
Insulation Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Complies with DIN EN 60747-5-2 (VDE 0884 Teil 2): 2003-01. Basic Insulation . . . . . . . . . . . . . . . . . . . . . .
Complies with UL 1577 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
24
24
24
24
6
Timing Diagramms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Preliminary Datasheet
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Version 1.2, 2010-09-20
EICEDRIVER®
1ED020I12FTA
Preliminary Datasheet
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Version 1.2, 2010-09-20
EICEDRIVER®
2ED020I12FA
Block Diagram and Application
1
Block Diagram and Application
GND1 1
36 VEE2HS
2V
INHS+ 2
0
&
0
∆t
INHS- 3
LOGIC
RX
TX
∆t
/FLTHS
RDYHS 4
UVLO
UVLO
R DY_ LOOP
High Side
35 CLAMPHS
0
/RSTHS
VEE 2HS
VCC2HS
LOGIC
34 OUTHS
33 VCC2HS
VEE2HS
/FLTHS 5
32 GND2HS
/RSTHS 6
31 VEE2HS
LOGIC
TX
RX
LOGIC
DESAT
VCC1HS 7
K3
I3
30 DESATHS
9V R
GND1 8
29 not existing
GND2HS
NC 9
NC 10
27 not existing
2V
GND1 11
INLS+ 12
0
&
0
26 not existing
∆t
25 CLAMPLS
0
/RSTLS
INLS- 13
RDYLS 14
LOGIC
RX
TX
VEE2LS
∆t
/FLTLS
UVLO
UVLO
RDY_LOOP
Low Side
28 not existing
LOGIC
24 VEE2LS
VCC2LS
23 OUTLS
VEE 2LS
/FLTLS 15
/RSTLS 16
22 VCC2LS
21 GND2LS
LOGIC
TX
RX
VCC1LS 17
LOGIC
DESAT
I3
K3
R
20 DESATLS
9V
GND1 18
19 VEE2LS
GND2LS
Figure 1:
Block Diagram 2ED020I12FA
Preliminary Datasheet
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Version 1.2, 2010-09-20
EICEDRIVER®
2ED020I12FA
Block Diagram and Application
+5V
VCC1HS
SGND
GND1
INHS
INHS+
INHS-
RDY
FLT
RS
RDYHS
/FLTHS
/RSTHS
VCC1LS
INLS
INLS+
INLSRDYLS
/ FLTLS
/ RSTLS
VCC2HS
+15V_2
DESATHS
OUTHS
CLAMPHS
GND2HS
VEE2HS
VCC2LS
-8V_2
+15V_1
DESATLS
OUTLS
CLAMPLS
GND2LS
VEE2LS
-8V_1
2ED020I12FA
Figure 2:
Application Example
Preliminary Datasheet
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Version 1.2, 2010-09-20
EICEDRIVER®
2ED020I12FA
Functional Description
2
Functional Description
2.1
Introduction
The 2ED020I12FA is an advanced IGBT dual gate driver that can be also used for driving power MOS devices. Control and
protection functions are included to make possible the design of high reliability systems.
The device consists of two galvanic separated driver. The input can be directly connected to a standard 5V DSP or
microcontroller with CMOS in/output and the output driver are connected to the high side and low side switch.
The rail-to-rail driver outputs enables the user to provide easy clamping of the IGBTs gate voltage during short circuit of the
IGBT. So an increase of short circuit current due to the feedback via the Miller capacitance can be avoided. Further, a rail-torail output reduces power dissipation.
The device also includes IGBT desaturation protection with FAULT status outputs.
Two READY status outputs reports if the device is supplied and operates correctly.
2.2
Internal Protection Features
2.2.1
Undervoltage Lockout (UVLO)
To ensure correct switching of IGBTs the device is equipped with undervoltage lockout for all driver outputs as well as for
input section.
If the power supply voltage VVCC1xx of the input section drops below VUVLOL1 a turn-off signal is sent to the output driver
before power-down. The IGBT is switched off and the signals at INxx+ and INxx- are ignored as long as VVCC1xx reaches the
power-up voltage VUVLOH1 .
If the power supply voltage VVCC2xx of the output driver goes down below VUVLOL2 the IGBT is switched off and signals from
the input chip are ignored as long as VVCC2xx reaches the power-up voltage VUVLOH2 . VEE2 is not monitored, otherwise
negative supply voltage range from 0V to -12V would not be possible.
Preliminary Datasheet
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Version 1.2, 2010-09-20
EICEDRIVER®
2ED020I12FA
Functional Description
2.2.2
READY status output
The READY outputs shows the status of three internal protection features.
•
•
•
UVLO of the input chip
UVLO of the output chip after a short delay
Internal signal transmission
It is not necessary to reset the READY signal since its state only depends on the status of the former protection signals.
2.2.3
Watchdog Timer
During normal operation the internal signal transmission is monitored by a watchdog timer. If the transmission fails for a
given time, the IGBT is switched off and the READY output reports an internal error.
2.2.4
Active Shut-Down
The Active Shut-Down feature ensures a safe IGBT off-state if the output chip is not connected to the power supply.
2.3
Non-Inverting and Inverting Inputs
There are two possible input modes to control the IGBT. At non-inverting mode INxx+ controls the driver output while INxxis set to low. At inverting mode INxx- controls the driver output while INxx+ is set to high. A minimum input pulse width is
defined to filter occasional glitches.
2.4
Driver Outputs
The output driver sections uses only MOSFETs to provide a rail-to-rail output. This feature permits that tight control of gate
voltage during on-state and short circuit can be maintained as long as the drivers supply is stable. Due to the low internal
voltage drop, switching behaviour of the IGBT is predominantly governed by the gate resistor. Furthermore, it reduces the
power to be dissipated by the driver.
2.5
External Protection Features
2.5.1
Desaturation Protection
A desaturation protection ensures the protection of the IGBT at short circuit. When the DESAT voltage goes up and reaches
9V, the output is driven low. Further, the FAULT output is activated. A programmable blanking time is used to allow enough
time for IGBT saturation. Blanking time is provided by a highly precise internal current source and an external capacitor.
2.5.2
Short Circuit Clamping
During short circuit the IGBTs gate voltage tends to rise because of the feedback via the Miller capacitance. An additional
protection circuit connected to OUTxx limits this voltage to a value slightly higher than the supply voltage. A current of
maximum 500 mA for 10us may be fed back to the supply through one of this paths. If higher currents are expected or a tighter
clamping is desired external Schottky diodes may be added.
2.6
RESET
The reset inputs have two functions.
Preliminary Datasheet
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Version 1.2, 2010-09-20
EICEDRIVER®
2ED020I12FA
Functional Description
Firstly, /RSTxx is in charge of setting back the FAULT output. If /RSTxx is low longer than a given time , /FLTxx will be
reseted at the rising edge of /RSTxx; otherwise, it will remain unchanged. Moreover, it works as enable/shutdown of the input
logic.
Preliminary Datasheet
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Version 1.2, 2010-09-20
EICEDRIVER®
2ED020I12FA
Pin Configuration and Functionality
3
Pin Configuration and Functionality
3.1
Pin Configuration
Pin
Symbol
Function
1
GND1
Signal ground input side
2
INHS+
Non inverted driver input high side
3
INHS-
Inverted driver input high side
4
RDYHS
Ready output high side
5
/FLTHS
Inverted fault output high side
6
/RSTHS
Inverted reset input high side
7
VCC1HS
Positive power supply input high side
8
GND1
Signal ground input side
9
NC
Not used, internally connected to Pin 10
10
NC
Not used, internally connected to Pin 9
11
GND1
Signal ground input side
12
INLS+
Non inverted driver input low side
13
INLS-
Inverted driver input lowside
14
RDYLS
Ready output low side
15
/FLTLS
Inverted fault output low side
16
/RSTLS
Inverted reset input low side
17
VCC1LS
Positive power supply input low side
18
GND1LS
Signal ground input side
19
VEE2LS
Negative power supply low side driver
20
DESATLS
Desaturation protection low side driver
21
GND2LS
Signal ground low side driver
22
VCC2LS
Power supply low side driver
23
OUTLS
Output low side driver
24
VEE2LS
Negative power supply low side driver
25
CLAMPLS
Miller clamping low side driver
26
Pin not existing, cut out
27
Pin not existing, cut out
28
Pin not existing, cut out
29
Pin not existing, cut out
30
DESATHS
Desaturation protection high side driver
31
VEE2HS
Negative power supply high side driver
32
GND2HS
Signal ground high side driver
33
VCC2HS
Power supply high side driver
34
OUTHS
Output high side driver
35
CLAMPHS
Miller clamping high side driver
36
VEE2HS
Negative power supply high side driver
Preliminary Datasheet
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Version 1.2, 2010-09-20
EICEDRIVER®
2ED020I12FA
Pin Configuration and Functionality
1
GND1
VEE2HS
36
2
INHS+
CLAMPHS
35
3
INHS-
OUTHS
34
4
RDYHS
VCC2HS
33
5
/FLTHS
GND2HS
32
6
/RSTHS
VEE2HS
31
7
VCC1HS
DESATHS
30
8
GND1
9
NC
10
NC
11
GND1
12
INLS+
CLAMPLS
25
13
INLS-
VEE2LS
24
14
RDYLS
OUTLS
23
15
/FLTLS
VCC2LS
22
16
/RSTLS
GND2LS
21
17
VCC1LS
DESATLS
20
18
GND1
VEE2LS
19
Figure 3:
PG-DSO 36/32-1/32-1 (top view)
3.2
Pin Functionality
GND1
Common ground connection of the input side.
INHS+ Non-inverting driver input (High side)
INHS+ control signal for the driver output if INHS- is set to low. (The IGBT is on if INHS+ = high and INHS- = low)
A minimum pulse width is defined to make the IC robust against glitches at IN+. An internal Pull-Down-Resistor ensures
IGBT Off-State.
INHS- Inverting driver input (High side)
INHS- control signal for driver output if INHS+ is set to high. (IGBT is on if INHS- = low and INHS+ = high)
A minimum pulse width is defined to make the IC robust against glitches at INHS-. An internal Pull-Up-Resistor ensures
IGBT Off-State.
Preliminary Datasheet
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2ED020I12FA
Pin Configuration and Functionality
/RSTHS (Reset input High side)
Function 1: Enable/shutdown of the input chip. (The IGBT is off if /RSTHS = low). A minimum pulse width is defined to
make the IC robust against glitches at INHS-.
Function 2: Resets the DESAT-FAULT-state of the chip if /RSTHS is low for a time TRST. An internal Pull-Up-Resistor is
used to ensure /FLTHS status output.
/FLTHS (Fault output High side)
Open-drain output to report a desaturation error of the IGBT (/FLTHS is low if desaturation occurs)
RDYHS (Ready status High side)
Open-drain output to report the correct operation of the device. (RDYHS = high if both chips are above the UVLO level and
the internal chip transmission is faultless)
VCC1HS (High side)
5V power supply of the input chip
VEE2HS (High side)
Negative power supply pins of the output chip. If no negative supply voltage is available, both pins have to be connected to
GND2HS.
DESATHS (Desaturation High side)
Monitoring of the IGBT saturation voltage (VCE) to detect desaturation caused by short circuits. If OUT is high, VCE is above
a defined value and a certain blanking time has expired, the desaturation protection is activated and the IGBT is switched off.
The blanking time is adjustable by an external capacitor.
CLAMPHS (Clamping)
Ties the gate voltage to ground after the IGBT has been switched off at a defined voltage to avoid a parasitic
switch-on of the IGBT.During turn-off, the gate voltage is monitored and the clamp output is activated when the
gate voltage goes below 2V (related to VEE2HS).
GND2HS (High side)
Reference ground of the output chip.
OUTHS (Driver output High side)
Output pin to drive an IGBT. The voltage is switched between VEE2HS and VCC2HS. In normal operating mode Vout is
controlled by INHS+, INHS- and /RSTHS. During error mode (UVLO, internal error or DESATHS Vout is set to VEE2HS
independent of the input control signals.
VCC2HS (High side)
Positive power supply pin of the output side.
GND1LS (Low side)
Ground connection of the input side.
INLS+ Non-inverting driver input (Low side)
INLS+ control signal for the driver output if INLS- is set to low. (The IGBT is on if INLS+ = high and INLS- = low)
Preliminary Datasheet
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2ED020I12FA
Pin Configuration and Functionality
A minimum pulse width is defined to make the IC robust against glitches at IN+. An internal Pull-Down-Resistor ensures
IGBT Off-State.
INLS- Inverting driver input (Low side)
INLS- control signal for driver output if INLS+ is set to high. (IGBT is on if INLS- = low and INLS+ = high)
A minimum pulse width is defined to make the IC robust against glitches at INLS-. An internal Pull-Up-Resistor ensures
IGBT Off-State.
/RSTLS (Reset input Low side)
Function 1: Enable/shutdown of the input chip. (The IGBT is off if /RSTLS = low). A minimum pulse width is defined to
make the IC robust against glitches at INLS-.
Function 2: Resets the DESAT-FAULT-state of the chip if /RSTLS is low for a time TRST. An internal Pull-Up-Resistor is
used to ensure /FLTLS status output.
/FLTLS (Fault output Low side)
Open-drain output to report a desaturation error of the IGBT (/FLTLS is low if desaturation occurs)
RDYLS (Ready status Low side)
Open-drain output to report the correct operation of the device. (RDYLS = high if both chips are above the UVLO level and
the internal chip transmission is faultless)
VCC1LS (Low side)
5V power supply of the input chip
VEE2LS (Low side)
Negative power supply pins of the output chip. If no negative supply voltage is available, both pins have to be connected to
GND2LS.
DESATLS (Desaturation Low side)
Monitoring of the IGBT saturation voltage (VCE) to detect desaturation caused by short circuits. If OUT is high, VCE is above
a defined value and a certain blanking time has expired, the desaturation protection is activated and the IGBT is switched off.
The blanking time is adjustable by an external capacitor.
CLAMPLS (Clamping)
Ties the gate voltage to ground after the IGBT has been switched off at a defined voltage to avoid a parasitic
switch-on of the IGBT.During turn-off, the gate voltage is monitored and the clamp output is activated when the
gate voltage goes below 2V (related to VEE2LS).
GND2LS (Low side)
Reference ground of the output chip.
OUTLS (Driver output Low side)
Output pin to drive an IGBT. The voltage is switched between VEE2LS and VCC2LS. In normal operating mode Vout is
controlled by INLS+, INLS- and /RSTLS. During error mode (UVLO, internal error or DESATLS Vout is set to VEE2LS
independent of the input control signals.
VCC2LS (Low side)
Positive power supply pin of the output side.
Preliminary Datasheet
15
Version 1.2, 2010-09-20
EICEDRIVER®
2ED020I12FA
Electrical Parameters
4
Electrical Parameters
4.1
Absolute Maximum Ratings
Note: Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the integrated
circuit. Unless otherwise noted all parameters refer to GND1. The specification for all driver signals is valid for HS
and LS with out special notic, e.g. IN+ covers INHS+ as well as INLS+. The signals from driver output side are
measured with respect to their specific GND2HS or GND2LS.
Parameter
Symbol
Limit Values
min.
max.
Unit Remarks
Positive power supply output side
VVCC2
-0.3
20
V
1)
Negative power supply output side
VVEE2
-12
0.3
V
1)
Maximum power supply voltage output side
(VVCC2-VVEE2)
Vmax2

28
V
Gate driver output
VOUT
VVEE2-0.3
Vmax2+0.3
V
Gate driver high output maximum current
IOUT
2.4
A
t = 2µs
Gate driver low output maximum current
IOUT
2.4
A
t = 2µs
Maximum short circuit clamping time
tCLP

10
us
ICLAMP/OUT =
500mA
Positive power supply input side
VVCC1
-0.3
6.5
V
Logic input voltages
(IN+,IN-,RST)
VLogicIN
-0.3
6.5
V
Opendrain Logic output voltage
(FLT)
VFLT
-0.3
6.5
V
Opendrain Logic output voltage
(RDY)
VRDY
-0.3
6.5
V
Opendrain Logic output current
(FAULT)
IFLT

10
mA
Opendrain Logic output current
(RDY)
IRDY

10
mA
Pin DESAT voltage
VDESAT
-0.3
VVCC2 +0.3
Junction temperature
TJ
-40
150
°C
Storage temperature
TS
-55
150
°C
Power dissipation, per input part
PD, IN
100
Power dissipation, per output part
PD, OUT




400
Power dissipation, total
Thermal resistance (Input part)
Preliminary Datasheet
PD, tot
RTHJA,IN
16
1000
375
1)
VVEE2 = -8V
mW
2)
@TA = 25°
mW
2)
@TA = 25°
mW
2)
@TA = 25°
K/W
2)
@TA = 25°C,
PD, IN_HS+LS =
200mW,
PD, OUT_HS+LS =
800mW
Version 1.2, 2010-09-20
EICEDRIVER®
2ED020I12FA
Electrical Parameters
Thermal resistance (Output part)
RTHJA,OUT

110
K/W
2)
ESD Capability
VESD

tbd
kV
Human Body
Model3)
@TA = 25°C,
PD, IN_HS+LS =
200mW,
PD, OUT_HS+LS =
800mW
1) With respect to GND2.
2) IC power dissipation is derated linearly at 12mW/°C above 65°C. Thermal performance may change significantly with layout and heat
dissipation of components in close proximity.
3) According to EIA/JESD22-A114-B (discharging a 100pF capacitor through a 1.5kΩ series resistor).
Preliminary Datasheet
17
Version 1.2, 2010-09-20
EICEDRIVER®
2ED020I12FA
Electrical Parameters
4.2
Operating Parameters
Note: Within the operating range the IC operates as described in the functional description. Unless otherwise noted all
parameters refer to GND1. The specification for all driver signals is valid for HS and LS with out special notic, e.g.
IN+ covers INHS+ as well as INLS+. The signals from driver output side are measured with respect to their specific
GND2HS or GND2LS
Parameter
Symbol
Limit Values
min.
max.
Unit
Remarks
Positive power supply output side
VVCC2
13
20
V
1)
Negative power supply output side
VVEE2
-12
0
V
1)
Maximum power supply voltage output side
(VVCC2-VVEE2)
Vmax2

28
V
Positive power supply input side
VVCC1
4.5
5.5
V
Logic input voltages
(IN+,IN-,RST)
VLogicIN
-0.3
5.5
V
Pin DESAT voltage
VDESAT
-0.3
VVCC2
V
TA
-40
125
°C
|∆VISO/dt|
—
50
kV/µs @ 500V
Ambient temperature
2)
Common mode transient immunity
1)
1) With respect to GND2.
2) The parameter is not subject to production test - verified by design/characterization
4.3
Recommended Operating Parameters
Note: Unless otherwise noted all parameters refer to GND1. The specification for all driver signals is valid for HS and LS
with out special notic, e.g. IN+ covers INHS+ as well as INLS+. The signals from driver output side are measured with
respect to their specific GND2HS or GND2LS
Parameter
Symbol
Positive power supply output side
VVCC2
Negative power supply output side
Positive power supply input side
Values
Unit
Remarks
15
V
1)
VVEE2
-8
V
1)
VVCC1
5
V
1) With respect to GND2.
Preliminary Datasheet
18
Version 1.2, 2010-09-20
EICEDRIVER®
2ED020I12FA
Electrical Parameters
4.4
Electrical Characteristics
Note: The electrical characteristics involve the spread of values for the supply voltages, load and junction temperatures given
below. Typical values represent the median values, which are related to production processes at T = 25°C. Unless
otherwise noted all voltages are given with respect to GND. The specification for all driver signals is valid for HS and
LS with out special notic, e.g. IN+ covers INHS+ as well as INLS+. The signals from driver output side are measured
with respect to their specific GND2HS or GND2LS
4.4.1
Voltage Supply.
Parameter
Symbol
Limit Values
min.
UVLO Threshold Input Chip

VUVLOH1
VUVLOL1
3.5
UVLO Hysteresis Input Chip
(VUVLOH1 - VUVLOL1)
VHYS1
0.15
UVLO Threshold Output Chip
VUVLOH2
Unit Test Conditions
typ.
max.
4.1
4.3


3.8


12.0
V
12.6


V
V
V
VUVLOL2
10.4
11.0
UVLO Hysteresis Output Chip
(VUVLOH1 - VUVLOL1)
VHYS2
0.7
0.9
Quiescent Current Input Chip
IQ1

7
9
mA
VVCC1 =5V
IN+ = High, IN- = Low
=>OUT = High, RDY =
High, /FLT = High
Quiescent Current Output Chip
IQ2

4
6
mA
VVCC2 =15V
VVEE2 =-8V
IN+ = High, IN- = Low
=>OUT = High, RDY =
High, /FLT = High
4.4.2
V
V
Logic Input and Output
Parameter
Symbol
Limit Values
min.
IN+,IN-, RST Low Input Voltage
IN+,IN-, RST High Input Voltage
typ.

VIN+L,VIN-
L,VRSTL
Unit Test Conditions

max.
1.5

VIN+H,VIN- 3.5
HVRSTH
V

V
IN-, RST Input Current
IIN-,IRST

100
400
uA
VIN-=GND1
VRST =GND1
IN+ Input Current
IIN+,
100
400
uA
VIN+=VCC1
RDY,FLT Pull Up Current
IPRDY,
IPFLT


100
400
uA
VRDY=GND1
VFLT=GND1
Input Pulse Suppression IN+, IN-
TMININ+,
TMININ-
30
40

ns
Input Pulse Suppression RST
for ENABLE/SHUTDOWN
TMINRST
30
40

ns
Pulse Width RST
for Reseting FLT
TRST
800

ns
Preliminary Datasheet

19
Version 1.2, 2010-09-20
EICEDRIVER®
2ED020I12FA
Electrical Parameters
FLT Low Voltage
VFLTL
RDY Low Voltage
VRDYL
Preliminary Datasheet


20


300
mV
ISINK(FLT) = 5mA
300
mV
ISINK(RDY) = 5mA
Version 1.2, 2010-09-20
EICEDRIVER®
2ED020I12FA
Electrical Parameters
4.4.3
Gate Driver
Parameter
Symbol
Limit Values
High Level Output Voltage
VOUTH1
VCC2-1.2
VCC2-0.8
VOUTH2
VCC2-2.5
VCC2-2
VOUTH3
VCC2-9
VCC2-5
min.
typ.
Unit Test Conditions
max.
High Level Output Peak Current
IOUTH
-1.5
-2





Low Level Output Voltage
VOUTL1
VVEE2+0.04
VVEE2+0.09
V
IOUTL = 20mA
VVEE2+0.3
VVEE2+0.85
V
IOUTL = 200mA
VVEE2+2.1
VVEE2+5.0
V
IOUTL = 1A
VOUTL4




VVEE2+7
—
V
IOUTL = 2A
IOUTL
1,5
2
—
A
IN+ = Low, IN- = Low;
OUT = Low,
VVCC2 =15V,
VVEE2 =-8V
VOUTH4
VOUTL2
VOUTL3
Low Level Output Peak Current
4.4.4
VCC2-10
IOUTH = -20mA
V
IOUTH = -200mA
V
IOUTH = -1A
V
IOUTH = -2A
A
IN+ = High, IN- = Low;
OUT = High
Short Circuit Clamping
Parameter
Symbol
Limit Values
min.
Clamping voltage (OUT)
(VOUT-VVCC2)
4.4.5
V
VCLPout
Unit Test Conditions
typ.

max.
0.8
1.3
V
IN+=High, IN-=Low,
OUT=High
IOUT = 500mA (pulse
test,tCLPmax=10us)
Dynamic Characteristics
Parameter
Symbol
Limit Values
Unit Test Conditions
min.
typ.
max.
Input IN+ to output propagation delay
ON
TPDON
150
170
190
ns
Input IN+ to output propagation delay
OFF
TPDOFF
145
165
185
ns
Input IN+ to output propagation delay
distortion (TPDOFF - TPDON)
TPDISTO
-35
-5
25
ns
Input IN+ to output propagation delay
ON variation due to temp
TPDONt
160
190
220
ns
Input IN+ to output propagation delay
OFF variation due to temp
TPDOFFt
165
195
225
ns
Input IN+ to output propagation delay
distortion (TPDOFF - TPDON)
TPDISTOt
-25
5
35
ns
Preliminary Datasheet
21
VVCC2 =15V,VVEE2 =-8V
CLOAD= 100pF
VIN+=50%, VOUT=50%
@ 25°C
VVCC2 =15V,VVEE2 =-8V
CLOAD= 100pF
VIN+=50%, VOUT=50%
@ 125°C
Version 1.2, 2010-09-20
EICEDRIVER®
2ED020I12FA
Electrical Parameters
Input IN+ to output propagation delay
ON variation due to temp
TPDONt
135
165
195
ns
Input IN+ to output propagation delay
OFF variation due to temp
TPDOFFt
120
150
180
ns
Input IN+ to output propagation delay
distortion (TPDOFF - TPDON)
TPDISTOt
-45
-15
15
ns
Input IN- to output propagation delay ON TPDON
135
155
750
ns
Input IN- to output propagation delay
OFF
TPDOFF
145
165
185
ns
Input IN- to output propagation delay
distortion (TPDOFF - TPDON)
TPDISTO
-565
10
40
ns
Input IN- to output propagation delay ON TPDONt
variation due to temp
140
170
990
ns
Input IN- to output propagation delay
OFF variation due to temp
TPDOFFt
165
195
225
ns
Input IN- to output propagation delay
distortion (TPDOFF - TPDON)
TPDISTOt
-770
25
55
ns
Input IN- to output propagation delay ON TPDON
120
150
990
ns
Input IN- to output propagation delay
OFF
TPDOFF
120
150
180
ns
Input IN- to output propagation delay
distortion (TPDOFF - TPDON)
TPDISTO
-810
0
30
ns
Rise Time
TRISE
10
30
60
ns
VVCC2 =15V,VVEE2 =-8V
CLOAD= 1nF
VL 10% ,VH 90%
200
400
800
ns
VVCC2 =15V,VVEE2 =-8V
CLOAD= 34nF
VL 10% ,VH 90%
10
50
90
ns
VVCC2 =15V,VVEE2 =-8V
CLOAD= 1nF
VL 10% ,VH 90%
200
350
600
ns
VVCC2 =15V,VVEE2 =-8V
CLOAD= 34nF
VL 10% ,VH 90%
Fall Time
Preliminary Datasheet
TFALL
22
VVCC2 =15V,VVEE2 =-8V
CLOAD= 100pF
VIN+=50%, VOUT=50%
@ -40°C
VVCC2 =15V,VVEE2 =-8V
CLOAD= 100pF
VIN+=50%, VOUT=50%
@ 25°C
VVCC2 =15V,VVEE2 =-8V
CLOAD= 100pF
VIN-=50%, VOUT=50%
@ 125°C
VVCC2 =15V,VVEE2 =-8V
CLOAD= 100pF
VIN-=50%, VOUT=50%
@ -40°C
Version 1.2, 2010-09-20
EICEDRIVER®
2ED020I12FA
Electrical Parameters
4.4.6
Desaturation protection
Parameter
Symbol
Limit Values
Blanking Capacitor Charge Current
IDESATC
450
500
550
uA
Blanking Capacitor Discharge Current
IDESATD
10
13

mA VVCC2 =15V,VVEE2 =-8V
VDESAT=6V
Desaturation Reference Level
VDESAT
8.3
9
9.5
V
VVCC2 =15V
Desaturation Filter Time
TDESATleb
-
250
-
ns
VVCC2 =15V,VVEE2 =-8V
VDESAT=9V
Desaturation Sense to OUT Low Delay
TDESATOUT

350
410
ns
VOUT =90%
CLOAD= 1nF
Desaturation Sense to FLT Low Delay
TDESATFLT

2.25
us
VFLT =10%; IFLT =5mA
Desaturation Low Voltage
VDESATL
0.4
0.6
0.95
V
IN+=Low, IN-=Low,
OUT=Low
Leading edge blanking
TDESATleb
-
400
-
ns
not subject of production
test
min.
4.4.7
Unit Test Conditions
typ.
max.
VVCC2 =15V,VVEE2 =-8V
VDESAT=2V
Active Shut Down
Parameter
Symbol
Active Shut Down Voltage
VACTSD1)
Limit Values
min.
Unit Test Conditions
typ.


max.
4
V
IOUT=-200mA,
VCC2 open
1) With reference to VEE2
Preliminary Datasheet
23
Version 1.2, 2010-09-20
EICEDRIVER®
2ED020I12FA
Insulation Characteristics
5
Insulation Characteristics
5.1
Complies with DIN EN 60747-5-2 (VDE 0884 Teil 2): 2003-01. Basic Insulation
Description
Symbol
Characteristic
Installation classification per EN 60664-1, Table 1
for rated mains voltage ≤ 150 VRMS
for rated mains voltage ≤ 300 VRMS
for rated mains voltage ≤ 600 VRMS
I-IV
I-III
I-II
Climatic Classification
55/105/21
Pollution Degree (EN 60664-1)
Unit
2
Minimum External Clearance between input and driver section
CLR
8
mm
Minimum External Creepage between input and driver section
CPG
8
mm
Minimum External Clearance between HS- and LS-driver output
tbd
mm
Minimum External Creepage between HS- and LS-driver output
2.81
mm
Minimum Comparative Tracking Index
CTI
175
Maximum Repetitive Insulation Voltage
VIORM
1420
VPEAK
Highest Allowable Overvoltage
VIOTM
6000
VPEAK
Maximum Surge Insulation Voltage
VIOSM
6000
V
5.2
Complies with UL 1577
Description
Symbol
Characteristic
Unit
Insulation Withstand Voltage / 1min
VISO
3750
Vrms
Insulation Test Voltage / 1sec
VISO
4500
Vrms
5.3
Reliability
For Qualification Report please contact your local Infineon Technologies office.
Preliminary Datasheet
24
Version 1.2, 2010-09-20
EICEDRIVER®
2ED020I12FA
Timing Diagramms
6
Timing Diagramms
IN+
IN/RST
OUT
Figure 4:
Typical Switching Behavior
IN+
TPDON
TPDON
OUT
TPDON
TDESATfilter
TDESATOUT
VDESAT typ. 9V
TDESATleb
TDESATleb
DESAT
/FLT
TDESATFLT
/RST
>TRSTmin
Figure 5:
DESAT Switch-Off Behavior
Preliminary Datasheet
25
Version 1.2, 2010-09-20
EICEDRIVER®
2ED020I12FA
Package Outlines
7
Package Outlines
Figure 6:
PG-DSO 36/32-1
Preliminary Datasheet
26
Version 1.2, 2010-09-20
www.infineon.com/gatedriver
Published by Infineon Technologies AG
EICEDRIVER®
2ED020I12FA
Preliminary Datasheet
28
Version 1.2, 2010-09-20