FCH47N60 N-Channel SuperFET® MOSFET 600 V, 47 A, 70 m Features Description • 650 V atTJ = 150°C The FCH47N60 SuperFET® MOSFET is Fairchild Semiconductor’s first generation of high-voltage super-junction (SJ) MOSFET family that utilizes charge-balance technology for outstanding low on-resistance and lower gate charge performance. This technology is tailored to minimize conduction loss and provide superior switching performance, dv/dt rate, and avalanche energy. This SuperFET MOSFET is suitable for the switching power applications such as PFC, server/telecom power, FPD TV power, ATX power, and industrial power. • Typ. RDS(on) = 58 m • Ultra-Low Gate Charge (Typ. Qg = 210 nC) • Low Effective Output Capacitance (Typ. Cosseff. = 420 pF) • 100% Avalanche Tested • RoHS Compliant Applications • Solar Inverter • AC-DC Power Supply D G G D S TO-247 S MOSFET Maximum Ratings TC = 25°C unless otherwise noted* Symbol VDSS Drain to Source Voltage Parameter ID Drain Current IDM Drain Current VGSS Gate to Source Voltage EAS Single Pulsed Avalanche Energy IAR Avalanche Current EAR Repetitive Avalanche Energy dv/dt Peak Diode Recovery dv/dt FCH47N60_F133 600 Continuous (TC = 25°C) 47 Continuous (TC = 100°C) 29.7 Pulsed A 141 A ±30 V (Note 2) 1800 mJ (Note 1) 47 A (Note 1) 41.7 mJ 4.5 V/ns (Note 1) (Note 3) (TC = 25°C) 417 W Derate above 25°C 3.33 W/°C -55 to +150 °C 300 °C PD Power Dissipation TJ, TSTG Operating and Storage Temperature Range Maximum Lead Temperature for Soldering Purpose, 1/8” from Case for 5 Seconds TL Unit V *Drain current limited by maximum junction temperature. Thermal Characteristics Symbol Parameter Typ. RJC Thermal Resistance, Junction to Case, Maximum RJA Thermal Resistance, Case-to-Sink RJA Thermal Resistance, Junction to Ambient, Maximum ©2009 Fairchild Semiconductor Corporation FCH47N60 Rev. C1 Max. Unit 0.3 °C/W 41.7 °C/W 0.24 1 °C/W www.fairchildsemi.com FCH47N60 — N-Channel MOSFET May 2013 Device Marking FCH47N60 Device FCH47N60_F133 Package TO-247 Reel Size Tape Width Quantity 30 Electrical Characteristics TC = 25°C unless otherwise noted. Symbol Parameter Test Conditions Min. Typ. Max. Unit Off Characteristics BVDSS Drain-to-Source Breakdown Voltage BVDSS TJ BVDS Breakdown Voltage Temperature Coefficient Drain-Source Avalanche Breakdown Voltage IDSS Zero Gate Voltage Drain Current IGSS Gate-to-Body Leakage Current VGS = 0 V, ID = 250 μA, TC = 25°C 600 V VGS = 0 V, ID = 250 μA, TC = 150°C 650 V ID = 250 μA, Referenced to 25°C 0.6 V/°C VGS = 0 V, ID = 47 A 700 V VDS = 600 V, VGS = 0 V 1 VDS = 480 V, TC = 125°C 10 VGS = ±30 V, VDS = 0 V ±100 A nA On Characteristics VGS(th) RDS(on) Gate Threshold Voltage VGS = VDS, ID = 250 A Static Drain-to-Source On Resistance gFS Forward Transconductance VGS = 10 V, ID = 23.5 A VDS = 40 V, ID = 23.5 A 3.0 0.058 (Note 4) 5.0 V 0.070 40 S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance VDS = 25 V, VGS = 0 V f = 1.0 MHz 5900 8000 pF 3200 4200 pF Crss Reverse Transfer Capacitance Coss Output Capacitance VDS = 480 V, VGS = 0 V, f = 1.0 MHz 250 160 pF pF Cosseff. Effective Output Capacitance VDS = 0 V to 400 V, VGS = 0 V 420 pF Switching Characteristics td(on) Turn-On Delay tr Turn-On Rise Time td(off) Turn-Off Delay tf Turn-Off Fall Time Qg(tot) Total Gate Charge at 10 V Qgs Gate to Source Gate Charge Qgd Gate to Drain “Miller” Charge VDD = 300 V, ID = 47 A RG = 25 (Note 4, 5) VDS = 480 V, ID = 47 A, VGS = 10 V (Note 4, 5) 185 430 210 450 ns ns 520 1100 ns 75 160 ns 210 270 nC 38 nC 110 nC Drain-Source Diode Characteristics IS Maximum Continuous Drain-to-Source Diode Forward Current 47 A ISM Maximum Pulsed Drain-to-Source Diode Forward Current 141 A VSD Drain-to-Source Diode Forward Voltage VGS = 0 V, ISD = 47 A 1.4 trr Reverse-Recovery Time Qrr Reverse-Recovery Charge VGS = 0 V, ISD = 47 A dIF/dt = 100 A/s (Note 4) V 590 ns 25 C NOTES: 1. Repetitive Rating: Pulse width limited by maximum junction temperature. 2. IAS = 18 A, VDD = 50 V, RG = 25 , Starting TJ = 25C. 3. ISD 47 A, di/dt 200 A/s, VDD BVDSS, Starting TJ = 25C. 4. Pulse Test: Pulse width 300 s, Duty Cycle 2%. 5. Essentially Independent of Operating Temperature Typical Characteristics. ©2009 Fairchild Semiconductor Corporation FCH47N60 Rev. C1 2 www.fairchildsemi.com FCH47N60 — N-Channel MOSFET Package Marking and Ordering Information FCH47N60 — N-Channel MOSFET Typical Performance Characteristics VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V Bottom : 5.5 V Top : ID, Drain Current [A] 10 2 ID , Drain Current [A] 2 1 10 ※ Notes : 1. 250μ s Pulse Test 2. TC = 25℃ 0 10 -1 0 10 10 150℃ 1 10 -55℃ ※ Note 1. VDS = 40V 2. 250μ s Pulse Test 0 10 2 1 10 25℃ 10 4 8 10 Figure 2. Transfer Characteristics 0.20 IDR , Reverse Drain Current [A] RDS(ON) [Ω ],Drain-Source On-Resistance Figure 1. On-Region Characteristics 0.15 VGS = 10V 0.10 VGS = 20V 0.05 0 20 40 60 80 100 120 140 160 180 2 10 1 10 150℃ ※ Notes : 1. VGS = 0V 2. 250μ s Pulse Test 0 200 0.2 0.4 0.6 Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage 1.0 1.2 1.4 1.6 Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 30000 12 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 20000 VDS = 100V VGS, Gate-Source Voltage [V] 25000 Coss 15000 ※ Notes : 1. VGS = 0 V 2. f = 1 MHz Ciss 10000 0 -1 10 0.8 VSD , Source-Drain Voltage [V] ID, Drain Current [A] 5000 25℃ 10 ※ Note : TJ = 25℃ 0.00 Capacitance [pF] 6 VGS , Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Crss 0 10 1 10 VDS = 250V VDS = 400V 8 6 4 2 ※ Note : ID = 47A 0 0 50 100 150 200 250 QG, Total Gate Charge [nC] VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics ©2009 Fairchild Semiconductor Corporation FCH47N60 Rev. C1 10 Figure 6. Gate Charge Characteristics 3 www.fairchildsemi.com FCH47N60 — N-Channel MOSFET Typical Performance Characteristics (Continued) 3.0 RDS(ON), (Normalized) Drain-Source On-Resistance BVDSS, (Normalized) Drain-Source Breakdown Voltage 1.2 1.1 1.0 ※ Notes : 1. VGS = 0 V 2. ID = 250 μ A 0.9 0.8 -100 -50 0 50 100 150 2.5 2.0 1.5 1.0 ※ Notes : 1. VGS = 10 V 2. ID = 47 A 0.5 0.0 -100 200 -50 0 o 50 100 150 200 o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 50 Operation in This Area is Limited by R DS(on) 2 100 us 40 1 ms ID, Drain Current [A] ID, Drain Current [A] 10 10 ms 1 10 DC 0 10 ※ Notes : o 1. TC = 25 C -1 10 0 10 20 10 o 2. TJ = 150 C 3. Single Pulse -2 10 30 1 2 10 0 25 3 10 10 50 VDS, Drain-Source Voltage [V] Figure 9. Safe Operating Area Zθ JC(t), Thermal Response 75 100 125 150 TC, Case Temperature [℃] Figure 10. Maximum Drain Current vs. Case Temperature D = 0 .5 10 -1 ※ N o te s : 1 . Z θ J C( t) = 0 .3 ℃ /W M a x . 2 . D u ty F a c to r , D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C( t) 0 .2 0 .1 0 .0 5 PDM 0 .0 2 10 -2 10 0 .0 1 -5 t1 s in g le p u ls e 10 -4 10 -3 10 -2 10 t2 -1 10 0 10 1 t 1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ] Figure 11. Transient Thermal Response Curve ©2009 Fairchild Semiconductor Corporation FCH47N60 Rev. C1 4 www.fairchildsemi.com FCH47N60 — N-Channel MOSFET Figure 12. Gate Charge Test Circuit & Waveform Figure 13. Resistive Switching Test Circuit & Waveforms Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms ©2009 Fairchild Semiconductor Corporation FCH47N60 Rev. C1 5 www.fairchildsemi.com FCH47N60 — N-Channel MOSFET Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms ©2009 Fairchild Semiconductor Corporation FCH47N60 Rev. C1 6 www.fairchildsemi.com FCH47N60 — N-Channel MOSFET Physical Dimensions Figure 16. TO-247, Molded, 3-Lead, JEDEC Variation AB Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TO247-003 ©2009 Fairchild Semiconductor Corporation FCH47N60 Rev. C1 7 www.fairchildsemi.com tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I64 ©2009 Fairchild Semiconductor Corporation FCH47N60 Rev. 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