FDMS7608S Dual N-Channel PowerTrench® MOSFET Q1: 30 V, 22 A, 10.0 mΩ Q2: 30 V, 30 A, 6.3 mΩ Features General Description Q1: N-Channel This device includes two specialized N-Channel MOSFETs in a Max rDS(on) = 10.0 mΩ at VGS = 10 V, ID = 12 A dual MLP package. The switch node has been internally Max rDS(on) = 13.6 mΩ at VGS = 4.5 V, ID = 10 A connected to enable easy placement and routing of synchronous buck converters. The control MOSFET (Q1) and synchronous Q2: N-Channel SyncFET (Q2) have been designed to provide optimal power Max rDS(on) = 6.3 mΩ at VGS = 10 V, ID = 15 A efficiency. Max rDS(on) = 7.2 mΩ at VGS = 4.5 V, ID = 13 A Applications RoHS Compliant Computing Communications General Purpose Point of Load Notebook VCORE S2 S2 Q2 S2 G2 S2 D1 S2 D1 S2 D1 S1/D2 D1 D1 D1 D1 G1 Bottom Top Q1 Pin1 G2 G1 Power 56 MOSFET Maximum Ratings TA = 25°C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current ID TJ, TSTG Units V V (Note 3) ±20 ±20 TC = 25 °C 22 30 -Continuous (Silicon limited) TC = 25 °C 46 60 -Continuous TA = 25 °C 121a 151b 50 60 -Pulsed PD Q2 30 -Continuous (Package limited) Single Pulse Avalanche Energy EAS Q1 30 (Note 4) 29 33 mJ Power Dissipation for Single Operation TA = 25°C 2.21a 2.51b Power Dissipation for Single Operation TA = 25°C 1.01c 1.01d Operating and Storage Junction Temperature Range A -55 to +150 W °C Thermal Characteristics RθJA 571a Thermal Resistance, Junction to Ambient RθJA Thermal Resistance, Junction to Ambient RθJC Thermal Resistance, Junction to Case 125 1c 4.0 501b 1201d °C/W 3.2 Package Marking and Ordering Information Device Marking FDMS7608S Device FDMS7608S ©2011 Fairchild Semiconductor Corporation FDMS7608S Rev.C Package Power 56 1 Reel Size 13 ” Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMS7608S Dual N-Channel PowerTrench® MOSFET June 2011 Symbol Parameter Test Conditions Type Min 30 30 Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ID = 1 mA, VGS = 0 V Q1 Q2 ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25°C ID = 10 mA, referenced to 25°C Q1 Q2 IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V Q1 Q2 1 500 μA IGSS Gate to Source Leakage Current VGS = 20 V, VDS = 0 V Q1 Q2 100 100 nA nA 3.0 3.0 V V 13 19 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA VGS = VDS, ID = 1 mA Q1 Q2 ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 μA, referenced to 25°C ID = 10 mA, referenced to 25°C Q1 Q2 -6 -4 VGS = 10 V, ID = 12 A VGS = 4.5 V, ID = 10 A VGS = 10 V, ID = 12 A, TJ = 125°C Q1 7.4 10.0 10.3 10.0 13.6 13.9 VGS = 10 V, ID = 15 A VGS = 4.5 V, ID = 13 A VGS = 10 V, ID = 15 A, TJ = 125°C Q2 4.8 6.0 6.6 6.3 7.2 8.6 VDD = 5 V, ID = 12 A VDD = 5 V, ID = 15 A Q1 Q2 54 76 Q1: VDS = 15 V, VGS = 0 V, f = 1 MHZ Q1 Q2 1135 1380 1510 1835 pF Q1 Q2 390 478 520 635 pF Q1 Q2 42 60 65 90 pF 1.6 0.5 3.2 2.0 Ω Q1 Q2 7 7 14 14 ns Q1 Q2 3 3 10 10 ns Q1 Q2 19 20 35 36 ns Q1 Q2 3 2 10 10 ns Q1 Q2 18 21 24 30 nC Q1 Q2 9 12 14 16 nC Q1 Q2 3.6 3.5 nC Q1 Q2 2.5 3.0 nC rDS(on) gFS Static Drain to Source On Resistance Forward Transconductance 1.2 1.2 1.9 1.7 mV/°C mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance Q2: VDS = 15 V, VGS = 0 V, f = 1 MHZ Q1 Q2 0.2 0.2 Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg(TOT) Total Gate Charge VGS = 0V to 10 V Qg(TOT) Total Gate Charge VGS = 0V to 5 V Qgs Gate to Source Charge Qgd Gate to Drain “Miller” Charge ©2011 Fairchild Semiconductor Corporation FDMS7608S Rev.C Q1 VDD = 15 V, ID = 12 A, RGEN = 6 Ω Q2 VDD = 15 V, ID = 15 A, RGEN = 6 Ω Q1 VDD = 15 V, ID = 12 A Q2 VDD = 15 V, ID = 15 A 2 www.fairchildsemi.com FDMS7608S Dual N-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25°C unless otherwise noted Symbol Parameter Test Conditions Type Min Typ Max Units Q1 Q1 Q2 Q2 0.75 0.84 0.63 0.80 1.1 1.2 0.8 1.2 V Q1 Q2 25 21 40 34 ns Q1 Q2 9 19 18 33 nC Drain-Source Diode Characteristics VSD Source-Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 VGS = 0 VGS = 0 VGS = 0 V, IS = 2 A V, IS = 12 A V, IS = 2 A V, IS = 15 A (Note 2) (Note 2) (Note 2) (Note 2) Q1 IF = 12 A, di/dt = 100 A/μs Q2 IF = 15 A, di/dt = 300 A/μs Notes: 1.RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. b. 50 °C/W when mounted on a 1 in2 pad of 2 oz copper a. 57 °C/W when mounted on a 1 in2 pad of 2 oz copper d. 120 °C/W when mounted on a minimum pad of 2 oz copper c. 125 °C/W when mounted on a minimum pad of 2 oz copper 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied. 4. Q1: EAS of 29 mJ is based on starting TJ = 25 oC; N-ch: L = 0.3 mH, IAS = 14 A, VDD = 27 V, VGS = 10 V. 100% tested at L = 3 mH, IAS = 3.75 A. Q2: EAS of 33 mJ is based on starting TJ = 25 oC; N-ch: L = 0.3 mH, IAS = 15 A, VDD = 27 V, VGS = 10 V. 100% tested at L = 3 mH, IAS = 3.9 A. ©2011 Fairchild Semiconductor Corporation FDMS7608S Rev.C 3 www.fairchildsemi.com FDMS7608S Dual N-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25°C unless otherwise noted 50 6 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE ID, DRAIN CURRENT (A) VGS = 10 V VGS = 6 V 40 VGS = 4.5 V VGS = 3.5 V 30 VGS = 4 V 20 VGS = 3 V 10 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0.0 0.5 1.0 1.5 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 5 VGS = 3 V 4 VGS = 3.5 V 3 VGS = 4 V 2 1 VGS = 4.5 V VGS = 6 V 0 2.0 0 10 Figure 1. On Region Characteristics rDS(on), DRAIN TO 1.0 0.8 0 25 50 75 SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 1.2 -25 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 30 ID = 12 A 20 TJ = 125 oC 10 TJ = 25 oC 0 100 125 150 2 TJ, JUNCTION TEMPERATURE (oC) IS, REVERSE DRAIN CURRENT (A) ID, DRAIN CURRENT (A) TJ = 150 oC 30 TJ = 25 oC 20 TJ = -55 oC 10 2.0 2.5 3.0 3.5 4.0 6 7 8 9 10 VGS = 0 V 10 TJ = 150 oC 1 TJ = 25 oC 0.1 TJ = -55 oC 0.01 0.001 0.0 4.5 VGS, GATE TO SOURCE VOLTAGE (V) 0.2 0.4 0.6 0.8 1.0 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics ©2011 Fairchild Semiconductor Corporation FDMS7608S Rev.C 5 50 40 0 1.5 4 Figure 4. On-Resistance vs Gate to Source Voltage PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX VDS = 5 V 3 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On Resistance vs Junction Temperature 50 50 40 ID = 12 A VGS = 10 V -50 40 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 1.6 0.6 -75 30 ID, DRAIN CURRENT (A) VDS, DRAIN TO SOURCE VOLTAGE (V) 1.4 20 VGS = 10 V Figure 6. Source to Drain Diode Forward Voltage vs Source Current 4 www.fairchildsemi.com FDMS7608S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted 2000 ID = 12 A 1000 Ciss 8 CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = 10 V VDD = 15 V 6 VDD = 20 V 4 Coss 100 2 Crss f = 1 MHz VGS = 0 V 0 0 3 6 9 12 15 10 0.1 18 1 Figure 7. Gate Charge Characteristics 50 10 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) 30 Figure 8. Capacitance vs Drain to Source Voltage 30 TJ = 25 oC TJ = 100 oC TJ = 125 oC 40 30 VGS = 10 V 20 VGS = 4.5 V Limited by Package 10 o RθJC = 4.0 C/W 1 0.001 0.01 0.1 1 10 0 25 50 50 100 125 150 o Figure 9. Unclamped Inductive Switching Capability Figure 10. Maximum Continuous Drain Current vs Case Temperature 100 P(PK), PEAK TRANSIENT POWER (W) 1000 100 μs 10 1 ms 1 0.1 75 TC, CASE TEMPERATURE ( C) tAV, TIME IN AVALANCHE (ms) ID, DRAIN CURRENT (A) 10 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) 10 ms THIS AREA IS LIMITED BY rDS(on) 100 ms SINGLE PULSE TJ = MAX RATED 1s 10s RθJA = 125 oC/W DC TA = 25 oC 0.01 0.01 0.1 1 10 100200 VDS, DRAIN to SOURCE VOLTAGE (V) o RθJA = 125 C/W 100 10 1 0.5 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, PULSE WIDTH (sec) Figure 11. Forward Bias Safe Operating Area ©2011 Fairchild Semiconductor Corporation FDMS7608S Rev.C SINGLE PULSE Figure 12. Single Pulse Maximum Power Dissipation 5 www.fairchildsemi.com FDMS7608S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted 2 DUTY CYCLE-DESCENDING ORDER NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 SINGLE PULSE 0.01 t2 o RθJA = 125 C/W NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA (Note 1b) 0.001 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Ambient Transient Thermal Response Curve ©2011 Fairchild Semiconductor Corporation FDMS7608S Rev.C 6 www.fairchildsemi.com FDMS7608S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted 60 4 ID, DRAIN CURRENT (A) 50 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 10 V VGS = 6 V VGS = 4.5 V VGS = 4 V 40 VGS = 3.5 V 30 VGS = 3 V 20 10 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0.0 0.5 1.0 1.5 VGS = 3 V 3 VGS = 3.5 V 2 VGS = 4 V 1 VGS = 4.5 V 0 2.0 0 10 Figure 14. On-Region Characteristics rDS(on), DRAIN TO 1.2 1.0 0.8 -50 -25 0 25 50 75 SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 28 ID = 15 A VGS = 10 V 0.6 -75 100 125 150 ID = 15 A 16 12 TJ = 125 oC 8 4 TJ = 25 oC 2 IS, REVERSE DRAIN CURRENT (A) TJ = 125 oC 30 TJ = 25 oC 20 TJ = -55 oC 10 3.0 3.5 8 10 VGS = 0 V 10 TJ = 125 oC 1 TJ = 25 oC 0.1 TJ = -55 oC 0.01 0.001 0.0 4.0 VGS, GATE TO SOURCE VOLTAGE (V) 0.2 0.4 0.6 0.8 1.0 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 18. Transfer Characteristics ©2011 Fairchild Semiconductor Corporation FDMS7608S Rev.C 6 60 VDS = 5 V 2.5 4 Figure 17. On-Resistance vs Gate to Source Voltage 40 2.0 60 VGS, GATE TO SOURCE VOLTAGE (V) PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 1.5 50 20 0 Figure 16. Normalized On-Resistance vs Junction Temperature 50 40 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 24 TJ, JUNCTION TEMPERATURE (oC) 60 30 Figure 15. Normalized on-Resistance vs Drain Current and Gate Voltage 1.6 ID, DRAIN CURRENT (A) 20 VGS = 10 V VGS = 6 V ID, DRAIN CURRENT (A) VDS, DRAIN TO SOURCE VOLTAGE (V) 1.4 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX Figure 19. Source to Drain Diode Forward Voltage vs Source Current 7 www.fairchildsemi.com FDMS7608S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted 3000 ID = 15 A Ciss 1000 8 CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = 10 V 6 VDD = 15 V 4 VDD = 20 V Coss 100 Crss 2 f = 1 MHz VGS = 0 V 0 0 5 10 15 10 0.1 20 30 30 10 ID, DRAIN CURRENT (A) 70 TJ = 25 oC TJ = 100 oC TJ = 125 oC 56 42 VGS = 10 V 28 VGS = 4.5 V Limited by Package 14 o RθJC = 3.2 C/W 1 0.001 0.01 0.1 1 10 0 25 100 50 100 125 150 o Figure 23. Maximum Continuous Drain Current vs Case Temperature Figure 22. Unclamped Inductive Switching Capability 1000 P(PK), PEAK TRANSIENT POWER (W) 100 100 μs 10 1 ms 1 0.1 75 TC, CASE TEMPERATURE ( C) tAV, TIME IN AVALANCHE (ms) ID, DRAIN CURRENT (A) 10 Figure 21. Capacitance vs Drain to Source Voltage Figure 20. Gate Charge Characteristics IAS, AVALANCHE CURRENT (A) 1 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) 10 ms THIS AREA IS LIMITED BY rDS(on) 100 ms 1s SINGLE PULSE TJ = MAX RATED 10s RθJA = 120 oC/W DC TA = 25 oC 0.01 0.01 0.1 1 10 100200 VDS, DRAIN to SOURCE VOLTAGE (V) o RθJA = 120 C/W 100 10 1 0.5 -4 10 -3 10 -2 10 -1 10 0 10 1 10 100 1000 t, PULSE WIDTH (sec) Figure 24. Forward Bias Safe Operating Area ©2011 Fairchild Semiconductor Corporation FDMS7608S Rev.C SINGLE PULSE Figure 25. Single Pulse Maximum Power Dissipation 8 www.fairchildsemi.com FDMS7608S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q2 N-Channel) TJ = 25°C unless otherwise noted 2 DUTY CYCLE-DESCENDING ORDER NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 SINGLE PULSE 0.01 o NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA RθJA = 120 C/W (Note 1b) 0.001 -4 10 -3 10 -2 10 -1 0 10 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 26. Junction-to-Ambient Transient Thermal Response Curve ©2011 Fairchild Semiconductor Corporation FDMS7608S Rev.C 9 www.fairchildsemi.com FDMS7608S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted SyncFET Schottky body diode Characteristics Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power in the device. Fairchild’s SyncFET process embeds a Schottky diode in parallel with PowerTrench MOSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. Figure 27 shows the reverse recovery characteristic of the FDMS7608S. -2 IDSS, REVERSE LEAKAGE CURRENT (A) 16 CURRENT (A) 12 8 di/dt = 300 A/μs 4 0 -4 23.06 23.08 23.10 23.12 23.14 23.16 23.18 23.20 23.22 23.24 TIME (ns) TJ = 125 oC -3 10 TJ = 100 oC -4 10 -5 TJ = 25 oC 10 -6 10 0 5 10 15 20 25 30 VDS, REVERSE VOLTAGE (V) Figure 27. FDMS7608S SyncFET body diode reverse recovery characteristic ©2011 Fairchild Semiconductor Corporation FDMS7608S Rev.C 10 Figure 28. SyncFET body diode reverse leakage versus drain-source voltage 10 www.fairchildsemi.com FDMS7608S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (continued) FDMS7608S Dual N-Channel PowerTrench® MOSFET Dimensional Outline and Pad Layout 5.0 0 .1 0 C A 1 .2 7 B 2X 8 0.65 TYP 7 6 5 0.40 0 .6 3 0.25 0 2.67 6 .0 0.66 6.30 0.54 0 .9 2 PIN#1 QUADRANT 0.10 C 2 1 2X TOP VIEW 0 .6 5 (5X) 3 4 4 .0 0 RECOMMENDED LAND PATTERN (OPTION 1 - FUSED LEADS 5,6,7) 1.27 8 0.10 C 0.65 TYP 7 6 5 0.40 0 .6 3 0 .8 0 MAX (0.20 ) 0.08 C SIDE VIEW 0.05 0.00 SEATING PL ANE 2.67 0.66 6.30 0.54 0 .9 2 1 2 3.85 3.75 3 0.48 0.38 (5X) 4 1 PIN #1 IDENT 2 4 .0 0 3 4 RECOMMENDED LAND PATTERN (OPTION 2 - ISOLATED LEADS) 0.97 0.87 0.66 0.55 2 .7 2 2 .6 2 0.45 0.340 4 X 0.56 (5 X) 0.46 0.10 C A B 0.05 C 8 7 6 1.27 5 A. DOES NOT FULLY CONFORM TO JEDEC REGISTRATION, MO-229. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14. 5M, 1994 D. LAND PATTERN RECOMMENDATION IS BASED ON FSC DESIGN ONLY E. DRAWING FILE NAME : MKT-MLP08Prev1 0 .2 0 3.81 BOTTOM VIEW ©2011 Fairchild Semiconductor Corporation FDMS7608S Rev.C 11 www.fairchildsemi.com tm tm tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. 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Fairchild’s Anti-Counterfeiting Policy is also stated on our external website, www.Fairchildsemi.com, under Sales Support. Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I54 ©2011 Fairchild Semiconductor Corporation FDMS7608S Rev.C 12 www.fairchildsemi.com FDMS7608S Dual N-Channel PowerTrench® MOSFET TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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