STMICROELECTRONICS VN920-E

VN920-E
VN920B5-E / VN920SO-E
HIGH SIDE DRIVER
Table 1. General Features
Type
VN920-E
VN920B5-E
VN920SO-E
Figure 1. Package
RDS(on)
IOUT
VCC
16mΩ
30 A
36 V
P2PAK
PENTAWATT
CMOS COMPATIBLE INPUT
■ PROPORTIONAL LOAD CURRENT SENSE
■ SHORTED LOAD PROTECTION
■ UNDERVOLTAGE AND OVERVOLTAGE
SHUTDOWN
■ OVERVOLTAGE CLAMP
■ THERMAL SHUTDOWN
■ CURRENT LIMITATION
■ PROTECTION AGAINST LOSS OF GROUND
AND LOSS OF VCC
■
■
SO-16L
Active current limitation combined with thermal
shutdown and automatic restart protect the device
against overload. The device integrates an analog
current sense output which delivers a current
proportional to the load current. Device
automatically turns off in case of ground pin
disconnection.
VERY LOW STAND-BY POWER DISSIPATION
REVERSE BATTERY PROTECTION (*)
IN COMPLIANCE WITH THE 2002/95/EC
EUROPEAN DIRECTIVE
■
■
DESCRIPTION
The VN920-E, VN920B5-E, VN920SO-E is a
monolithic
device
made
by
using
STMicroelectronics VIPower M0-3 Technology,
intended for driving any kind of load with one side
connected to ground. Active VCC pin voltage
clamp protects the device against low energy
spikes (see ISO7637 transient compatibility table).
Table 2. Order Codes
Package
PENTAWATT
2
Tube
Tape and Reel
VN920-E
-
P PAK
VN920B5-E
VN920B5TR-E
SO-16L
VN920SO-E
VN920SOTR-E
Note: (*) See application schematic at page 9.
Rev. 1
October 2004
1/24
VN920-E / VN920B5-E / VN920SO-E
Figure 2. Block Diagram
VCC
OVERVOLTAGE
DETECTION
VCC
CLAMP
UNDERVOLTAGE
DETECTION
GND
Power CLAMP
DRIVER
OUTPUT
LOGIC
INPUT
CURRENT LIMITER
VDS LIMITER
IOUT
CURRENT
SENSE
K
OVERTEMPERATURE
DETECTION
Table 3. Absolute Maximum Ratings
Symbol
VCC
- VCC
- IGND
IOUT
- IOUT
IIN
VCSENSE
Parameter
Value
P2PAK SO-16L
41
- 0.3
- 200
Internally Limited
- 21
+/- 10
-3
PENTAWATT
DC Supply Voltage
Reverse DC Supply Voltage
DC Reverse Ground Pin Current
DC Output Current
Reverse DC Output Current
DC Input Current
Current Sense Maximum Voltage
Unit
V
V
mA
A
A
mA
V
+15
V
- INPUT
4000
V
- CURRENT SENSE
2000
V
- OUTPUT
5000
V
- VCC
Maximum Switching Energy
5000
V
Electrostatic Discharge
(Human Body Model: R=1.5KΩ; C=100pF)
VESD
EMAX
PTOT
Tj
Tc
TSTG
2/24
(L=0.25mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=45A)
Power Dissipation TC≤25°C
Junction Operating Temperature
Case Operating Temperature
Storage Temperature
364
96.1
96.1
Internally limited
- 40 to 150
- 55 to 150
352
mJ
8.3
W
°C
°C
°C
VN920-E / VN920B5-E / VN920SO-E
Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins
1
VCC
OUTPUT
5
4
CSENSE
VCC
3
INPUT
GND
2
1
VCC
16
N.C.
OUTPUT
GND
OUTPUT
INPUT
OUTPUT
CSENSE
OUTPUT
N.C.
OUTPUT
N.C.
OUTPUT
8
VCC
PENTAWATT
OUTPUT
4
CSENSE
3
VCC
2
INPUT
1
GND
VCC
9
P2PAK
SO-16L
Connection /
Pin
Floating
To Ground
5
Current Sense
N.C.
Output
Input
X
X
X
Through 1KΩ resistor
X
Through 10KΩ resistor
Figure 4. Current and Voltage Conventions
IS
VCC
VF
VCC
IOUT
OUTPUT
IIN
VOUT
INPUT
VIN
ISENSE
CURRENT SENSE
VSENSE
GND
IGND
Table 4. Thermal Data
Symbol
Parameter
Rthj-case
Rthj-lead
Thermal Resistance Junction-case
Thermal Resistance Junction-lead
Max
Max
Rthj-amb
Thermal Resistance Junction-ambient
Max
PENTAWATT
1.3
61.3
Value
P2PAK
1.3
51.3 (1)
37 (2)
SO-16L
15
65 (3)
48 (4)
Unit
°C/W
°C/W
°C/W
°C/W
(1) When mounted on a standard single-sided FR-4 board with 0.5cm 2 of Cu (at least 35µm thick).
(2) When mounted on a standard single-sided FR-4 board with 6cm 2 of Cu (at least 35µm thick).
(3) When mounted on a standard single-sided FR-4 board with 0.5cm 2 of Cu (at least 35µm thick) connected to all VCC pins.
(4) When mounted on a standard single-sided FR-4 board with 6cm 2 of Cu (at least 35µm thick) connected to all VCC pins.
3/24
VN920-E / VN920B5-E / VN920SO-E
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C<Tj<150°C unless otherwise specified)
Table 5. Power
Symbol
Parameter
VCC
Min.
Typ.
Max.
Unit
Operating Supply Voltage
5.5
13
36
V
VUSD
Undervoltage Shut-down
3
4
5.5
V
VOV
Overvoltage Shut-down
36
RON
Vclamp
IS
On State Resistance
Test Conditions
V
IOUT=10A; Tj=25°C
16
mΩ
IOUT=10A
32
mΩ
IOUT=3A; VCC=6V
55
mΩ
48
55
V
Clamp Voltage
ICC=20mA (See note 1)
41
Off State; VCC=13V; VIN=VOUT=0V
10
25
µA
Supply Current
Off State; VCC=13V; VIN=VOUT=0V;
Tj=25°C
10
20
µA
5
mA
0
50
µA
-75
0
µA
On State; VCC=13V; VIN=5V; IOUT=0A;
RSENSE=3.9KΩ
IL(off1)
Off State Output Current
VIN=VOUT=0V
IL(off2)
Off State Output Current
VIN=0V; VOUT=3.5V
IL(off3)
Off State Output Current
VIN=VOUT=0V; VCC=13V; Tj=125°C
5
µA
IL(off4)
Off State Output Current
VIN=VOUT=0V; VCC=13V; Tj=25°C
3
µA
Max.
Unit
Note: 1. Vclamp and VOV are correlated. Typical difference is 5V.
Table 6. Switching (VCC =13V)
Symbol
Parameter
Test Conditions
Min.
Typ.
td(on)
Turn-on Delay Time
RL=1.3Ω (see figure 6)
50
µs
td(off)
Turn-off Delay Time
RL=1.3Ω (see figure 6)
50
µs
dVOUT/
dt(on)
Turn-on Voltage Slope
RL=1.3Ω (see figure 6)
See
relative
diagram
V/µs
dVOUT/
dt(off)
Turn-off Voltage Slope
RL=1.3Ω (see figure 6)
See
relative
diagram
V/µs
Table 7. Logic Input
Symbol
Parameter
VIL
Input Low Level
IIL
Low Level Input Current
VIH
Input High Level
IIH
High Level Input Current
VI(hyst)
Input Hysteresis Voltage
VICL
4/24
Input Clamp Voltage
Test Conditions
VIN=1.25V
Min.
Typ.
Max.
Unit
1.25
V
1
µA
3.25
V
VIN=3.25V
10
0.5
IIN=1mA
IIN=-1mA
6
µA
V
6.8
-0.7
8
V
V
VN920-E / VN920B5-E / VN920SO-E
ELECTRICAL CHARACTERISTICS (continued)
Table 8. VCC - Output Diode
Symbol
VF
Parameter
Forward on Voltage
Test Conditions
Min.
Typ.
-IOUT=2A; Tj=150°C
Max.
Unit
0.6
V
Max
200
Table 9. Protections (see note 1)
Symbol
TTSD
TR
Thyst
Parameter
Shut-down Temperature
Reset Temperature
Thermal Hysteresis
Ilim
DC Short Circuit Current
Vdemag
VON
Turn-off Output Clamp
Voltage
Output Voltage Drop
Limitation
Test Conditions
VCC=13V
Min
150
135
7
30
Typ
175
15
45
5V<VCC<36V
IOUT=2A; VIN=0V; L=6mH
VCC-41
IOUT=1A; Tj=-40°C....+150°C
VCC-48
75
Unit
°C
°C
°C
A
75
A
VCC-55
V
50
mV
Note: 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be
used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration
and number of activation cycles.
Table 10. Current Sense (9V≤VCC≤16V) (See Fig. 5)
Symbol
K1
dK1/K1
K2
dK2/K2
K3
dK3/K3
ISENSEO
VSENSE
VSENSEH
RVSENSEH
tDSENSE
Parameter
IOUT/ISENSE
Current Sense Ratio Drift
IOUT/ISENSE
Current Sense Ratio Drift
IOUT/ISENSE
Current Sense Ratio Drift
Analog Sense Leakage
Current
Test Conditions
IOUT=1A; VSENSE=0.5V;
Tj= -40°C...150°C
IOUT=1A; VSENSE=0.5V;
Tj= -40°C...+150°C
IOUT=10A; VSENSE=4V; Tj=-40°C
Tj=25°C...150°C
IOUT=10A; VSENSE=4V;
Tj=-40°C...+150°C
IOUT=30A; VSENSE=4V; Tj=-40°C
Tj=25°C...150°C
IOUT=30A; VSENSE=4V;
Tj=-40°C...+150°C
VCC=6...16V; IOUT=0A;VSENSE=0V;
Tj=-40°C...+150°C
Max Analog Sense Output VCC=5.5V; IOUT=5A; RSENSE=10KΩ
Voltage
VCC>8V; IOUT=10A; RSENSE=10KΩ
Sense Voltage in
Overtemperature
VCC=13V; RSENSE=3.9KΩ
conditions
Analog Sense Output
Impedance in
VCC=13V; Tj>TTSD; Output Open
Overtemperature
Condition
Current sense delay
to 90% ISENSE (see note 2)
response
Min
Typ
Max
3300
4400
6000
-10
+10
4200
4900
6000
4400
4900
5750
-8
+8
4200
4900
5500
4400
4900
5250
Unit
%
%
-6
+6
%
0
10
µA
2
V
4
V
5.5
V
400
Ω
500
µs
Note: 2. current sense signal delay after positive input slope.
5/24
VN920-E / VN920B5-E / VN920SO-E
Figure 5. IOUT/ISENSE versus IOUT
IOUT/ISENSE
6500
6000
max.Tj=-40°C
5500
max.Tj=25...150°C
5000
typical value
min.Tj=25...150°C
4500
min.Tj=-40°C
4000
3500
3000
0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
IOUT (A)
Figure 6. Switching Characteristics (Resistive load RL=1.3Ω)
VOUT
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
tr
10%
tf
t
ISENSE
90%
INPUT
t
tDSENSE
td(on)
td(off)
t
6/24
32
VN920-E / VN920B5-E / VN920SO-E
Table 11. Truth Table
CONDITIONS
INPUT
Normal operation
Overtemperature
Undervoltage
Overvoltage
Short circuit to GND
Short circuit to VCC
Negative output voltage
clamp
OUTPUT
SENSE
0
Nominal
L
L
H
H
L
L
0
H
L
VSENSEH
L
L
0
H
L
0
L
L
0
H
L
0
L
L
0
H
L
(Tj<TTSD) 0
H
L
(Tj>TTSD) VSENSEH
L
H
0
H
H
< Nominal
L
L
0
Table 12. Electrical Transient Requirements On VCC Pin
TEST LEVELS
ISO T/R 7637/1
Test Pulse
I
II
III
IV
1
2
3a
3b
4
5
-25 V
+25 V
-25 V
+25 V
-4 V
+26.5 V
-50 V
+50 V
-50 V
+50 V
-5 V
+46.5 V
-75 V
+75 V
-100 V
+75 V
-6 V
+66.5 V
-100 V
+100 V
-150 V
+100 V
-7 V
+86.5 V
ISO T/R 7637/1
Test Pulse
1
2
3a
3b
4
5
CLASS
C
E
Delays and
Impedance
2 ms 10 Ω
0.2 ms 10 Ω
0.1 µs 50 Ω
0.1 µs 50 Ω
100 ms, 0.01 Ω
400 ms, 2 Ω
I
TEST LEVELS RESULTS
II
III
IV
C
C
C
C
C
C
C
C
C
C
C
E
C
C
C
C
C
E
C
C
C
C
C
E
CONTENTS
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure to disturbance
and cannot be returned to proper operation without replacing the device.
7/24
VN920-E / VN920B5-E / VN920SO-E
Figure 7. Waveforms
NORMAL OPERATION
INPUT
LOAD CURRENT
SENSE
UNDERVOLTAGE
VCC
VUSDhyst
VUSD
INPUT
LOAD CURRENT
SENSE
OVERVOLTAGE
VOV
VCC
VCC > VUSD
VOVhyst
INPUT
LOAD CURRENT
SENSE
SHORT TO GROUND
INPUT
LOAD CURRENT
LOAD VOLTAGE
SENSE
SHORT TO VCC
INPUT
LOAD VOLTAGE
LOAD CURRENT
SENSE
<Nominal
<Nominal
OVERTEMPERATURE
Tj
TTSD
TR
INPUT
LOAD CURRENT
SENSE
8/24
ISENSE=
VSENSEH
RSENSE
VN920-E / VN920B5-E / VN920SO-E
Figure 8. Application Schematic
+5V
VCC
Rprot
INPUT
Dld
µC
Rprot
OUTPUT
CURRENT SENSE
RSENSE
GND
VGND
GND PROTECTION
REVERSE BATTERY
NETWORK
AGAINST
Solution 1: Resistor in the ground line (RGND only). This
can be used with any type of load.
The following is an indication on how to dimension the
RGND resistor.
1) RGND ≤ 600mV / (IS(on)max).
2) RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in RGND (when VCC<0: during reverse
battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where IS(on)max becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the RGND will
produce a shift (IS(on)max * RGND) in the input thresholds
and the status output values. This shift will vary
depending on how many devices are ON in the case of
several high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large
resistor or several devices have to share the same
resistor then the ST suggests to utilize Solution 2 (see
below).
Solution 2: A diode (DGND) in the ground line.
A resistor (RGND=1kΩ) should be inserted in parallel to
DGND if the device will be driving an inductive load.
RGND
DGND
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift (j600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
Series resistor in INPUT line is also required to prevent
that, during battery voltage transient, the current exceeds
the Absolute Maximum Rating.
Safest configuration for unused INPUT pin is to leave it
unconnected, while unused SENSE pin has to be
connected to Ground pin.
LOAD DUMP PROTECTION
Dld is necessary (Voltage Transient Suppressor) if the
load dump peak voltage exceeds VCC max DC rating.
The same applies if the device will be subject to
transients on the VCC line that are greater than the ones
shown in the ISO T/R 7637/1 table.
µC I/Os PROTECTION:
If a ground protection network is used and negative
transients are present on the VCC line, the control pins will
be pulled negative. ST suggests to insert a resistor (Rprot)
in line to prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up
limit of µC I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended Rprot value is 10kΩ.
9/24
VN920-E / VN920B5-E / VN920SO-E
Figure 9. Off State Output Current
Figure 10. High Level Input Current
Iih (uA)
IL(off1) (uA)
9
5
8
4.5
Vin=3.25V
4
7
3.5
6
3
5
2.5
4
2
3
1.5
2
1
1
0.5
0
0
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Figure 11. Input Clamp Voltage
Figure 13. On State Resistance Vs VCC
Ron (mOhm)
Vicl (V)
50
8
45
7.8
Iin=1mA
7.6
40
7.4
35
7.2
30
Tc= 150ºC
7
25
6.8
20
6.6
15
6.4
10
6.2
5
Tc= 25ºC
Tc= - 40ºC
0
6
-50
-25
0
25
50
75
100
125
150
5
175
10
15
20
25
30
35
40
Vcc (V)
Tc (°C)
Figure 14. Input High Level
Figure 12. On State Resistance Vs Tcase
Ron (mOhm)
Vih (V)
50
3.6
45
3.4
Iout=10A
Vcc=8V; 36V
40
3.2
35
3
30
25
2.8
20
2.6
15
2.4
10
2.2
5
2
0
-50
-25
0
25
50
75
Tc (ºC)
10/24
100
125
150
175
-50
-25
0
25
50
75
Tc (°C)
100
125
150
175
VN920-E / VN920B5-E / VN920SO-E
Figure 15. Input Low Level
Figure 18. Input Hysteresis Voltage
Vil (V)
Vhyst (V)
2.6
1.5
1.4
2.4
1.3
2.2
1.2
2
1.1
1
1.8
0.9
1.6
0.8
1.4
0.7
1.2
0.6
1
0.5
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
100
125
150
175
Tc (°C)
Figure 16. Turn-on Voltage Slope
Figure 19. Turn-off Voltage Slope
dVout/dt(on) (V/ms)
dVout/dt(off) (V/ms)
700
550
500
650
Vcc=13V
Rl=1.3Ohm
450
Vcc=13V
Rl=1.3Ohm
600
400
550
350
500
300
450
250
200
400
150
350
100
300
50
0
250
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
50
75
100
125
150
175
100
125
150
175
Tc (°C)
Tc (ºC)
Figure 17. Overvoltage Shutdown
Figure 20. ILIM Vs Tcase
Vov (V)
Ilim (A)
50
100
48
90
46
80
44
70
42
60
40
50
38
40
36
30
34
20
32
10
Vcc=13V
30
0
-50
-25
0
25
50
75
Tc (°C)
100
125
150
175
-50
-25
0
25
50
75
Tc (°C)
11/24
VN920-E / VN920B5-E / VN920SO-E
Figure 21. P2PAK Maximum turn off current versus load inductance
ILM AX (A)
100
A
B
C
10
1
0.01
0.1
1
10
100
L(mH)
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of
each demagnetization) of every pulse must not
exceed the temperature specified above for
curves B and C.
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
12/24
VN920-E / VN920B5-E / VN920SO-E
Figure 22. SO-16L Maximum turn off current versus load inductance
ILMAX (A)
100
A
B
C
10
1
0.01
0.1
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
1
L(mH)
10
100
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of
each demagnetization) of every pulse must not
exceed the temperature specified above for
curves B and C.
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
13/24
VN920-E / VN920B5-E / VN920SO-E
SO-16L Thermal Data
Figure 23. SO-16L PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 41mm x 48mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: 0.5cm2, 6cm2).
Figure 24. SO-16L R thj-amb Vs PCB copper area in open box free air condition
70
RTH j-amb (°C/W)
65
60
55
50
45
40
0
1
2
3
4
5
PCB Cu heatsink area (cm^2)
14/24
6
7
VN920-E / VN920B5-E / VN920SO-E
P2PAK Thermal Data
Figure 25. P2PAK PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: 0.97cm2, 8cm2).
Figure 26. P2PAK Rthj-amb Vs PCB copper area in open box free air condition
RTHj_amb (°C/W)
55
Tj-Tamb=50°C
50
45
40
35
30
0
2
4
6
8
10
PCB Cu heatsink area (cm^2)
15/24
VN920-E / VN920B5-E / VN920SO-E
Figure 27. P2PAK Thermal Impedance Junction Ambient Single Pulse
ZT H (°C/W)
1000
100
0.97 cm2
6 cm2
10
1
0.1
0.01
0.0001
0.001
0.01
0.1
1
Time (s)
Figure 28. Thermal fitting model of a single
channel HSD in P2PAK
10
100
1000
Pulse calculation formula
THδ
where
= R TH ⋅ δ + Z THtp ( 1 – δ )
δ = tp ⁄ T
Table 13. Thermal Parameter
Tj
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd
T_amb
16/24
R1
R2
R3
R4
R5
R6
C1
C2
C3
C4
C5
C6
Area/island (cm2)
(°C/W)
(°C/W)
( °C/W)
(°C/W)
(°C/W)
(°C/W)
(W.s/°C)
(W.s/°C)
(W.s/°C)
(W.s/°C)
(W.s/°C)
(W.s/°C)
0.97
0.02
0.1
0.22
4
9
37
0.0015
0.007
0.015
0.4
2
3
6
22
5
VN920-E / VN920B5-E / VN920SO-E
Figure 29. SO-16L Thermal Impedance Junction Ambient Single Pulse
ZTH (°C/W)
100
0.5 cm2
6 cm2
10
1
0.1
0.01
0.0001
0.001
0.01
0.1
1
10
100
1000
Time (s)
Figure 30. Thermal fitting model of a single
channel HSD in SO-16L
Pulse calculation formula
THδ
where
= R TH ⋅ δ + Z THtp ( 1 – δ )
δ = tp ⁄ T
Table 14. Thermal Parameter
Tj
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd
T_amb
R1
R2
R3
R4
R5
R6
C1
C2
C3
C4
C5
C6
Area/island (cm2)
(°C/W)
(°C/W)
( °C/W)
(°C/W)
(°C/W)
(°C/W)
(W.s/°C)
(W.s/°C)
(W.s/°C)
(W.s/°C)
(W.s/°C)
(W.s/°C)
0.5
0.02
0.1
2.2
12
15
35
0.0015
7.00E-03
1.50E-02
0.14
1
5
6
20
8
17/24
VN920-E / VN920B5-E / VN920SO-E
PACKAGE MECHANICAL
Table 15. SO-16L Mechanical Data
Symbol
A
millimeters
Min
Typ
2.35
2.65
A1
0.10
0.30
B
0.33
0.51
C
0.23
0.32
D
10.10
10.50
E
7.40
e
7.60
1.27
H
10.00
10.65
h
0.25
0.75
L
0.40
1.27
k
0º
8º
ddd
Package Weight
Figure 31. SO-16L Package Dimensions
18/24
Max
0.10
0.4Gr. (Typ.)
VN920-E / VN920B5-E / VN920SO-E
PACKAGE MECHANICAL
Table 16. PENTAWATT (VERTICAL) Mechanical Data
Symbol
millimeters
Min
Typ
A
4.8
C
D
Max
1.37
2.4
2.8
D1
1.2
1.35
E
0.35
0.55
F
0.8
1.05
F1
1
1.4
G
3.2
3.4
G1
6.6
6.8
H2
H3
3.6
7
10.4
10.05
10.4
L
17.85
L1
15.75
L2
21.4
L3
22.5
L5
2.6
3
L6
15.1
15.8
L7
6
6.6
M
4.5
M1
Diam.
4
3.65
3.85
Figure 32. PENTAWATT (VERTICAL) Package Dimensions
19/24
VN920-E / VN920B5-E / VN920SO-E
PACKAGE MECHANICAL
Table 17. P2PAK Mechanical Data
Symbol
millimeters
Min
Typ
Max
A
4.30
4.80
A1
2.40
2.80
A2
0.03
0.23
b
0.80
1.05
c
0.45
0.60
c2
1.17
1.37
D
8.95
9.35
D2
E
8.00
10.00
E1
10.40
8.50
e
3.20
3.60
e1
6.60
7.00
L
13.70
14.50
L2
1.25
1.40
L3
0.90
1.70
L5
1.55
2.40
R
V2
0.40
0º
Package Weight
8º
1.40 Gr (typ)
Figure 33. P2PAK Package Dimensions
P010R
20/24
VN920-E / VN920B5-E / VN920SO-E
Figure 34. SO-16L TUBE SHIPMENT (no suffix)
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
C
B
50
1000
532
3.5
13.8
0.6
All dimensions are in mm.
A
Figure 35. SO-16L TAPE AND REEL SHIPMENT (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
16.4
60
22.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
All dimensions are in mm.
16
4
12
1.5
1.5
7.5
6.5
2
End
Start
Top
No components
Components
No components
cover
tape
500mm min
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
21/24
VN920-E / VN920B5-E / VN920SO-E
Figure 36. P2PAK TUBE SHIPMENT (no suffix)
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
B
C
50
1000
532
18
33.1
1
All dimensions are in mm.
A
Figure 37. P2PAK TAPE AND REEL SHIPMENT (suffix “TR”)
REEL DIMENSIONS
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
1000
330
1.5
13
20.2
24.4
60
30.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
All dimensions are in mm.
24
4
16
1.5
1.5
11.5
6.5
2
End
Start
Top
No components
Components
No components
cover
tape
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
22/24
500mm min
VN920-E / VN920B5-E / VN920SO-E
REVISION HISTORY
Table 18. Revision History
Date
Revision
Oct. 2004
1
Description of Changes
- First Issue.
23/24
VN920-E / VN920B5-E / VN920SO-E
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