TI SN74ALVC164245DL

SN74ALVC164245
16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416F – MARCH 1994 – REVISED FEBRUARY 1999
D
D
D
D
DGG OR DL PACKAGE
(TOP VIEW)
Member of the Texas Instruments
Widebus Family
EPIC  (Enhanced-Performance Implanted
CMOS) Submicron Process
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages
1DIR
1B1
1B2
GND
1B3
1B4
(5 V) VCCB
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
(5 V) VCCB
2B5
2B6
GND
2B7
2B8
2DIR
description
This 16-bit (dual-octal) noninverting bus
transceiver contains two separate supply rails;
B port has VCCB, which is set at 5 V, and A port has
VCCA, which is set to operate at 3.3 V. This allows
for translation from a 3.3-V to a 5-V environment
and vice versa.
The SN74ALVC164245 is designed for
asynchronous communication between data
buses.
To ensure the high-impedance state during power
up or power down, the output-enable (OE) input
should be tied to VCC through a pullup resistor; the
minimum value of the resistor is determined by the
current-sinking capability of the driver.
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
1OE
1A1
1A2
GND
1A3
1A4
VCCA (3.3 V)
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCCA (3.3 V)
2A5
2A6
GND
2A7
2A8
2OE
The SN74ALVC164245 is characterized for
operation from –40°C to 85°C.
FUNCTION TABLE
(each 8-bit section)
INPUTS
OE
DIR
OPERATION
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
Copyright  1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN74ALVC164245
16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416F – MARCH 1994 – REVISED FEBRUARY 1999
logic symbol†
48
1OE
1DIR
G3
1
3 EN1 [BA]
3 EN2 [AB]
25
2OE
2DIR
G6
24
6 EN4 [BA]
6 EN5 [AB]
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
47
2
1
2
46
3
44
5
43
6
41
8
40
9
38
11
37
12
36
13
4
5
35
14
33
16
32
17
30
19
29
20
27
22
26
23
1B1
1B2
1B3
1B4
1B5
1B6
1B7
1B8
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
1DIR
1
2DIR
48
1A1
25
1OE
47
2A1
2
24
36
13
1B1
To Seven Other Channels
To Seven Other Channels
2
POST OFFICE BOX 655303
2OE
• DALLAS, TEXAS 75265
2B1
SN74ALVC164245
16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416F – MARCH 1994 – REVISED FEBRUARY 1999
absolute maximum ratings over operating free-air temperature range for VCCB at 5 V and
VCCA at 3.3 V (unless otherwise noted)†
Supply voltage range: VCCA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 4.6 V
VCCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6 V
Input voltage range, VI: Except I/O ports (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6 V
I/O port A (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCCA + 0.5 V
I/O port B (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCCB + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through each VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Package thermal impedance, θJA (see Note 3): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89°C/W
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. This value is limited to 6 V maximum.
2. This value is limited to 4.6 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions for VCCB at 5 V (see Note 4)
MIN
MAX
4.5
5.5
UNIT
VCCB
VIH
Supply voltage
VIL
VIA
Low-level input voltage
Input voltage
0
VOB
IOH
Output voltage
0
High-level output current
–24
IOL
∆t/∆v
Low-level output current
24
mA
Input transition rise or fall rate
10
ns/V
High-level input voltage
2
V
V
0.8
V
VCCB
VCCB
V
V
mA
TA
Operating free-air temperature
–40
85
°C
NOTE 4: All unused inputs of the device must be held at the associated VCC or GND to ensure proper device operation. Refer to the TI application
report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SN74ALVC164245
16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416F – MARCH 1994 – REVISED FEBRUARY 1999
recommended operating conditions for VCCA at 3.3 V (see Note 4)
MIN
MAX
2.7
3.6
VCCA
VIH
Supply voltage
VIL
VIB
Low-level input voltage
Input voltage
0
VOA
Output voltage
0
High-level input voltage
VCCA = 2.7 V to 3.6 V
VCCA = 2.7 V to 3.6 V
IOH
High level output current
High-level
VCCA = 2.7 V
VCCA = 3 V
IOL
Low level output current
Low-level
VCCA = 2.7 V
VCCA = 3 V
∆t/∆v
Input transition rise or fall rate
2
UNIT
V
V
0.8
V
VCCA
VCCA
V
–12
12
–24
24
10
V
mA
mA
ns/V
TA
Operating free-air temperature
–40
85
°C
NOTE 4: All unused inputs of the device must be held at the associated VCC or GND to ensure proper device operation. Refer to the TI application
report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range for VCCB = 5 V
(unless otherwise noted) (see Note 5)
PARAMETER
TEST CONDITIONS
IOH = –100
100 µA
VOH (A to B)
IOH = –24
24 mA
IOL = 100 µA
VOL (A to B)
IOL = 24 mA
II
IOZ‡
Control inputs
A or B ports
ICC
∆ICC§
VI = VCCB or GND
VO = VCCB or GND
VI = VCCB or GND,
One input at 3.4 V,
Ci
Control inputs
Cio
A or B ports
IO = 0
Other inputs at VCCB or GND
VI = VCCB or GND
VO = VCCB or GND
VCCB
4.5 V
MIN
5.5 V
5.3
4.5 V
3.7
5.5 V
4.7
TYP†
MAX
UNIT
4.3
V
4.5 V
0.2
5.5 V
0.2
4.5 V
0.55
5.5 V
0.55
5.5 V
±5
µA
5.5 V
±10
µA
5.5 V
40
µA
750
µA
4.5 V to 5.5 V
5V
6.5
5V
6.5
V
pF
pF
† Typical values are measured at VCC = 3.3 V, TA = 25°C.
‡ For I/O ports, the parameter IOZ includes the input leakage current.
§ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than at 0 or the associated VCC.
NOTE 5: VCCA = 2.7 V to 3.6 V
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN74ALVC164245
16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416F – MARCH 1994 – REVISED FEBRUARY 1999
electrical characteristics over recommended operating free-air temperature range for VCCA = 3.3 V
(unless otherwise noted) (see Note 6)
PARAMETER
TEST CONDITIONS
VCCA
2.7 V to 3.6 V
IOH = –100 µA
VOH (B to A)
2.7 V
IOH = –12
12 mA
IOH = –24 mA
IOL = 100 µA
VOL (B to A)
II
IOZ‡
Control inputs
ICC
∆ICC§
Ci
TYP†
MAX
VCC–0.2
2.2
3V
2.4
3V
2
UNIT
V
2.7 V to 3.6 V
0.2
V
IOL = 12 mA
IOL = 24 mA
2.7 V
0.4
3V
0.55
VI = VCCA or GND
VO = VCCA or GND
3.6 V
±5
µA
3.6 V
±10
µA
3.6 V
40
µA
750
µA
VI = VCCA or GND,
One input at VCCA – 0.6 V,
Control inputs
MIN
IO = 0
Other inputs at VCCA or GND
3 V to 3.6 V
VI = VCCA or GND
VO = VCCA or GND
3.3 V
6.5
pF
Cio
A or B ports
3.3 V
8.5
pF
† Typical values are measured at VCC = 3.3 V, TA = 25°C.
‡ For I/O ports, the parameter IOZ includes the input leakage current.
§ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than at 0 or the associated VCC.
NOTE 6: VCCB = 5 V ± 0.5 V
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figures 1 and 2)
FROM
(INPUT)
PARAMETER
VCCB = 5 V ± 0.5 V
VCCA = 3.3 V
VCCA = 2.7 V
± 0.3 V
TO
(OUTPUT)
MIN
tpd
d
ten
MAX¶
MIN¶
MAX¶
A
B
5.9
1
5.8
B
A
6.7
1.2
5.8
UNIT
ns
OE
B
9.3
1
8.9
ns
tdis
OE
B
9.2
2.1
9.5
ns
ten
OE
A
10.2
2
9.1
ns
OE
A
9
2.9
8.6
ns
tdis
¶ This limit can vary among suppliers.
operating characteristics, TA = 25°C
PARAMETER
TEST CONDITIONS
VCCA = 3.3 V
VCCB = 5 V
UNIT
TYP
Cpd
d
Power dissipation capacitance
Outputs enabled (A or B)
Outputs disabled (A or B)
POST OFFICE BOX 655303
CL = 50 pF,
pF
• DALLAS, TEXAS 75265
f = 10 MHz
56
6
pF
5
SN74ALVC164245
16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416F – MARCH 1994 – REVISED FEBRUARY 1999
PARAMETER MEASUREMENT INFORMATION
VCCA = 2.7 V AND 3.3 V ± 0.3 V
6V
S1
500 Ω
From Output
Under Test
Open
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
6V
GND
3V
Output
Control
(low-level
enabling)
LOAD CIRCUIT
1.5 V
0V
tPZL
3V
Input
1.5 V
1.5 V
0V
tPLH
1.5 V
tPLZ
≈3V
1.5 V
tPZH
VOH
Output
Output
Waveform 1
S1 at 6 V
(see Note B)
tPHL
1.5 V
VOL
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
1.5 V
VOL + 0.3 V
VOL
tPHZ
1.5 V
VOH
VOH – 0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN74ALVC164245
16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416F – MARCH 1994 – REVISED FEBRUARY 1999
PARAMETER MEASUREMENT INFORMATION
VCCB = 5 V ± 0.5 V
2
S1
500 Ω
From Output
Under Test
CL = 50 pF
(see Note A)
VCCB
Open
GND
500 Ω
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
2
VCCB
GND
2.7 V
Output
Control
(low-level
enabling)
LOAD CIRCUIT
TEST
1.5 V
0V
tPZL
2.7 V
Input
1.5 V
1.5 V
0V
tPLH
Output
Output
Waveform 1
S1 at 2
VCCB
(see Note B)
VOH
50% VCCB
VOL
50% VCCB
tPLZ
≈ VCCB
50% VCCB
tPZH
tPHL
1.5 V
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
20% VCCB
VOL
tPHZ
50% VCCB
80% VCCB
VOH
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 2. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
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Copyright  1999, Texas Instruments Incorporated