MICROCHIP MCP603

MCP601/602/603/604
2.7V to 5.5V Single Supply CMOS Op Amps
FEATURES
•
•
•
•
•
•
•
•
•
ates with a single supply voltage that can be as low as
2.7V, while drawing less than 325µA of quiescent current. In addition, the common-mode input voltage
range goes 0.3V below ground, making these amplifiers ideal for single supply operation.
Specifications rated from 2.7V to 5.5V supplies
Rail-to-rail swing at output
Common-mode input swing below ground
2.8MHz GBWP
Unity gain stable
Low power IDD = 325µA max
Chip Select capability with MCP603
Industrial temperature range (-40°C to 85°C)
Available in single, dual and quad
These devices are appropriate for low-power battery
operated circuits due to the low quiescent current, for
A/D Converter driver amplifiers because of their wide
bandwidth, or for anti-aliasing filters by virtue of their
low input bias current.
The MCP601, MCP602 and MCP603 are available in
standard 8-lead PDIP, SOIC and TSSOP packages.
The MCP601 is also available in the SOT23-5 package. The quad MCP604 is offered in 14-lead PDIP,
SOIC and TSSOP packages. PDIP and SOIC packages are fully specified from -40°C to +85°C with power
supplies from 2.7V to 5.5V.
APPLICATIONS
•
•
•
•
•
•
•
Portable Equipment
A/D Converter Driver
Photodiode Pre-amps
Analog Filters
Data Acquisition
Notebooks and PDAs
Sensor Interface
TYPICAL APPLICATION
AVAILABLE TOOLS
• Spice Macromodels (at www.microchip.com)
• FilterLab™ Software (at www.microchip.com)
VIN
VDD
-IN
 2000 Microchip Technology Inc.
MCP60X
DESCRIPTION
VOUT
OUT
+IN
VREF
The Microchip Technology Inc. MCP601/602/603/604
family of low power operational amplifiers are offered in
single (MCP601), single with a Chip Select pin feature
(MCP603), dual (MCP602) and quad (MCP604) configurations. These operational amplifiers (op amps) utilize
an advanced CMOS technology, which provides low
bias current, high speed operation, high open-loop gain
and rail-to-rail output swing. This product offering oper-
VSS
Rail-to-Rail
Output Swing
Low Input Bias
Current Over
Temperature
2nd Order Low Pass Filter
PACKAGES
MCP601
MCP601
PDIP, SOIC, TSSOP
8 NC
NC 1
-IN 2
-
+IN 3
+
VSS 4
7 VDD
6 OUT
SOT23-5
+IN 3
5 NC
MCP602
MCP604
PDIP, SOIC, TSSOP
PDIP, SOIC, TSSOP
NC 1
OUT 1
VSS 2
MCP603
PDIP, SOIC, TSSOP
5 VDD
+
-
4 -IN
8 CS
-
7 VDD
-INA 2
+IN 3
+
6 OUT
+INA 3
VSS 4
5 NC
8 VDD
OUTA 1
-IN 2
VSS 4
A
B
+ -
-A+
+D-
13 -IND
6 -INB
+INA 3
5 +INB
VDD 4
11 VSS
+INB 5
10 +INC
-INB 6
OUTB 7
 2000 Microchip Technology Inc.
14 OUTD
OUTA 1
7 OUTB -INA 2
- +
12 +IND
-B+
+
C
-
9 -INC
8 OUTC
DS21314D-page 1
MCP601/602/603/604
1.0
1.1
ELECTRICAL
CHARACTERISTICS
PIN FUNCTION TABLE
NAME
Maximum Ratings*
VDD ..................................................................................7.0V
All inputs and outputs w.r.t. ............. VSS -0.3V to VDD +0.3V
Difference Input voltage ....................................... |VDD - VSS|
Output Short Circuit Current ..................................continuous
Current at Input Pin .......................................................±2mA
Current at Output and Supply Pins .............................±30mA
Storage temperature .....................................-65°C to +150°C
Ambient temp. with power applied ................-55°C to +125°C
Soldering temperature of leads (10 seconds) ............. +300°C
ESD Tolerance .................................3KV Human Body Model
*Notice: Stresses above those listed under “Maximum Ratings”
may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any
other conditions above those indicated in the operational listings
of this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
FUNCTION
+IN, +INA, +INB, +INC, +IND
Non-inverting Input
Terminals
-IN, -INA, -INB, -INC, -IND
Inverting Input Terminals
VDD
Positive Power Supply
VSS
Negative Power Supply
OUT, OUTA, OUTB, OUTC, OUTD Output Terminals
CS
Chip Select
NC
No internal connection
to IC
DC CHARACTERISTICS
Unless otherwise indicated, all limits are specified for VDD = +2.7V to +5.5V, VSS = GND, TA = 25 °C, VCM = VDD/2, RL = 100kΩ to
VDD/2, and VOUT ~ VDD/2
PARAMETERS
INPUT OFFSET VOLTAGE
Input Offset Voltage
(1)
Over Temperature
Drift with Temperature
Power Supply Rejection
INPUT CURRENT AND IMPEDANCE
Input Bias Current
Over Temperature(2)
SYMBOL
MIN.
VOS
-2
TYP.
MAX.
UNITS
+2
mV
CONDITIONS
VOS
-3
+3
mV
TA= -40°C to +85°C
dVOS/dT
—
±2.5
—
µV/°C
TA= -40°C to +85°C
PSRR
—
40
100
µV/V
for VDD = 2.7V to 5.5V
IB
—
1
—
pA
IB
—
20
60
pA
TA= -40°C to +85°C
Input Offset Bias Current
IOS
—
1
—
pA
Common Mode Input Impedance
ZCM
—
1013||6
—
Ω||pF
Differential Input Impedance
ZDIFF
—
1013||3
—
Ω||pF
COMMON MODE
Common-Mode Input Range
VCM
VSS−0.3
—
VDD−1.2
V
CMRR
75
90
—
dB
VDD = 5V,
VCM = -0.3 to 3.8V
OPEN LOOP GAIN
DC Open Loop Gain
AOL
100
115
—
dB
RL = 25kΩ to VDD/2,
50mV < VOUT <
(VDD − 50 mV)
DC Open Loop Gain
AOL
95
110
—
dB
RL = 5kΩ to VDD/2,
100mV < VOUT <
(VDD − 100mV)
VOL, VOH
VSS + 0.015
—
VDD − 0.020
V
RL = 25kΩ to VDD/2
VOL, VOH
VSS + 0.045
—
VDD − 0.060
V
RL = 5kΩ to VDD/2
VOUT
VSS + 0.050
—
VDD − 0.050
V
RL = 25kΩ to VDD/2,
AOL ≥ 100dB
VOUT
VSS + 0.100
—
VDD − 0.100
V
RL = 5kΩ to VDD/2,
AOL ≥ 95dB
20
—
mA
Common-Mode Rejection Ratio
OUTPUT
Low Level/High Level Output Swing
Linear Region Maximum Output
Voltage Swing
Output Short Circuit Current
ISC
POWER SUPPLY
Supply Voltage
VDD
Quiescent Current Per Amp
IQ
2.7
—
5.5
V
230
325
µA
VOUT = 2.5V,
VDD = 5V
IL = 0
Note 1: Max. and Min. specified for PDIP and SOIC packages only. Typical refers to all other packages
Note 2: Max. and Min. specified for PDIP, SOIC, and TSSOP packages only. Typical refers to all packages.
DS21314D-page 2
 2000 Microchip Technology Inc.
MCP601/602/603/604
AC CHARACTERISTICS
Unless otherwise indicated, all limits are specified for VDD = +2.7V to +5.5V, VSS = GND, TA = 25°C, VCM = VDD/2, RL = 100kΩ to
VDD/2, and VOUT ~ VDD/2
PARAMETERS
SYMBOL
MIN.
TYP.
GBWP
—
2.8
Phase Margin
Θm
—
50
Slew Rate
SR
Gain Bandwidth Product
Setting Time to 0.01%
MAX.
UNITS
MHz
—
degrees
—
2.3
—
V/µs
—
4.5
—
µs
CONDITIONS
VDD = 5V
CL = 50pF, VDD = 5V
G = +1V/V, VDD = 5V
for ∆VOUT = 3.8VSTEP,
CL = 50pF, VDD = 5V,
G = +1V/V
NOISE
Input Voltage Noise
en
—
7
—
µVP-P
Input Voltage Noise Density
en
—
29
—
nV/ Hz
f = 1kHz
Input Current Noise Density
in
—
0.6
—
fA/ Hz
f = 1kHz
f = 0.1Hz to 10Hz
SPECIFICATIONS FOR MCP603 CHIP SELECT FEATURE
Unless otherwise indicated, all limits are specified for VDD = +2.7V to +5.5V, VSS = GND, TA = 25°C, VCM = VDD/2, RL = 100kΩ to
VDD/2, and VOUT ~ VDD/2
PARAMETERS
SYMBOL
MIN.
TYP.
MAX.
UNITS
CONDITIONS
CS Logic Threshold, Low
VIL
VSS
0.42 VDD
0.2 VDD
V
For entire VDD range
CS Input Current, Low
ICSL
-1.0
—
—
µA
CS = 0.2VDD
—
1
—
nA
CS LOW SPECIFICATIONS
Amplifier Output Leakage, CS High
CS HIGH SPECIFICATIONS
CS Logic Threshold, High
VIH
0.8 VDD
0.51 VDD
VDD
V
For entire VDD range
CS Input High, Shutdown CS Pin
Current
ICSH
—
0.7
2.0
µA
CS = VDD
IQ
—
0.7
2.0
µA
CS = VDD
CS Low to Amplifier Output High
Turn-on Time
tON
—
3.1
10
µs
CS low ≤ 0.2VDD
CS High to Amplifier Output High Z
tOFF
—
100
—
ns
CS high ≥ 0.8VDD, No
Load
—
0.3
—
V
CS Input High, Shutdown GND
Current
DYNAMIC SPECIFICATIONS
CS Threshold Hysteresis
TEMPERATURE SPECIFICATIONS
Unless otherwise indicated, all limits are specified for VDD = +2.7V to +5.5V, VSS = GND
PARAMETERS
SYMBOL
MIN.
TYP.
MAX.
UNITS
CONDITIONS
TEMPERATURE RANGE
Specified Temperature Range
TA
-40
—
+85
°C
Operating Temperature Range
TA
-40
—
+85
°C
Storage Temperature Range
TA
-65
—
+150
°C
Thermal Resistance, 5L-SOT23-5
θJA
—
256
—
°C/W
Thermal Resistance, 8L-PDIP
θJA
—
85
—
°C/W
Thermal Resistance, 8L-SOIC
θJA
—
163
—
°C/W
Thermal Resistance, 8L-TSSOP
θJA
—
124
—
°C/W
Thermal Resistance, 14L-PDIP
θJA
—
70
—
°C/W
Thermal Resistance, 14L-SOIC
θJA
—
120
—
°C/W
Thermal Resistance, 14L-TSSOP
θJA
—
100
—
°C/W
THERMAL PACKAGE RESISTANCE
 2000 Microchip Technology Inc.
DS21314D-page 3
MCP601/602/603/604
2.0
TYPICAL PERFORMANCE CURVES
Note: Unless otherwise indicated, VDD = +2.7V to +5.5V, TA = 25°C, VCM = VDD/2, RL = 25kΩ to VDD/2 and VOUT ~ VDD/2
260
Gain
80
150
100
60
50
40
0
20
-50
0
IL = 0
200
-100
Phase
-20
-150
-40
-200
-60
-250
10M
10000000
0.1
0
10
10
FIGURE 2-1:
Frequency
1K
100K
1000
100000
Frequency (Hz)
Quiescent Current per Amplifier (µA)
Open Loop Gain (dB)
100
C L = 50pF,
R L = 100kΩ
V DD = 5V
Phase Margin (degrees)
120
220
200
180
160
140
120
100
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Power Supply, VDD (V)
Open Loop Gain, Phase Margin vs.
FIGURE 2-4:
3.5
Quiescent Current vs. Power Supply
Quiescent Current per Amplifier (µA)
300
High-to-Low
Transition
3
Slew Rate (V/ µs)
240
CL=50pF,
RL=100kΩ,
VDD=5V
2.5
Low-to-High
Transition
2
1.5
1
-40
-20
0
20
40
60
IL=0
280
260
240
VDD = 5.5V
220
200
VDD = 2.7V
180
160
140
120
100
80
-40
Temperature (°C)
-20
0
20
40
60
80
Temperature (°C)
Slew Rate vs. Temperature
FIGURE 2-5:
4.5
85
CL = 55pF
Gain Bandwidth Product
3.5
75
3
70
2.5
65
2
60
1.5
55
Phase
1
Quiescent Current vs. Temperature
10000
80
50
0.5
45
0
Phase Margin (degrees)
Gain Bandwidth Product (MHz)
4
Input Voltage Noise Density (nV/ √Hz)
FIGURE 2-2:
RL = 10kΩ
1000
100
40
-40
-20
0
20
40
60
Temperature (°C)
80
10
0.1
1
10
100
1k
10k
100k
1M
Frequency (Hz)
FIGURE 2-3:
Temperature
Gain Bandwidth Product vs.
DS21314D-page 4
FIGURE 2-6:
Frequency
Input
Voltage
Noise
Density
vs.
 2000 Microchip Technology Inc.
MCP601/602/603/604
Note: Unless otherwise indicated, VDD = +2.7V to +5.5V, TA = 25°C, VCM = VDD/2, RL = 25kΩ to VDD/2 and VOUT ~ VDD/2
40
60
VDD = 5.5V
RL = 100kΩ
Sample Size = 203 op amp
Number of Occuracnes
35
Number of Occurances
30
VDD = 5.5V
RL = 100kΩ
Sample Size = 203
Temperature Range = -40°C to +85°C
50
25
20
15
10
40
30
20
10
5
0
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0.00
-0.25
-0.50
-0.75
-1.00
-1.25
-1.50
-2.00
-1.75
0
0
1
FIGURE 2-7: Offset Voltage
Occurrences with VDD = 5.5V
40
Number
of
4
5
6
7
8
60
VDD = 2.7V
RL = 100kΩ
Sample Size = 203
Temperature Range = -40°C to +85°C
50
30
25
20
15
10
40
30
20
10
5
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0.00
-0.25
-0.50
-0.75
-1.00
-1.25
-1.50
-1.75
-2.00
0
0
0
1
FIGURE 2-8: Offset Voltage
Occurrences with VDD = 2.7V.
vs.
Number
of
RL = 100kΩ
300
200
100
VDD = 2.7V
0
-100
VDD = 5.5V
-200
-300
-400
-500
-40
-20
0
20
40
60
80
Temperature (°C)
FIGURE 2-9: Normalized Offset Voltage vs. Temperature with VDD = 2.7V
 2000 Microchip Technology Inc.
3
4
5
6
7
8
FIGURE 2-11: Offset Voltage Drift vs. Number of
Occurrences with VDD = 2.7V
Common Mode Rejection Ratio, Power Supply Rejection
Ratio (dB)
500
400
2
Change in Offset Voltage with Temperature (µV/°C)
Offset Voltage (mV)
Offset Voltage (µV)
3
FIGURE 2-10: Offset Voltage Drift vs. Number of
Occurrences with VDD = 5.5V
Number of Occurances
Number of Occurances
vs.
VDD = 2.7V
RL = 100kΩ
Sample Size = 203 op amp
35
2
Change in Offset Voltage with Temperature (µV/°C)
Offset Voltage (mV)
100
CMRR
VDD = 2.7V
VCM = -0.3V to 1.5V
95
PSRR,
VDD = 2.7V to 5.5V
90
CMRR
VDD = 5.5V
VCM = -0.3V to 4.3V
85
80
75
-40
-20
0
20
40
60
80
Temperature (° C)
FIGURE 2-12: Common-Mode Rejection Ratio,
Power Supply Rejection Ratio vs. Temperature
DS21314D-page 5
MCP601/602/603/604
Note: Unless otherwise indicated, VDD = +2.7V to +5.5V, TA = 25°C, VCM = VDD/2, RL = 25kΩ to VDD/2 and VOUT ~ VDD/2
240
Representative Part
220
VDD = 5.5V
80
180
PSRR, CMRR (dB)
Offset Voltage (µV)
100
PSRR+
200
160
140
120
VDD = 2.7V
100
VDD=5.0V,
CL=50 pF
PSRR-
60
CMRR
40
20
80
0
60
-20
40
11
-1
0
1
2
3
4
10
10
100
100
1K
1000
5
Common Mode Voltage (V)
FIGURE 2-13: Offset Voltage vs. Common-Mode
Voltage
100K
100000
1M 10000000
10M
1000000
FIGURE 2-16: Common-Mode
Rejection
Power Supply Rejection Ratio vs. Frequency
Ratio,
20
20
18
16
14
12
10
Input Bias Current
8
6
Input
Offset
Current
Input Bias Current Levels are Typically
less than 1pA Below 25°C
4
2
VDD = 5.5V
RL = ∞
TA = 85 °C
18
VDD = 5.5V
Input Bias, Input Offset Current (pA)
Input Bias Current, Input Offset Current (pA)
10K
10000
Frequency (Hz)
16
Input Bias Current
14
12
10
8
6
4
Input Offset
2
0
-40
-20
0
20
40
60
0
80
0
0.5
1
1.5
Temperature (°C)
2
2.5
3
3.5
4
4.5
5
5.5
Common-mode Voltage (V)
FIGURE 2-14: Input Bias Current, Input Offset
Current vs. Temperature
FIGURE 2-17: Input Bias Current, Input Offset
Current vs. Common Mode Input Voltage
120
115
110
110
Open Loop Gain (dB)
DC Open Loop Gain (dB)
VDD = 5.5V
VDD = 2.7V
100
90
105
100
95
90
80
00
2K
20000
4K
40000
6K
60000
8K
80000
10K
100000
Load Resistance (Ω)
FIGURE 2-15: DC Open Loop Gain vs. Output Load
DS21314D-page 6
2
2.5
3
3.5
4
4.5
5
5.5
Power Supply Voltage, VDD (V)
FIGURE 2-18: DC Open Loop Gain vs. Power Supply
 2000 Microchip Technology Inc.
MCP601/602/603/604
Note: Unless otherwise indicated, VDD = +2.7V to +5.5V, VSS = GND, TA = 25°C, VCM = VDD/2, RL = 25kΩ to VDD/2 and
VOUT ~ VDD/2
120
3.5
100
115
90
2.5
80
2
70
1.5
60
1
0.5
50
Phase Margin
VDD = 5.0V,
CL= 50 pF
Phase Margin (degs)
Gain-Bandwidth (MHz)
3
DC Open Loop Gain (dB)
Gain-Bandwidth
VDD = 5.5V,
VOUT = 50mV to 5.45V
110
105
100
95
VDD = 2.7V,
VOUT = 50mV to 2.65V
90
40
85
0
100
100
1000
1K
30
100000
100K
10000
10K
80
Resistance (W)
-40
FIGURE 2-19: Gain Bandwidth, Phase Margin vs.
Load Resistance
0
20
40
Temperature (°C)
80
12
VDD-VOH
VDD=5.5V
600
10
400
VOH, VOL (mV)
VOL - VSS
VDD=5.5V
500
VDD-VOH
VDD=2.7V
300
VDD-VOH, VDD=5.5V
8
VOL-VSS, VDD=5.5V
6
VDD-VOH, VDD=2.7V
4
200
100
VOL - VSS
VDD=2.7V
VOL-VSS, VDD=2.7V
2
0
0
100
100
1K
1000
10K
10000
100K
100000
-40
-20
0
FIGURE 2-20: Low Level and High Level Output
Swing vs. Resistive Load
40
60
80
FIGURE 2-23: Low Level and High Level Output
Swing vs. Temperature
40
5.5
VDD = 5V
5
Positive Short Circuit Current
VDD = 5.5V
30
Short Circuit Current (mA)
4.5
4
3.5
3
2.5
2
1.5
1
20
10
0
Positive Short Circuit Current
VDD = 2.7V
Negative Short Circuit Current
VDD = 2.7V
-10
-20
-30
Negative Short Circuit Current
VDD = 5.5V
0.5
-40
0
1K
1000
20
Temperature (°C)
Load Resistance (Ω)
Full-Scale Output Voltage Swing (V)
60
FIGURE 2-22: DC Open Loop Gain vs. Temperature
700
VDD-VOH, VOL-VSS (mV)
-20
10K
10000
100K
100000
1M
1000000
10M
10000000
-40
-30
-20
-10
0
FIGURE 2-21: Maximum Full Scale Output Voltage
Swing vs. Frequency
 2000 Microchip Technology Inc.
10
20
30
40
50
60
70
80
Temperature (°C)
Frequency (Hz)
FIGURE 2-24: Output
Temperature
Short
Circuit
Current
vs.
DS21314D-page 7
MCP601/602/603/604
Note: Unless otherwise indicated, VDD = +2.7V to +5.5V, VSS = GND, TA = 25°C, VCM = VDD/2, RL = 25kΩ to VDD/2 and
VOUT ~ VDD/2
CL=50pF, RL=100kΩ,
VDD = 5V
RL = 100kΩ
CL = 50pF
G = +1V/V
500 mV / div
500 mV/div
VDD = 5V, G= -1V/V
1µS / div
1µS / div
FIGURE 2-25: Large Signal Non-Inverting Signal
Pulse Response
FIGURE 2-28: Large Signal Inverting Signal Pulse
Response
50 mV/div
CL=50 pF
G = +1V/V
50 mV/div
VDD = 5V
RL = 100kΩ
CL=50pF, RL=100kΩ,
VDD = 5V, G= -1V/V
1µS / div
1µS / div
FIGURE 2-26: Small
Response
Signal
Non-inverting
Pulse
FIGURE 2-29: Small Signal Inverting Signal Pulse
Response
100
500 mV/div
CL = 50pF
G = +1V/V
VIN+ = 2.5V
Amplifier
Output
Active
VDD = 5V
0
GND Current (µA)
RL = 100kΩ to GND
CS
-100
-200
-300
-400
-500
-600
VDD = 5.5V
-700
Hi-Z
-800
0.0
DS21314D-page 8
Select
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
CS Pin Voltage (V)
5 µS/div
FIGURE 2-27: Chip
Response Time
0.5
to
Amplifier
Output
FIGURE 2-30: GND Current vs. CS Voltage
 2000 Microchip Technology Inc.
MCP601/602/603/604
Note: Unless otherwise indicated, VDD = +2.7V to +5.5V, VSS = GND, TA = 25°C, VCM = VDD/2, RL = 25kΩ to VDD/2 and
VOUT ~ VDD/2
0.9
0.8
3
Internal CS Switch Output (V)
0.7
CS Pin Current (uA)
V DD = 5.5V
0.6
0.5
0.4
0.3
0.2
0.1
0
Amplifier Output Active (driven)
2.5
VDD = 5V
2
CS Input Low
to High
1.5
CS Input High
to Low
1
Amplifier Output in
Hi-Z state
0.5
0
-0.5
-0.1
0.0
1.0
2.0
3.0
4.0
5.0
6.0
CS Pin Voltage (V)
FIGURE 2-31: Input CS Current vs. CS Voltage
0
1
2
3
4
CS Input Voltage (V)
5
6
FIGURE 2-33: CS hysteresis
Channel to Channel Isolation (dB)
-150
-145
RL = ∞
-140
-135
-130
-125
-120
-115
-110
-105
-100
100
100
1K
1000
10K
10000
Frequency (Hz)
100K
100000
1M
1000000
FIGURE 2-32: Channel to Channel Separation
 2000 Microchip Technology Inc.
DS21314D-page 9
MCP601/602/603/604
APPLICATIONS INFORMATION
The MCP601/602/603/604 family of operational amplifiers are fabricated on Microchip’s state-of-the-art
CMOS process. They are unity gain stable and suitable
for a wide range of general purpose applications. With
this family of operational amplifiers, the power supply
pin should be by-passed with a 1µF capacitor.
3.1
Rail-to-Rail Output Swing
There are two specifications that describe the output
swing capability of the MCP601/602/603/604 family of
operational amplifiers. The first specification, Low Level
and High Level Output Voltage Swing, defines the
absolute maximum swing that can be achieved under
specified loaded conditions. For instance, the Low
Level Output Voltage Swing of the MCP601/602/603/
604 family is specified to be able to swing at least to
15mV from the negative rail with a 25kΩ load to VDD/2.
VDD
10
8
0.5
0.3
VOH
VOL
6
0.1
Input Signal (V)
4
-0.1
VSS
2
-0.3
0
-0.5
VOH, VOL (0.1mV/div)
This output swing performance is shown in Figure 3-1,
where the output of an MCP601 is configured in a gain
of +2V/V and over driven with a 40kHz triangle wave. In
this figure, the degradation of the output swing linearity
is clearly illustrated. This degradation occurs after the
point at which the open loop gain of the amplifier is
specified and before the amplifier reaches its maximum
and minimum output swing.
G=+2V/V, VDD= 5V
-0.7
10
20
30
40
50
Time (µs)
FIGURE 3-1:
Swing
The classical definition of the open loop gain of an
amplifier is:
AOL = ∆VOUT / ∆VOS
where:
AOL is the DC open loop gain of the amplifier,
∆VOUT is equal to (VDD - 50mV) - (VSS + 50mV)
for RL= 25kΩ, and
∆VOS is the change in offset voltage with the
changing output voltage of the amplifier.
3.2
Input Voltage and Phase Reversal
Since the MCP601/602/603/604 amplifier family is
designed with CMOS devices, it does not exhibit phase
inversion when the input pins exceed the negative supply voltage. Figure 3-2 shows an input voltage exceeding both supplies with no resulting phase inversion.
6
G = +2V/V
VDD = 5V
5
4
Output Signal
3
Input Signal
2
1
0
-1
0
-2
0
The Linear Region Maximum Output Voltage Swing of
the MCP601/602/603/604 family is specified within
50mV from the positive and negative rail with a 25kΩ
load and 100mV from the rails with a 5kΩ load. The
overriding condition that defines the linear region of the
amplifier is the open loop gain that is specified over that
region. In the voltage output region between VSS +
50mV and VDD - 50mV, the open loop gain is specified
to 100dB (min) with a 25kΩ load.
Input and Output Voltage (V)
3.0
Low Level and High Level Output
10
20
30
40
50
Time(µS)
FIGURE 3-2: The MCP601/602/603/604 family of op
amps do not have phase reversal issues. For the
graph, the amplifier is in a unity gain or buffer
configuration.
The second specification that describes the output
swing capability of these amplifiers is the Linear Region
Maximum Output Voltage Swing. This specification
defines the maximum output swing that can be
achieved while the amplifier is still operating in its linear
region.
DS21314D-page 10
 2000 Microchip Technology Inc.
MCP601/602/603/604
80
3.5
Gain-Bandwidth
3
VDD=5.0V,
70
RL=100 kΩ
60
2.5
2
1.5
50
40
Phase
Margin
30
1
20
0.5
10
0
10
10
100
100
1E3
1000
10E3
10000
100E3
100000
Phase Margin (degrees)
4
Gain-Bandwidth (MHz)
The maximum operating common-mode voltage that
can be applied to the inputs is VSS - 0.3V to VDD - 1.2V.
In contrast, the absolute maximum input voltage is VSS
- 0.3V and VDD + 0.3V. Voltages on the input that
exceed this absolute maximum rating can cause excessive current to flow in or out of the input pins. Current
beyond ±2mA can cause possible reliability problems.
Applications that exceed this rating must be externally
limited with an input resistor as shown in Figure 3-3.
0
1E6
1000000
Capacitance (pF)
FIGURE 3-4: Gain Bandwidth, Phase Margin vs.
Capacitive Load
MCP60X
VDD
RIN
RISO
RIN = (Maximum expected voltage - VDD) / 2mA
or
(VSS - Minimum expected voltage)/ 2mA.
FIGURE 3-3: If the inputs of the amplifier exceed the
Absolute Maximum Specifications, an input resistor,
RIN , should be used to limit the current flow into that
pin.
3.3
Capacitive Load and Stability
Driving capacitive loads can cause stability problems
with many of the higher speed amplifiers.
For any closed loop amplifier circuit, a good rule of
thumb is to design for a phase margin that is no less
than 45°. This is a conservative theoretical value, however, if the phase margin is lower, layout parasitics can
degrade the phase margin further causing a truly
unstable circuit. A system phase shift of 45° will have
an overshoot in its step response of approximately
25%.
A buffer configuration with a capacitive load is the most
difficult configuration for an amplifier to maintain stability. The Phase versus Capacitive Load of the MCP60X
amplifier is shown in Figure 3-4. In this figure, it can be
seen that the amplifier has a phase margin above 40°,
while driving capacitance loads up to 100pF.
 2000 Microchip Technology Inc.
MCP60X
VOUT
CL
VIN
FIGURE 3-5: Amplifier circuits that can be used
when driving heavy capacitive loads.
If the amplifier is required to drive larger capacitive
loads, the circuit shown in Figure 3-5 can be used. A
small series resistor (RISO) at the output of the amplifier
improves the phase margin when driving large capacitive loads. This resistor decouples the capacitive load
from the amplifier by introducing a zero in the transfer
function.
This zero adjusts the phase margin by approximately:
∆θm = tan-1 (2π GBWP x RISO x CL)
where:
∆θm is the improvement in phase margin,
GBWP is the gain bandwidth product of the
amplifier,
RISO is the capacitive decoupling resistor, and
CL is the load capacitance
DS21314D-page 11
MCP601/602/603/604
3.4
The Chip Select Option of the MCP603
The MCP603 is a single amplifier with a Chip Select
option. When CS is pulled high the supply current
drops to 0.7µA (typ), which is pulled through the CS pin
to VSS. In this state, the amplifier is put into a high
impedance state. By pulling CS low or letting the pin
float, the amplifier is enabled. Figure 3-6 shows the output voltage and supply current response to a CS pulse.
CS
VIH
VIL
tON
Output
tOFF
Hi-Z
Hi-Z
230µA (typ)
VDD Supply
Current
2.0nA (typ)
GND
Current
0.7µA (typ)
0.7µA (typ)
CS
Current
FIGURE 3-6:
3.5
230µA (typ)
2.0nA (typ)
0.7µA (typ)
0.7µA (typ)
2nA(typ)
Timing Diagram for the CS Function of the MCP603 Amplifier
Layout Considerations
In applications where low input bias current is critical,
PC board surface leakage effects and signal coupling
from trace to trace need to be taken into consideration.
-In
3.5.1
+In
V-
SURFACE LEAKAGE
Surface leakage across a PC board is a consequence
of differing DC voltages between two traces combined
with high humidity, dust or contamination on the board.
For instance, the typical resistance from PC board
trace to pad is approximately 1012Ω under low humidity
conditions. If an adjacent trace is biased to 5V and the
input pin of the amplifier is biased at or near zero volts,
a 5pA leakage current will appear on the amplifier’s
input node. This type of PCB leakage is five times the
room temperature input bias current (1pA, typ) of the
MCP601/602/603/604 family of amplifiers.
Guard Ring
FIGURE 3-7: Example of Guard Ring for the
MCP601, the A-amplifier of the MCP602 or the
MCP603 in a PC Board Layout
The simplest technique that can be used to reduce the
effects of PC board leakage is to design a ring around
sensitive pins and traces. An example of this type of
layout is shown in Figure 3-7.
DS21314D-page 12
 2000 Microchip Technology Inc.
MCP601/602/603/604
Circuit examples of ring implementations are shown in
Figure 3-8. In Figure 3-8A, B and C, the guard ring is
biased to the common-mode voltage of the amplifier.
This type of guard ring is most effective for applications
where the common-mode voltage of the input stage
changes, such as buffers, inverting gain amplifiers or
instrumentation amplifiers.
The strategy shown in Figure 3-8D, biases the common-mode voltage and guard ring to ground. This type
of guard ring is typically used in precision photo sensing circuits.
Figure 3-8A
3.5.2
SIGNAL COUPLING
The input pins of the MCP601/602/603/604 amplifiers
have a high impedance providing an opportunity for
noise injection, if layout issues are not considered.
These high impedance input terminals are sensitive to
injected currents. This can occur if the trace from a high
impedance input is next to a trace that has fast changing voltages, such as a digital or clock signal. When a
high impedance trace is in close proximity to a trace
with these types of voltage changes, charge is capacitively coupled into the high impedance trace.
C=
w x L x eo x er
pF
d
PCB Trace
MCP60X
d
L
w
(typ 0.003mm)
Figure 3-8B
w= thickness of PCB trace
PCB
Cross-Section
L= length of PCB trace
d= distance between the two PCB traces
MCP60X
FIGURE 3-9:
Capacitors can be built with PCB
traces allowing for coupling of signals from one trace
to another.
As shown in Figure 3-9, the value of the capacitance
between two traces is primarily dependent on the distance (d) between the traces and the distance that the
two traces are in parallel (L). From this model, the
amount of current generated into the high impedance
trace is equal to:
Figure 3-8C
I = C ∂V/∂t
MCP60X
Voltage
where:
(could be ground)
I equals the current that appears on the high
impedance trace,
Figure 3-8D
C equals the value of capacitance between the two
PCB traces,
Reference
VDD
∂V equals the change in voltage of the trace that is
switching, and
∂t equals the amount of time that the voltage
change took to get from one level to the next.
MCP60X
FIGURE 3-8: Examples of how to design PC Board
traces to minimize leakage paths to the high
impedance input pins of the MCP601/602/603/604
amplifiers.
 2000 Microchip Technology Inc.
DS21314D-page 13
MCP601/602/603/604
3.6
Typical Applications
3.6.1
ANALOG FILTERS
of poles that are required for the application. Finally, the
program will generate a SPICE macromodel, which can
be used for spice simulations.
Examples of two second order low pass filters are
shown in Figure 3-10 and Figure 3-11. The filter in Figure 3-10 can be configured for gain of +1V/V or greater.
The filter in Figure 3-11 can be configured for inverting
gains.
Sallen-Key
C2
R2
VIN
C1
R1
3.6.2
INSTRUMENTATION AMPLIFIER
CIRCUITS
The instrumentation amplifier has a differential input,
which subtracts one analog signal from another and
rejects common mode signals. This amplifier also provides a single ended analog output signal. The three op
amp instrumentation amplifier is illustrated in Figure
3-12 and the two op amp instrumentation amplifier is
shown in Figure 3-13.
VDD
VOUT
MCP60X
V2
*
R4
R3
MCP60X
VDD
R4
R3
R2
RG
VOUT
VIN
K/(R1R2C2C1)
=
s2+s(1/R1C2+1/R2C2+1/R2C1 – K/R2C1+1/R1R2C2C1)
K = 1 + R4 /R3
FIGURE 3-10: 2nd Order Low Pass Sallen-Key Filter
R2
VIN
R3
R1
C2
*
MCP60X
R3
R2
VOUT
R4
MCP60X
V1
VREF
2R 2 R 4
R4
VOUT = (V1 –V 2 ) 1 + ---------  ------  + V REF ------ 





RG R3
R3 
*Bypass Capacitor, 1µF
C1
VOUT
MCP60X
FIGURE 3-12: An instrumentation amplifier can be
built using three operational amplifiers and seven
resistors.
RG
VOUT
VIN
=
–1/R1R3C2C1
R1
s2C2C1 + sC1(1/R1 + 1/R2 + 1/R3) + 1/(R2R3C2C1)
FIGURE 3-11: 2nd
Order
Multiple-Feedback Filter
Low
Pass
The MCP601/602/603/604 family of operational amplifiers are particularly well suited for these types of filters.
The low input bias current, which is typically 1pA (up to
60pA at temperature), allows the designer to select
higher value resistors, which in turn reduces the capacitive values. This allows the designer to select surface
mount capacitors, which in turn can produce a compact
layout.
The rail-to-rail output operation of the MCP601/602/
603/604 family of amplifiers make these circuits well
suited for single supply operation. Additionally, the wide
bandwidth allows low pass filter design up to 1/10 of the
GBWP or 300kHz.
VREF
R2
VDD
R1
*
MCP60X
R2
V2
V1
MCP60X
VOUT
R 1 2R 1
VOUT = (V1 –V2 ) 1 + ------ + ---------  + VREF

R 2 RG 
*Bypass Capacitor, 1µF
FIGURE 3-13: An instrumentation amplifier can also
be built using two operational amplifiers and five
resistors.
These filters can be designed using the calculations
provided in the Figures or with Microchip’s interactive
FilterLab software. FilterLab will calculate capacitor
and resistor values, as well as, determine the number
DS21314D-page 14
 2000 Microchip Technology Inc.
MCP601/602/603/604
An advantage of the three op amp configuration is that
it is capable of unity gain operation. A disadvantage, as
compared to the two op amp instrumentation amplifier,
is that the common mode range reduces with higher
gains.
The two op amp configuration uses fewer op amps, so
power consumption is also low. Disadvantages of this
configuration are that the common-mode range
reduces with gain and it must be configured in gains of
two or higher.
3.6.3
PHOTO DETECTION
The amplifiers in the MCP601/602/603/604 family of
devices can be used to easily convert the signal from a
sensor that produces an output current, such as a photodiode, into a voltage. This is implemented with a single resistor and an optional capacitor in the feedback
loop of the amplifier as shown in Figure 3-14.
In contrast, a photodiode that is configured in the photoconductive mode has a reverse bias voltage, which is
applied across the photo sensing element as shown in
Figure 3-14. The width of the depletion region is
reduced when this voltage is applied across the photo
detector, which reduces the photodiode parasitic
capacitance significantly. This reduced parasitic capacitance facilitates high speed operation, however, the linearity and offset errors are not optimized. The design
trade off for this action is increased diode leakage current and linearity errors. A key amplifier specification for
this application is high speed digital communication.
The MCP601/602/603/604 family is well suited for
medium speed photoconductive applications with their
wide bandwidth and rail-to-rail output swing.
Photodiode in Photovoltaic Mode
C2
R2
D1
ID1
Light
MCP60X
VOUT
Photodiode in Photoconductive Mode
VBIAS
R2
D1
Light
ID1
MCP60X
VOUT
VOUT = R2 ID1
FIGURE 3-14: Photo Sensing Circuits Using the
MCP60X Amplifier
A photodiode that is configured in the photovoltaic
mode has no voltage potential placed across the element or is zero biased (Figure 3-14). In this mode, the
light sensitivity and linearity is maximized making it
best suited for precision applications. The key amplifier
specifications for this application are low input bias current, low noise and rail-to-tail output swing. The
MCP601/602/603/604 family is capable of meeting all
three of these difficult requirements.
 2000 Microchip Technology Inc.
DS21314D-page 15
MCP601/602/603/604
4.0
SPICE MACROMODEL
The Spice macromodel for the MCP601, MCP602,
MCP603 and MCP604 simulates the typical amplifier
performance of offset voltage, DC power supply rejection, input capacitance, DC common mode rejection
ratio, open loop gain over frequency, phase margin with
no capacitive load, output swing, DC power supply current, power supply current change with supply voltage,
input common mode range and input voltage noise.
The characteristics of the MCP601, MCP602,
MCP603, and MCP604 amplifiers are similar in terms
of performance and behavior. This single op amp macromodel supports all four devices with the exception of
the chip select function of the MCP603, which is not
modeled.
The listing for this macromodel is shown on the next
page. The most recent revision of the model can be
downloaded from Microchip’s web site at
www.microchip.com.
DS21314D-page 16
 2000 Microchip Technology Inc.
MCP601/602/603/604
.subckt mcp601 1 2 3 4 5
*
| | | | |
*
| | | | Output
*
| | | Negative supply
*
| | Positive Supply
*
| Inverting input
*
Non-inverting input
*
* Macromodel for MCP601 (single), MCP602 (dual), MCP603 (single w/CS), and MCP604 (quad)
*
* The characteristics of the MCP601, MCP602, MCP603, and MCP604 have the same fundamental
* performance and behavior. Consequently, this single op amp macromodel supports all four
* devices. However, the chip select function of the MCP603 is not modeled.
*
* Revision History:
*
REV A : 6-30-99 created BCB
*
REV B : 7-10-99 corrected DC Iq BCB
*
REV C : 11-30-99 Placed “.subckt” command as first line, added L, W to Ptype model in
: listing BCB
*
* This macromodel models typical amplifier offset voltage, DC power supply rejection, input
* capacitance, DC common mode rejection ratio, open loop gain over frequency, phase margin
* with no capacitive load, output swing, power supply current, input voltage noise.
*
* NOTICE: THE INFORMATION PROVIDED HEREIN IS BELIEVED TO BE RELIABLE,
* HOWEVER, MICROCHIP ASSUMES NO RESPONSIBILITY FOR INACCURACIES OR
* OMISSIONS. MICROCHIP ASSUMES NO RESPONSIBILITY FOR THE USE OF THIS
* INFORMATION, AND ALL USE OF SUCH INFORMATION SHALL BE ENTIRELY AT
* THE USER’S OWN RISK. NO INTELLECTURAL PROPERTY RIGHTS OR LICENSES
* TO ANY OF THE TECNOLOGY DESCRIBED HEREIN ARE IMPLIED OR GRANTED TO
* ANY THIRD PARTY. MICROCHIP RESERVES THE RIGHT TO CHANGE THIS MODEL
* AT ANY TIME WITHOUT NOTICE.
*
*Input Stage, pole at 5MHz
M1
9
64
7
3
Ptype L=2 W=275
M2
8
2
7
3
Ptype L=2 W=275
CDIFF
1
2
3E-12
CCM1
1
4
6E-12
CCM2
2
4
6E-12
IDD
3
7
30e-6
RA
8
6
1.485e3
RB
9
6
1.485e3
CA
8
9
10.71e-12
*Input Stage Common-Mode Clampling
VCMM
4
6
0.35
ECM
55
4
3 64
1
RCM
DCMP
VCMP
57
56
57
56
55
4
1E3
DX
1.2
RST
DST
VST
58
59
58
59
55
4
1E3
DX
1.6
GCMP2
23
4
POLY(2)
57 56 58 59 0 -0.5E-3 0.5E-3
*Input errors (vos, en, psr, cmr)
ERR
64
1
POLY(3) (67,4) (3, 4) (1,34) 0 1 40e-6 3.2e-6
*Second
GS
R1
C2
Stage, pole
23
4
23
4
23
4
at 3.3Hz
8
9
0.397e9
122.8e-12
 2000 Microchip Technology Inc.
5.7e-3
DS21314D-page 17
MCP601/602/603/604
VSOP
VSOM
DSOP
DSOM
3
25
23
25
24
4
24
23
*HCM
23
3
4.784
-3.48
DY
DY
VCMP
FS 3 4 POLY(11) VO3 VO5 VO4 VO6 VO1 VO2 VO9 VO10 VMID1 VSOP VSOM
+ 200E-6 -1 -1 -1 1 -1 -1 1 1 -1 -1 -1
*mid-supply reference, output swing limit
RMID1
3
35
61.62E3
VMID1
35
34
0
RMID2
4
34
61.62E3
ELEVEL 34
4
23
4
-1
*output
DO3
DO4
DO5
DO6
DO7
DO8
VO3
VO4
GO5
VO5
GO6
VO6
GO1
VO1
GO2
VO2
RO9
VO9
RO10
VO10
stage
34
43
44
34
3
45
3
46
4
45
4
46
43
5
5
44
3
47
47
5
4
48
48
5
49
4
49
45
50
4
50
46
3
51
51
5
52
4
52
5
* input
VN1
DN1
RN1
voltage noise
65
4
0.6
65
67
DX
67
4
13E3
DY
DY
DY
DY
DY
DY
0.1
0.1
3
0
34
0
5
0
34
0
100
0
100
0
34
10E-3
4
10E-3
34
10E-3
5
10E-3
.model Ptype PMOS
.model DY D(IS=1e-15 BV =50)
.model DX D(IS=1e-18 AF=0.6 KF=10e-17)
.ENDS
DS21314D-page 18
 2000 Microchip Technology Inc.
MCP601/602/603/604
MCP60X PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
MCP60X
—
X
/X
Package:
Temperature
Range:
Device:
P
SN
SL
ST
OT
=
=
=
=
=
Plastic DIP (300 mil Body), 8-lead and 14-lead
Plastic SOIC (150 mil Body), 8-lead
Plastic SOIC (150 mil Body), 14-lead
Plastic TSSOP, 8-lead and 14-lead
Plastic SOT23, 5-lead
I = –40°C to +85°C
MCP601
MCP601T
MCP602
MCP602T
MCP603
MCP603T
=
=
=
=
=
=
Single Operational Amplifier
Single Operational Amplifier (Tape and Reel-SOIC/TSSOP/SOT23-5)
Dual Operational Amplifier
Dual Operational Amplifier (Tape and Reel-SOIC/TSSOP)
Single Operational Amplifier w/CS Function
Single Operational Amplifier w/CS Function
(Tape and Reel-SOIC/TSSOP)
MCP604 = Quad Operational Amplifier
MCP604T = Quad Operational Amplifier (Tape and Reel-SOIC/TSSOP)
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences
and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of
the following:
1.
2.
3.
Your local Microchip sales office
The Microchip Corporate Literature Center U.S. FAX: (480) 786-7277
The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
 2000 Microchip Technology Inc.
DS21314D-page 19
WORLDWIDE SALES AND SERVICE
AMERICAS
AMERICAS (continued)
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Toronto
Singapore
Microchip Technology Inc.
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Chandler, AZ 85224-6199
Tel: 480-786-7200 Fax: 480-786-7277
Technical Support: 480-786-7627
Web Address: http://www.microchip.com
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Tel: 905-405-6279 Fax: 905-405-6253
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Tel: 65-334-8870 Fax: 65-334-8850
Atlanta
Microchip Technology, Beijing
Unit 915, 6 Chaoyangmen Bei Dajie
Dong Erhuan Road, Dongcheng District
New China Hong Kong Manhattan Building
Beijing, 100027, P.R.C.
Tel: 86-10-85282100 Fax: 86-10-85282104
Microchip Technology Inc.
500 Sugar Mill Road, Suite 200B
Atlanta, GA 30350
Tel: 770-640-0034 Fax: 770-640-0307
Boston
ASIA/PACIFIC
China - Beijing
ASIA/PACIFIC (continued)
Taiwan
Microchip Technology Taiwan
10F-1C 207
Tung Hua North Road
Taipei, Taiwan
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
EUROPE
China - Shanghai
Denmark
Microchip Technology
Unit B701, Far East International Plaza,
No. 317, Xianxia Road
Shanghai, 200051, P.R.C.
Tel: 86-21-6275-5700 Fax: 86-21-6275-5060
Microchip Technology Denmark ApS
Regus Business Centre
Lautrup hoj 1-3
Ballerup DK-2750 Denmark
Tel: 45 4420 9895 Fax: 45 4420 9910
Hong Kong
France
Microchip Asia Pacific
Unit 2101, Tower 2
Metroplaza
223 Hing Fong Road
Kwai Fong, N.T., Hong Kong
Tel: 852-2-401-1200 Fax: 852-2-401-3431
Arizona Microchip Technology SARL
Parc d’Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
India
Germany
Microchip Technology Inc.
Two Prestige Place, Suite 150
Miamisburg, OH 45342
Tel: 937-291-1654 Fax: 937-291-9175
Microchip Technology Inc.
India Liaison Office
No. 6, Legacy, Convent Road
Bangalore, 560 025, India
Tel: 91-80-229-0061 Fax: 91-80-229-0062
Arizona Microchip Technology GmbH
Gustav-Heinemann-Ring 125
D-81739 München, Germany
Tel: 49-89-627-144 0 Fax: 49-89-627-144-44
Detroit
Japan
Microchip Technology Inc.
Tri-Atria Office Building
32255 Northwestern Highway, Suite 190
Farmington Hills, MI 48334
Tel: 248-538-2250 Fax: 248-538-2260
Microchip Technology Intl. Inc.
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: 81-45-471- 6166 Fax: 81-45-471-6122
Arizona Microchip Technology SRL
Centro Direzionale Colleoni
Palazzo Taurus 1 V. Le Colleoni 1
20041 Agrate Brianza
Milan, Italy
Tel: 39-039-65791-1 Fax: 39-039-6899883
Microchip Technology Inc.
5 Mount Royal Avenue
Marlborough, MA 01752
Tel: 508-480-9990 Fax: 508-480-8575
Chicago
Microchip Technology Inc.
333 Pierce Road, Suite 180
Itasca, IL 60143
Tel: 630-285-0071 Fax: 630-285-0075
Dallas
Microchip Technology Inc.
4570 Westgrove Drive, Suite 160
Addison, TX 75248
Tel: 972-818-7423 Fax: 972-818-2924
Dayton
Los Angeles
Microchip Technology Inc.
18201 Von Karman, Suite 1090
Irvine, CA 92612
Tel: 949-263-1888 Fax: 949-263-1338
New York
Microchip Technology Inc.
150 Motor Parkway, Suite 202
Hauppauge, NY 11788
Tel: 631-273-5305 Fax: 631-273-5335
Korea
Microchip Technology Korea
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea
Tel: 82-2-554-7200 Fax: 82-2-558-5934
San Jose
Microchip Technology Inc.
2107 North First Street, Suite 590
San Jose, CA 95131
Tel: 408-436-7950 Fax: 408-436-7955
All rights reserved. © 2000 Microchip Technology Incorporated. Printed in the USA. 5/00
Italy
United Kingdom
Arizona Microchip Technology Ltd.
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: 44 118 921 5858 Fax: 44-118 921-5835
03/23/00
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999. The
Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs and microperipheral
products. In addition, Microchip’s quality
system for the design and manufacture of
development systems is ISO 9001 certified.
Printed on recycled paper.
Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates.
It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by
Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights
arising from such use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with express written
approval by Microchip. No licenses are conveyed, implicitly or otherwise, except as maybe explicitly expressed herein, under any intellectual property
rights. The Microchip logo and name are registered trademarks of Microchip Technology Inc. in the U.S.A. and other countries. All rights reserved. All other
trademarks mentioned herein are the property of their respective companies.
DS21314D-page 20
 2000 Microchip Technology Inc.