TSM1N60S N-Channel Power Enhancement Mode MOSFET Pin assignment: 1. Gate 2. Drain 3. Source VDS = 600V ID = 0.3A RDS (on), Vgs @ 10V, Ids @ 0.3A = 11Ω General Description The TSM1N60s is used an advanced termination scheme to provide enhanced voltage-blocking capability without degrading performance over time. In addition, this advanced MOSFET is designed to withstand high energy in avalanche and commutation modes. The new energy efficient design also offers a drain- to-source diode with a fast recovery time. Designed for high voltage, high speed switching applications in power supplies and converters, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional and safety margin against unexpected voltage transients. Features Robust high voltage termination Source to Drain diode recovery time comparable to a Avalanche energy specified discrete fast recovery diode. Diode is characterized for use in bridge circuits IDSS and VDS(on) specified at elevated temperature Ordering Information Block Diagram Part No. Packing Package TSM1N60SCT B0 Bulk Pack TO-92 TSM1N60SCT A3 Ammo Pack TO-92 Absolute Maximum Rating (Ta = 25 oC unless otherwise noted) Parameter Symbol Limit Unit Drain-Source Voltage VDS 600V V Gate-Source Voltage VGS ± 30 V ID 0.3 A IDM 1.2 A PD 3 W 0.025 o W/ C Continuous Drain Current Pulsed Drain Current Maximum Power Dissipation Ta = 25 oC o Ta > 25 C Operating Junction Temperature +150 o C TJ, TSTG - 55 to +150 o C EAS 50 mJ Symbol Limit Unit TL 10 TJ Operating Junction and Storage Temperature Range Single Pulse Drain to Source Avalanche Energy (VDD = 50V, VGS=10V, IAS=0.3A, L=115mH) Thermal Performance Parameter Lead Temperature (1/8” from case) Junction to Ambient Thermal Resistance (PCB mounted) Note: Surface mounted on FR4 board t<=10sec. TSM1N60S 1-4 Rθja 50 2006/01 rev. A S o C/W Electrical Characteristics Tj = 25 oC, unless otherwise noted Parameter Conditions Symbol Min Typ Max Unit Static Drain-Source Breakdown Voltage VGS = 0V, ID = 250uA BVDSS 600 -- -- V Drain-Source On-State Resistance VGS = 10V, ID = 0.3A RDS(ON) -- 11 13 Ω Gate Threshold Voltage VDS = VGS, ID = 250uA VGS(TH) 2.0 -- 4.0 V Zero Gate Voltage Drain Current VDS = 600V, VGS = 0V IDSS -- -- 10 uA Gate Body Leakage VGS = ± 30V, VDS = 0V IGSS -- -- ± 100 nA Forward Transconductance VDS ≧50V, ID = 0.3A gfs -- 5 -- S Total Gate Charge VDS = 480V, ID = 0.3A, Qg -- 4.5 6.0 Gate-Source Charge VGS = 10V Qgs -- 1.1 -- Qgd -- 2.0 -- td(on) -- 10 30 tr -- 20 50 td(off) -- 25 45 tf -- 24 60 Dynamic Gate-Drain Charge Turn-On Delay Time VDD = 300V, Turn-On Rise Time ID = 0.3A, VGEN = 10V, Turn-Off Delay Time RG = 4.7Ω Turn-Off Fall Time nC nS Input Capacitance VDS = 25V, VGS = 0V, Ciss -- 155 200 Output Capacitance f = 1.0MHz Coss -- 20 26 Crss -- 3 4 IS -- -- 0.3 A VSD -- -- 1.4 V Reverse Transfer Capacitance pF Source-Drain Diode Max. Diode Forward Current Diode Forward Voltage IS = 0.3A, VGS = 0V Note: 1. pulse test: pulse width <=300uS, duty cycle <=2% 2. Negligible, Dominated by circuit inductance. TSM1N60S 2-4 2006/01 rev. A Typical Characteristics Curve (Ta = 25 oC unless otherwise noted) TSM1N60S 3-4 2006/01 rev. A TO-92 Mechanical Drawing A A B C D E F TO-92 DIMENSION MILLIMETERS INCHES MIN MAX MIN MAX 4.30 4.70 0.169 0.185 4.30 4.70 0.169 0.185 14.30(typ) 0.563(typ) 0.43 0.49 0.017 0.019 2.19 2.81 0.086 0.111 3.30 3.70 0.130 0.146 G H 2.42 0.37 DIM B E C H F 2.66 0.43 0.095 0.015 G D TSM1N60S 4-4 2006/01 rev. A 0.105 0.017