TI TPIC2101N

TPIC2101
DC BRUSH MOTOR CONTROLLER
SLIS060 – OCTOBER 1995
D
D
D
D
D
D
D
D
D or N PACKAGE
(TOP VIEW)
0 V to 16 V, 50 mA Max PWM Gate Drive
Output
Dual Speed Command Input Capability
Effective Motor Voltage Adjustment
100% Duty Cycle Capability
Low Current (<200 µA) Sleep State
Built-in Soft Start
Over/Under Voltage Protection
Over Current Protection of External
FET/IGBT
V5P5
MAN
AUTO
SPEED
ROSC
COSC
INT
1
14
2
13
3
12
4
11
5
10
6
9
7
8
CCS
AREF
Vbat
GD
GND
ILS
ILR
description
The TPIC2101 is a monolithic integrated control circuit designed for direct current (dc) brush motor control that
generates a user-adjustable, fixed-frequency, variable duty cycle, pulse width modulated (PWM) signal
primarily to control rotor speed of a permanent magnet dc motor. The TPIC2101 can also be used to control
power to other loads such as solenoids and incandescent bulbs. This device drives the gate of an external, low
side NMOS power transistor to provide PWM controlled power to a motor or other loads. Inductive current from
motor or solenoid loads during PWM off-time is recirculated through an external diode.
The TPIC2101 accepts a 0% to 100% PWM signal (auto mode) or a 0 V to 2.2 V differential voltage (manual
mode), and internally engages the correct operating mode to accept the input type.
The device operates in a sleep state, a run state, or a fault state. In the sleep state the gate-drive (GD) terminal
is held low and the overall current draw is less than 200 µA. The normal operating mode of the device is in the
run state and is initiated by any speed command. When the device detects an overvoltage or current fault, it
enters the fault state.
The TPIC2101 is offered in a 14-terminal plastic DIP (N) package, and a SOIC (D) package, and is characterized
for operation over the operating free-air temperature range of –40°C to 105°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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1
TPIC2101
DC BRUSH MOTOR CONTROLLER
SLIS060 – OCTOBER 1995
functional block diagram
SPEED
4
INT
7
UVSD
V5P5
MAN
V5P5
Vbat
Sleep
+
AUTO and MAN
_
MDET
Logic
2
Vbat
AUTO and MAN
Input Config
AUTO
V7
AREF
_
Source
Select
20 kHz
V5P5
ILimit
Logic
UVSD
UVSD
CCS
Buffer
GDDIS
V5P5
V5P5
AREF
AREF
AREF
20 kHz
GD
Logic
Vtrip
Gate
Drive
Vramp
Vbat
1
Bandgap
Buffer
Vbat
2×
Bandgap
and IBIAS
20 kHz
Oscillator and
Voltage Ramp
Waveform Generator
PWMout
13
AREF
Sleep
Vbat
Vbat/4
Sleep
5
ROSC
Switched
Vbat
Vbat/8
6
COSC
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OVSD
AREF
NOTE A: For correct operation, no terminal may be taken below GND.
2
ILS
ADET
Sleep
V5P5
ILR
AREF
IDET
14
9
+
V5P5
ICCS
CCS
8
Sleep
20 kHz
+
_
3
AREF
IFLT
OVSD
12
11
10
Vbat
GD
GND
TPIC2101
DC BRUSH MOTOR CONTROLLER
SLIS060 – OCTOBER 1995
Terminal Functions
TERMINAL
NAME
NO.
I/O
DESCRIPTION
V5P5
1
O
5.5 V supply voltage. V5P5 is a regulated voltage supply from Vbat, internally switched to AREF during the
run state. This requires a 4.7 µF tantalum capacitor from V5P5 to GND for stability.
MAN
2
I
Manual control input. MAN is an active high (greater than 5.5 V asserts the manual mode) input that serves
as a positive differential input (0-2.3 V full range) for the manual mode. In man mode, Iman is approx. 20×Iccs.
AUTO
3
I
PWM control input. AUTO is an active low input that remains active if pulsed every 2048 counts of the
oscillator frequency. It also serves as a negative differential input for the manual mode. In auto mode, Iauto
is approx. 13×Iccs pullup, Iauto is approx. 20×Iccs pulldown in man mode.
SPEED
4
O
Integrator output. SPEED is an integrator output with a required minimum resistance between SPEED and
INT terminals of 20 kΩ (typically 1 second RC time constant, or as required for soft start).
ROSC
5
O
Oscillator resistor output. ROSC has an external resistor connected to ground which determines the
constant charging current of COSC. The IC forces a voltage of Vbat/4 in run state.
COSC
6
O
Oscillator capacitor output. COSC has an external capacitor connected to ground which determines (with
ROSC) switching frequency. f(osc) = 2/(ROSC×COSC)
INT
7
I
Integrator input. INT is an input from an integrator that requires a 4.7 µF capacitor and a 20 k minimum
resistance between the SPEED and INT terminals.
ILR
8
I
Current limit reference. ILR is an input from a resistor divider off AREF.
ILS
9
I
Current limit sense. ILS senses drain voltage of external FET. ILS trips within ±10 mV of ILR.
GND
10
GD
11
O
Gate drive output. GD, PWM output, 0-Vbat voltage, provides a 0-Vbat PWM output pre-drive for an external
FET.
Vbat
AREF
12
I
Positive power input.
13
O
5.5 V reference voltage. AREF is a 5.5 V reference voltage switched from V5P5 during the run state. AREF
is used as a reference for ILR in current limit detection and is capable of sourcing 2 mA of current.
CCS
14
Ground terminal
Constant current sink. ICCS equals AREF/(2×Rccs). Requires an external resistor.
recommended external components for auto and manual modes (see Figures 2 and 4)
TERMINAL
NAME
DESCRIPTION
NO.
V5P5
1
Capacitor – 4.7 µF tantalum
MAN
2
Capacitor – 0.1 µF
MAN
2
Resistor – 499 Ω, 1%, 100 ppm
AUTO
3
Capacitor – 0.47 µF
AUTO
3
Resistor – 499 Ω, 1%, 100 ppm
SPEED
4
Resistor – 100 kΩ, 1%, 100 ppm to INT terminal, (minimum 20 kΩ)
ROSC
5
Resistor – 45.3 kΩ
COSC
6
Capacitor – 2200 pF
INT
7
Capacitor – 4.7 µF
CCS
14
Resistor – 27.4 kΩ, 1%, 100 ppm
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3
TPIC2101
DC BRUSH MOTOR CONTROLLER
SLIS060 – OCTOBER 1995
detailed description
The TPIC2101 is an integrated circuit that generates a fixed frequency, variable duty cycle PWM signal to control
the rotor speed of a permanent-magnet dc motor. This section provides a functional description of the device.
dual command speed input capability
The TPIC2101 is user configurable to either auto or manual mode, and can sense either configuration internal
to the IC. In automatic mode, the speed-command-signal is an open-collector PWM signal on the AUTO
terminal, and the MAN terminal is floating. In manual mode, the speed-command-signal is a variable resistance
across the AUTO and MAN terminals with the MAN terminal connected to Vbat.
sleep, run, and fault states
The TPIC2101 operates in a sleep state, a run state, or a fault state. In the auto mode, a zero-speed input
initiates the sleep state. In the manual mode, an open-circuit at the AUTO and MAN terminals initiates the sleep
state. The device will also be in the sleep state during fault conditions. In the sleep state, the gate drive terminal
(GD) is held low and the overall current draw is less than 200 µA. Any speed command initiates the run state,
which is the normal operating state of the device. The fault state is entered only when the device detects an
overvoltage or current fault. Fault state is exited either by removal of the overvoltage condition (exiting to run
state) or by resetting a current fault by entering the sleep state.
speed command adjustment
The device adjusts the GD terminal PWM signal with changes in Vbat to keep the effective motor voltage
constant. The effective motor voltage is defined to be the product of the GD terminal PWM rate and the voltage
of Vbat. Figure 1 shows motor voltage as a function of input speed command in the automatic mode for various
battery voltages. PWMin is described as the duty cycle of the PWM signal at the AUTO terminal.
16
14
Motor Voltage – V
12
Vbat = 12
Vbat = 16
10
8
Vbat = 8
6
4
2
0
0
20
40
60
80
100
PWMin– Incoming Pulse Width Modulation – %
Figure 1. Motor Voltage vs. Incoming PWM for Various Battery Voltages
over/under voltage protection
The IC enters the fault state if Vbat rises above over-voltage shutdown (VOV typically equals 18.5 V). If Vbat falls
below the under-voltage shutdown (VUV typically equals 7.5 volts) the IC enters sleep state. Hysteresis assures
that the device will not toggle into and out of sleep state or fault condition.
4
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TPIC2101
DC BRUSH MOTOR CONTROLLER
SLIS060 – OCTOBER 1995
current limit protection
Current through the motor is limited by lowering the GD terminal PWM when a high current situation occurs.
If the condition persists, the device shuts off the gate drive (GD terminal) until the circuit is reset externally by
entering the sleep state.
theory of operation
This section explains the normal circuit operation for the automatic and manual states.
power supply and oscillator
Positive voltage is supplied to the integrated circuit on the Vbat terminal, ground is the GND terminal. The IC
steps down the Vbat supply to the regulated 5.5 V supply at the V5P5 terminal. AREF is shorted to V5P5 in run
state and disconnected when the IC is in sleep state. Two terminal connections (COSC and ROSC) are provided
to control an internal oscillator. The oscillator freq, f(osc), is defined by the following equation:
f
(osc)
+ ROSC 2 COSC
Nominal oscillator frequency is 20-kHz based on the recommended components.
automatic mode signal decoding
In automatic state, a high-to-low signal transition on the AUTO terminal (open collector) will wake the device
from the sleep state into the run state. The speed command information is contained in the duty cycle of a 100 Hz
PWM signal on the same terminal. The speed information is inverted, i.e. a signal that is 10% high commands
a faster speed than a 20% high signal. In automatic mode the MAN terminal is floating. The device is capable
of rejecting ± 2 V of ground offset VIO between the open-collector switching transistor and the GND terminal
without affecting the output duty cycle. Two terminals are provided for an RC integrator (SPEED and INT) to
average the incoming PWM signal for use as a PWM comparator input. Figure 2 illustrates the automatic state
connections.
499 Ω
No Connection
2
MAN
TPIC2101
499 Ω
3
AUTO
CCS
SPEED
14 2.75 V
VIO
INT
4
20 kΩ min
7
27.4 kΩ
I = 100 µA
4.7 µF
Figure 2. Automatic Mode Connections
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5
TPIC2101
DC BRUSH MOTOR CONTROLLER
SLIS060 – OCTOBER 1995
automatic mode signal decoding (continued)
The device enters the sleep state if the PWM signal on the AUTO terminal is absent (the AUTO terminal remains
high or low) for 2048 clock cycles of the 20 KHz oscillator. An internal 1 mA pull-up resistor is provided for the
AUTO terminal when in the auto mode. This pull-up resistor is not present in the manual mode or during sleep
state.
The device adjusts the output PWM duty cycle to keep the effective motor voltage constant with changing battery
voltages (Vbat) as per the equation:
PWM out
+ (2.88 ) 13.12(1 *V Input Duty Cycle))
100%
bat
Figure 3 illustrates this transfer curve with various battery voltages.
100
Vbat = 12
90
Vbat = 8
PWM out – Output PWM – %
80
70
Vbat = 16
60
50
40
30
20
10
0
0
10 20 30 40 50 60 70 80 90 100
PWMin – Incoming Pulse Width Modulation – %
Figure 3. Output PWM vs. Incoming PWM for Various Battery Voltages
The allowable automatic mode PWMout variation is ± 7% over all operating conditions as indicated in the AC
characteristics Table.
manual mode speed signal decoding
In manual mode, a high input (>5.5V) on the MAN terminal changes the state of the device from sleep to run.
While in the run state the device senses the resistance between the MAN and AUTO terminals by turning on
a 2 mA current sink to each terminal. The MAN and AUTO current sinks are multiplied 20 X from the CCS current.
This 2 mA current sink creates a 1 V drop across each 0.5 kΩ resistor and a 0 to 2.2 V differential across the
0 to 1 kΩ potentiometer (and thus across the 2 terminals). The SPEED and INT terminals should be utilized as
in the proceeding section as a low-pass filter. When the connection to the MAN terminal is opened, the device
enters the sleep state. In addition, the device is capable of rejecting up to 2.2 V of source voltage offset (VIO),
as indicated in Figure 4.
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TPIC2101
DC BRUSH MOTOR CONTROLLER
SLIS060 – OCTOBER 1995
manual mode speed signal decoding (continued)
47 Ω
VIO
Battery
Enable
Switch
Vbat
499 Ω
2
MAN
TPIC2101
499 Ω
1 kΩ
pot
3
AUTO
CCS
SPEED
14 2.75 V
I = 100 µA
INT
4
20 kΩ min
7
27.4 kΩ
4.7 µF
Figure 4. Manual Mode Connections
As in the automatic mode, the device will adjust the GD terminal PWM duty cycle to keep the effective motor
voltage constant with changing battery voltages (Vbat). The transfer equation for the manual mode is:
PWM out
+ (2.88 ) 6.56(VVMAN * VAUTO))
100%
bat
Figure 5 shows the output characteristic for various source voltages.
PWM out – Manual Mode Output PWM – %
100
90
80
Vbat = 16
70
Vbat = 12
60
Vbat = 8
50
40
30
20
10
0
0
0.2 0.4
0.6 0.8
1
1.2 1.4 1.6
1.8
2
VMAN - VAUTO – Differential Voltage – V
Figure 5. Manual Mode Input Signal vs. Output PWM
The allowable manual mode PWMout variation is ±7% over all operating conditions as indicated in the AC
characteristics table.
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7
TPIC2101
DC BRUSH MOTOR CONTROLLER
SLIS060 – OCTOBER 1995
over/under voltage operating
The TPIC2101 detects an over or under voltage condition (on the Vbat terminal) and turns off the gate drive
circuit. The device remains in this condition until the supply voltage returns to normal operating voltage.
Hysteresis assures that the over/under voltage condition does not toggle off and on near the threshold. The INT
terminal pulls toward GND through an internal impedance of less than 500 Ω during the over-voltage condition
or during sleep state. This ensures a slow ramp up of the GD terminal PWM when the Vbat voltage returns to
the operating range.
current limit operation
An over-current condition is detected if the ILS terminal is higher than the ILR terminal while the gate drive (GD
terminal) is high. This condition activates a closed-loop control, causing the INT terminal to be pulled low
(through an internal resistance less than 500 Ω) lowering the commanded duty cycle to close the loop.
current fault operation
During a window of 8192 clock cycles, a latch is set if at least once during the window, a current limit condition
is detected. If a current limit condition is set for eight consecutive 8192 clock cycle windows, the gate drive (GD
terminal) will be shut off for a disable period of 65536 clock cycles. During the disable period, the INT terminal
is pulled to GND through an internal resistance of less than 500 Ω. After the disable period is completed, an
internal restart is attempted. If the current limit is present again, as described above, for 8 consecutive windows,
the GD and INT terminals are again pulled to GND and the device remains in this current fault state until the
device is cycled through a sleep state to run state. However, if the current limit condition is not present during
any of the eight 8192 clock cycle windows, the latches for the 8 count window timer and the two cycle
shutdown/restart are reset. See timing diagrams, Figures 6, 7, and 8.
absolute maximum ratings over the operating free-air temperature range (unless otherwise
noted)†
Supply voltage range, Vbat‡ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 40 V
Input voltage range, MAN, AUTO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 40 V
Input voltage range, INT CCS, ILR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 7 V
Continuous gate drive output current, IGD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous speed output current, IO(SPEED) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1 mA
Continuous output current, IO(V5P5), IO(AREF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Continuous ROSC output Current, IO(ROSC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 mA
Continuous output current, IO(CCS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 µA
Thermal Resistance, junction to ambient, RΘJA: D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W
Operating free-air termperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 105°C
Maximum junction temperature, TJM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡ Under load dump conditions, the voltage on Vbat can reach 40 V within 1 ms.
8
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TPIC2101
DC BRUSH MOTOR CONTROLLER
SLIS060 – OCTOBER 1995
recommended operating conditions
MIN
NOM
MAX
Supply voltage, Vbat
8
12
16
V
AREF Input current I(AREF)
0
2
mA
Input voltage, VI(MAN), VI(AUTO) (manual mode)
6
16
V
Differential voltage, VI(MAN) – VI(AUTO)
0
2.2
V
0
5.5
V
0.5
2.75
V
27.8
kΩ
20
100
kΩ
1
5
Input voltage, VI(AUTO) (auto mode)
VI, ILR, ILS
Output resistance, input resistance, R(CCS)
27.2
Output Resistance, ROSC, ro
Output Capacitance, COSC, CO
Gate drive frequency f = 2/(ROSC × COSC), f(GD)
27.5
20
Gate drive output capacitance, CO(GD)
Operating free-air temperature, TA
– 40
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UNIT
nF
kHz
3300
pF
105
°C
9
TPIC2101
DC BRUSH MOTOR CONTROLLER
SLIS060 – OCTOBER 1995
electrical characteristics, Vbat = 8 V to 16 V, TA = 25°C
PARAMETER
Ibat
Ib
t(Q)
bat(Q)
TEST CONDITION
Supply current (average), Vbat
state) Vbat
Quiescent current (sleep state),
b t
Vbat = 13 V,
AUTO shorted to MAN, floating
Voltage supply regulation, AREF
I(AREF) = 0 – 2 mA,
MAN = AUTO = Vbat
VIO
Input offset voltage, current limit
comparator, ILS, ILR
AUTO or MAN mode, ILS,
ILR common mode,
Voltage range 0.5 – 2.75 V,
Vint = 4.5 V,
Detect I(int) > 100 µA
IIB
Input bias current, current limit comparator,
ILS, ILR†,
IIO
V(AREF)
MIN
Vbat = 16 V,
GD open,
f(osc) = 20 kHz,
MAN = AUTO =Vbat
Vbat = 16 V,
GD open,
f(osc) = 20 kHz,
MAN open,
Auto mode,
AUTO – 99% PWMin
Vbat = 13 V,
AUTO and MAN open
5.225
TYP
MAX
UNIT
4
10
mA
2
10
mA
150
200
µA
165
200
µA
5.5
5.775
V
10
mV
ILS,
ILR common mode,
Voltage range 0.5 – 2.75 V
250
nA
Input offset current, current limit comparator,
ILS, ILR†
ILS,
ILR common mode,
Voltage range 0.5 – 2.75 V
100
nA
IOL(CLS)
Pulldown current, ILS terminal
blanking, ILS
ILS = 100 mV,
GD commanded low
250
360
VIL(AUTO)
Automatic mode low level input
voltage, AUTO
MAN open,
AUTO mode,
Lower VI(AUTO) until VI(SPEED) >2.4V
2.7
3
3.3
V
VIH(AUTO)
Automatic mode high level input
voltage, AUTO
MAN open,
AUTO mode,
Raise VI(AUTO) until VI(SPEED) < 2.4 V
3.6
4
4.4
V
II(AUTO)
Input current, automatic mode, AUTO
MAN open,
VI(AUTO) = 0 V
Auto mode,
–1
– 10
mA
II(AUTOQ)
Input current, auto sleep mode, AUTO
MAN open,
VI(AUTO) = 0 V
Sleep state,
VIH(MAN)
High level input voltage, manual mode, MAN
VIL(MAN)
Low level input voltage, manual mode, MAN
VID(MAN)
Input voltage, manual mode high differential
(high speed command), MAN-AUTO
Vbat = 9 V to 16 V,
VIH(MAN) = VIH(AUTO),
Raise V(MAN) until VI(AREF) > 2.5 V
VI(MAN) =VI( AUTO),
Lower VI(MAN) until VI(AREF) < 2.5 V
Vbat = 16 V,
Vbat – 3.5 V < MAN < Vbat
† Indicates electrical parameter not tested in production.
10
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•
µA
µA
– 40
– 80
5
5.5
6
V
2.3
2.5
2.7
V
2.3
V
1.7
TPIC2101
DC BRUSH MOTOR CONTROLLER
SLIS060 – OCTOBER 1995
electrical characteristics, Vbat = 8 V to 16 V, TA = 25°C (continued)
PARAMETER
TEST CONDITION
Vbat –3.5 V < MAN < Vbat+∆V
where “∆” is the lesser of 2 V and 16 V –Vbat,
PWMout @ V(diff) = 0.2 V ≥ PWMout @
VI(DIFF)= 0 V
Vbat –3.5 V < MAN < Vbat +∆V
where “∆” is the lesser of 2 V and 16 V –Vbat,
MAN – AUTO = 0 V to 2 V,
R(css) = 27.5 kΩ to GND
Vbat –3.5 V < MAN < Vbat +∆V
where “∆” is the lesser of 2 V and 16 V –Vbat,
MAN – AUTO = 0 V to 2 V,
Rcss = 27.5 kΩ to GND
MIN
VID(low)
Input voltage, manual mode
low differential (low speed
command), MAN–AUTO
II(MAN)
II(AUTO)
Input currents, auto and
manual mode, MAN, AUTO
II(MANRATIO)
Input current, manual mode
matching ratio, MAN, AUTO
II(MAN(a))
Input current, man terminal
auto mode, MAN
Auto mode,
MAN = 2.2 V
5
II(MANQ)
Input current, man terminal
sleep mode, MAN
Sleep state,
MAN = 2.2 V
V(CCS)
Constant current sink voltage
regulation, CCS
Auto or Man mode,
I(CCS) = –100 µA
V(OV)
Over voltage shutdown, Vbat
Vbat rising from 16 V,
Detect I(INT) > 100 µA
INT = 1 V,
Vhys(OV)
Hysteresis, over voltage, Vbat
Vbat rising from 20.1 V, INT = 1 V,
Detect I(INT) < 100 µA
Vhys(UV)
Under voltage shutdown
negative going threshold
voltage, Vbat
Under voltage shutdown
positive going threshold
voltage, Vbat
Hysteresis, under voltage, Vbat
VOH(GD)
High
g level output voltage,
g ,g
gate
drive, GD
VIT-(UVLO)
VIT+(UVHI)
VOL(GD)
g ,g
Low level output voltage,
gate
drive, GD
1.70
TYP
2
–7
MAX
UNIT
0.2
V
2.30
mA
7
%
10
15
µA
5
10
15
µA
2.58
2.78
2.92
V
17
18.5
20
V
0.5
0.8
0.99
V
MAN = Vbat,
Detect AREF < 2.5 V
Vbat falling from 9 V,
7
7.5
8
V
MAN = Vbat,
Detect AREF > 2.5 V
Vbat rising from 6.9 V,
8
8.5
9
V
0.5
1
V(UVHI) – V(UVLO)
IGD = –50 mA,
Run state
INT = 4.5 V,
V
Vbat – 3
Vbat
V
Vbat – 0.2
Vbat
V
IGD = –2 mA,
Run state
INT = 4.5 V,
Run state,
VI(INT) = 0 V,
IGR = 50 mA,
VCOSC = 1 V
3.5
V
Run state,
INT = 0 V,
IGD = 2 mA,
VCOSC = 1 V
0.75
V
0.75
V
VGD(SL)
Gate voltage, sleep-state, GD
Sleep state,
IGD = 2 mA
I(GDP)
Pulldown current, gate drive
passive, GD
Vbat open,
VGD = 0.75 V
I(INT)
Pulldown current, INT
Run state,
VI(INT) = 1 V
VILS > VILR,
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443
•
0.03
7.5
20
µA
2
3
mA
11
TPIC2101
DC BRUSH MOTOR CONTROLLER
SLIS060 – OCTOBER 1995
switching characteristics, Vbat = 8 V to 16 V, TA = 25°C
PARAMETER
TEST CONDITIONS
MIN
tr
Rise time
Vbat = 16 V,
ROSC = 45.3 kΩ,
tf
Fall time
Vbat = 16 V,
ROSC = 45.3 kΩ,
Output PWM absolute
accuracy to spec equation
16 > Vbat > 9
Manual and automatic modes
GD open,
Measure at GD = 0.5 × Vbat @ 20 kHz
Oscillator frequency
ROSC = 45.3 kΩ,
f(osc)
Minimum speed pedestal
TYP
MAX
UNIT
Load = 3300 pF,
COSC = 2200 pF
1
µs
Load = 3300 pF,
COSC = 2200 pF
0.8
µs
COSC = 2200 pF
–7%
19
7%
20
21
kHz
MAN = AUTO=Vbat = 16
15
21
%DC
Vbat = 16,
MAN floating,
AUTO @ 99% duty cycle
15
21
%DC
PARAMETER MEASUREMENT INFORMATION
Internal
Clock
Time Block 1
Time Block 2
Time Block 3
Time Block 4
Time Block 5
8192 Cycles
8192 Cycles
8192 Cycles
8192 Cycles
8192 Cycles
ILS>ILR ?
1 = Yes, 0 = No
GD Terminal
INT Terminal
Through 500 Ω
Internal Latch
or Counter
1
2
3
Current Fault
Latch/Counter
Disable Latch
No Current Limit Condition Present in Time Block 4.
Internal Counter or Latch Set to zero. Current Limit
Condition Not Present For Eight Consecutive 8192 Cycles.
No Disable Period.
Figure 6. Current Fault Timing Diagram, Normal State
12
•
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POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443
•
0
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
TPIC2101
DC BRUSH MOTOR CONTROLLER
SLIS060 – OCTOBER 1995
PARAMETER MEASUREMENT INFORMATION
Internal
Clock
Time
Block 1
Time
Block 8
8192
Cycles
8192
Cycles
Time
Block 17
65536
8192
Cycles
Cycles
Time
Block 18
8192
Cycles
Time
Block 19
8192
Cycles
ILS>ILR ?
1 = Yes, 0 = No
GD Terminal
INT Terminal
Through 500 Ω
Internal Latch
or Counter
1
8
0
1
2
0
Current Fault
Latch/Counter
Disable Latch
Restart Attempted
Time Block Repeated Six Times
No Current Limit Condition in Time Block 19.
Internal Latch or Counter Reset to Zero.
Restart Successful
Current Limit for Eight Consecutive Time Blocks.
Disable Output for 65536 Clock Cycles.
Figure 7. Current Fault Timing Diagram, Over-Current Limit Condition
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443
•
13
TPIC2101
DC BRUSH MOTOR CONTROLLER
SLIS060 – OCTOBER 1995
PARAMETER MEASUREMENT INFORMATION
Internal
Clock
Time
Block 1
Time
Block 8
8192
Cycles
8192
Cycles
65536
Cycles
Time
Block 17
Time
Block 21
8192
Cycles
8192
Cycles
Time
Block A
ILS>CLR ?
1 = Yes, 0 = No
GD Terminal
INT Terminal
Through 500 Ω
Internal Latch
or Counter
1
8
0
1
8
Current Fault
Latch/Counter
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
8192
Cycles
0
Disable Latch
Time Block Repeated Six Times
Restart
Attempted
Current Limit For Eight Consecutive Time Blocks.
Disable Output For 65536 Clock Cycles.
Time BlocK 17
Repeated Six Times
Current Fault State
(see Note A)
Restart Not Successful.
Enter Current Fault State.
NOTE A: The integrated circuit remains in this state until cycled through the sleep state into the run state. Timing resumes as shown in time block
A at right.
Figure 8. Over-Current Fault State Timing Diagram 3
14
•
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POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443
•
TPIC2101
DC BRUSH MOTOR CONTROLLER
SLIS060 – OCTOBER 1995
TYPICAL CHARACTERISTICS
AUTO CURRENT
vs
CCS CURRENT (AUTO MODE)
MANUAL/AUTO CURRENT
vs
CCS CURRENT (MANUAL MODE)
–4
5
4.5
– 3.6
4
– 3.2
I AUTO – Auto Current – mA
I MAN, I AUTO – Manual/Auto Current – mA
Vbat = 12 V
3.5
3
2.5
2
1.5
Vbat = 12 V
– 40°C
– 2.8
105°C
– 2.4
25°C
–2
– 1.6
– 1.2
1
– 0.8
0.5
– 0.4
0
0
0
50
100
150
200
250
0
ICCS – CCS Current (Manual Mode) – µA
– 60
– 120
– 180
– 240
ICCS – CCS Current (Auto Mode) – µA
Figure 9
Figure 10
OSCILLATOR CAPACITOR CURRENT
vs
OSCILLATOR RESISTOR CURRENT
INTEGRATOR PULLDOWN CURRENT
vs
INTEGRATOR INPUT VOLTAGE
1000
18
Vbat = 12 V
ILS>ILR
I (COSC) – Oscillator Capacitor Current – µ A
I (INT) – Integrator Pulldown Current – mA
– 300
15
12
– 40°C
105°C
9
25°C
6
3
1
2
3
4
V(INT) – Integrator Input Voltage – V
800
700
600
500
400
300
200
100
0
0
0
0
900
5
40 80 120 160200 240 280 320 360 400 440480 520
I(ROSC) – Oscillator Resistor Current – µA
Figure 11
Figure 12
•
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•
15
TPIC2101
DC BRUSH MOTOR CONTROLLER
SLIS060 – OCTOBER 1995
TYPICAL CHARACTERISTICS
GATE DRIVE HIGH SIDE
vs
GATE DRIVE CURRENT
GATE DRIVE LOW SIDE
vs
GATE DRIVE CURRENT
16
1
14.4
0.9
25°C
0.7
0.6
0.5
– 40°C
0.4
0.3
0.1
12.8
11.2
0
5
10 15 20 25 30 35 40
IGD – Gate Drive Current – mA
45
50
0.7
0.6
9.6
0.5
8
– 40°C
6.4
0.4
4.8
0.3
3.2
0.2
1.6
0.1
0
0
0.8
25°C
0
0
5
10
15
25
30
35
40
45
50
IGD – Gate Drive Current – mA
Figure 13
Figure 14
EFFECTIVE MOTOR VOLTAGE
vs
INCOMING PULSE WIDTH MODULATION
MOTOR RPM
vs
INCOMING PULSE WIDTH MODULATION
16
2500
Vbat = 16 V
Vbat = 16 V
14
2000
Vbat = 14 V
Vbat = 14 V
12
Vbat = 12 V
Motor RPM – RPM
Vmotor – Effective Motor Voltage – V
20
10
Vbat = 10 V
8
Vbat = 8 V
Vbat = 12 V
1500
Vbat = 10 V
1000
Vbat = 8 V
6
500
4
2
0
0
10
20
30
40
50
60
70
80
90
0
100
PWMin – Incoming Pulse Width Modulation – %
10
20
30
40
50
60
70
80
90 100
PWMin – Incoming Pulse Width Modulation – %
Figure 15
Figure 16
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443
•
V (bat) – VGD – V
0.8
0.2
16
0.9
105°C
VOH – Gate Drive High Side – V
VOL– Gate Drive Low Side – V
1
105°C
TPIC2101
DC BRUSH MOTOR CONTROLLER
SLIS060 – OCTOBER 1995
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE AT V5P5
vs
AMBIENT TEMPERATURE
OUTPUT VOLTAGE V5P5
vs
INPUT VOLTAGE AT Vbat
5.6
VO(V5P5) – Output Voltage at V5P5 – V
5.4
4.8
4.2
3.6
3
2.4
1.8
1.2
5.55
V5P5
5.5
5.45
0.6
5.4
– 40
0
0
2
10
12
14
6
8
VI(Vbat) – Input Voltage at Vbat – V
16
4
– 20
0
20
40
60
80
TA – Ambient Temperature – °C
Figure 17
100
Figure 18
OUTPUT VOLTAGE AT V5P5
vs
V5P5 OUTPUT CURRENT
6
Vbat = 7 V
VO(V5P5) – Output Voltage at V5P5 – V
VO(V5P5) – Output Voltage at V5P5 – V
6
5.9
5.8
5.7
5.6
5.5
5.4
5.3
5.2
105°C
25°C
– 40°C
5.1
5
0
5
10
15
20
25
30
35
40
45
50
IO(V5P5) – V5P5 Output Current – mA
Figure 19
•
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•
17
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