TL070 JFET-INPUT OPERATIONAL AMPLIFIER SLOS121B – NOVEMBER 1993 – REVISED MARCH 2001 D D D D D D D D D D D PACKAGE (TOP VIEW) Low Power Consumption Wide Common-Mode and Differential Voltage Ranges Low Input-Bias and Offset Currents Output Short-Circuit Protection Low Total Harmonic Distortion . . . 0.003% Typ Low Noise . . . Vn = 18 nV/√Hz Typ at f = 1 kHz High Input Impedance . . . JFET Input Stage Common-Mode Input Voltage Range Includes VCC+ Latch-Up-Free Operation High Slew Rate . . . 13 V/µs Typ N1/COMP IN– IN+ VCC – 1 8 2 7 3 6 4 5 COMP VCC+ OUT OFFSET N2 description The JFET-input TL070 operational amplifier is designed as the lower-noise version of the TL080 amplifier with low input-bias and offset currents and fast slew rate. The low harmonic distortion and low noise make the TL070 ideally suited for high-fidelity and audio-preamplifier applications. This amplifier features JFET inputs (for high input impedance) coupled with bipolar output stages integrated on a single monolithic chip. The TL070I device is characterized for operation from –40°C to 85°C. AVAILABLE OPTIONS PACKAGE TA VIOmax AT 25°C SMALL OUTLINE (D) –40°C to 85°C 10 mV TL070ID logic symbol† 1 N1/COMP 8 COMP 3 + IN+ 6 OUT 2 – IN– 5 OFFSET N2 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TL070 JFET-INPUT OPERATIONAL AMPLIFIER SLOS121B – NOVEMBER 1993 – REVISED MARCH 2001 schematic VCC+ IN+ 7 3 2 64 Ω IN– 128 Ω 6 OUT N1/COMP OFFSET N2 64 Ω 1 5 8 COMP 1080 Ω VCC– 4 ÌÌÌ 1080 Ω All component values shown are nominal. COMPONENT COUNT† Transistors 13 Diodes 2 Resistors 10 epi-FET 1 JFET 2 † Includes all bias and trim circuitry 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL070 JFET-INPUT OPERATIONAL AMPLIFIER SLOS121B – NOVEMBER 1993 – REVISED MARCH 2001 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC+ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Supply voltage, VCC– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30 V Input voltage, VI (see Notes 1 and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15 V Duration of short-circuit current (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited Package thermal impedance, θJA (see Note 5): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149°C/W Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC–. 2. Differential voltages are at IN+ with respect to IN–. 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less. 4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded. 5. The package thermal impedance is calculated in accordance with JESD 51-7. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TL070 JFET-INPUT OPERATIONAL AMPLIFIER SLOS121B – NOVEMBER 1993 – REVISED MARCH 2001 electrical characteristics, VCC± = ±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS VIO Input offset voltage VO = 0 0, RS = 50 Ω aV Temperature coefficient of input offset voltage VO = 0, RS = 50 Ω IO IIO VO = 0 Input offset current IIB Input bias current‡ VICR Common-mode input voltage range VOM Maximum peak output voltage swing TA† 25°C MIN TYP MAX 3 10 Full range 13 5 100 pA 10 nA 65 200 pA 20 nA Full range 25°C ±11 –12 to 15 25°C ±12 ±13.5 Full range RL ≥ 2 kΩ VO = ±10 V, V RL ≥ 2 kΩ 25 15 B1 ri Unity-gain bandwidth 25°C Input resistance 25°C CMRR Common-mode rejection ratio VIC = VICRmin, VO = 0, RS = 50 Ω kSVR Supply-voltage rejection ratio (∆VCC±/∆VIO) VCC = ±9 V to ±15 V, VO = 0, RS = 50 Ω 25°C ICC VO1/VO2 Supply current VO = 0, 25°C V ±10 25°C Large signal differential voltage amplification Large-signal V ±12 Full range AVD No load µV/°C 18 25°C 25°C RL = 10 kΩ RL ≥ 10 kΩ mV Full range Full range VO = 0 UNIT 200 V/mV 3 1012 MHz W 25°C 70 100 dB 70 100 dB 1.4 2.5 mA Crosstalk attenuation AVD = 100 25°C 120 dB † All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified. Full range for TA is –40°C to 85°C. ‡ Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure 5. Pulse techniques must be used that will maintain the junction temperature as close to the ambient temperature as possible. operating characteristics, VCC± = ±15 V, TA = 25°C PARAMETER SR 4 Slew rate at unity gain TEST CONDITIONS VI = 10 V, RL = 2 kΩ, tr Rise time overshoot factor Rise-time VI = 20 mV, mV RL = 2 kΩ kΩ, Vn Equivalent input noise voltage RS = 20 Ω In Equivalent input noise current RS = 20 Ω, f = 1 kHz THD Total harmonic distortion VO(rms) = 10 V, RS ≤ 1 kΩ, CL = 100 pF, CL = 100 pF, pF MIN See Figure 1 See Figure 1 f = 1 kHz f = 10 Hz to 10 kHz POST OFFICE BOX 655303 RL ≥ 2 kΩ, • DALLAS, TEXAS 75265 f = 1 kHz 8 TYP MAX UNIT 13 V/µs 0.1 µs 20 % 18 nV/√Hz 4 µV 0.01 pA/√Hz 0.003 % TL070 JFET-INPUT OPERATIONAL AMPLIFIER SLOS121B – NOVEMBER 1993 – REVISED MARCH 2001 APPLICATION INFORMATION _ 10 kΩ OUT 1 kΩ – VI + OUT CL = 100 pF RL = 2 kΩ + VI RL CC = 18 pF Figure 1. Unity-Gain Amplifier CL = 100 pF Figure 2. Gain-of-10 Inverting Amplifier 100 kΩ VCC+ C2 1 MΩ C1 = 500 pF 2 MΩ N2 N1 – OUT IN– – IN– N1 COMP OUT + Figure 3. Feed-Forward Compensation POST OFFICE BOX 655303 + IN+ Figure 4. Input Offset Voltage Null Circuit • DALLAS, TEXAS 75265 5 TL070 JFET-INPUT OPERATIONAL AMPLIFIER SLOS121B – NOVEMBER 1993 – REVISED MARCH 2001 TYPICAL CHARACTERISTICS Table of Graphs FIGURE Input bias current vs Free-air temperature 5 Maximum peak output voltage vs Frequency 6 6, 7, 8 Maximum peak output voltage vs Free-air temperature 9 Maximum peak output voltage vs Load resistance 10 Maximum peak output voltage vs Supply voltage 11 Large-signal differential voltage amplification vs Free-air temperature 12 Differential voltage amplification vs Frequency with feed-forward compensation 13 Large-signal differential voltage amplification and phase shift vs Frequency 14 Normalized unity-gain bandwidth and phase shift vs Free-air temperature 15 Common-mode rejection ratio vs Free-air temperature 16 Supply current vs Supply voltage 17 Supply current vs Free-air temperature 18 Total power dissipated vs Free-air temperature 19 Normalized slew rate vs Free-air temperature 20 Equivalent input noise voltage vs Frequency 21 Total harmonic distortion vs Frequency 22 Voltage-follower large-signal pulse response 23 Output voltage vs Elapsed time 24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL070 JFET-INPUT OPERATIONAL AMPLIFIER SLOS121B – NOVEMBER 1993 – REVISED MARCH 2001 TYPICAL CHARACTERISTICS† INPUT BIAS CURRENT vs FREE-AIR TEMPERATURE VOM – Maximum Peak Output Voltage – V IIB– Input Bias Current – nA VCC± = ±15 V 10 1 0.1 –50 –25 0 25 50 75 100 TA – Free-Air Temperature – °C ÌÌÌÌÌ ÌÌÌÌÌ ±15 100 0.01 –75 MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY VCC± = ±15 V ±12.5 ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ ±10 VCC± = ±10 V ±7.5 VCC± = ±5 V ±5 ±2.5 RL = 2 kΩ TA = 25°C See Figure 2 0 100 125 1k Figure 5 ±12.5 ±10 MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY ±15 ÌÌÌÌÌ VCC± = ±15 V ÌÌÌÌÌ ÌÌÌÌÌ VCC± = ±10 V ±7.5 ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ ±5 VCC± = ±5 V ±2.5 0 100 RL = 2 kΩ TA = 25°C See Figure 2 1k 10 k 100 k 1M 10 M Figure 6 VOM – Maximum Peak Output Voltage – V VOM – Maximum Peak Output Voltage – V ±15 10 k f – Frequency – Hz 100 k 1M 10 M MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY ÌÌÌÌ ÌÌÌÌ ±12.5 TA = 25°C ÌÌÌÌ ±10 ±7.5 TA = –55°C ÌÌÌÌ TA = 125°C ±5 ±2.5 0 10 k VCC± = ±15 V RL = 2 kΩ See Figure 2 40 k 100 k 400 k 1 M f – Frequency – Hz f – Frequency – Hz Figure 7 Figure 8 4 M 10 M † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. An 18-pF compensation capacitor is used. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 TL070 JFET-INPUT OPERATIONAL AMPLIFIER SLOS121B – NOVEMBER 1993 – REVISED MARCH 2001 TYPICAL CHARACTERISTICS† MAXIMUM PEAK OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌ ÌÌÌÌ ±15 ±12.5 RL = 2 kΩ ±10 ±7.5 ±5 ±2.5 ÌÌÌÌÌ ÌÌÌÌÌ VCC± = ±15 V See Figure 2 0 –75 –50 –25 0 25 50 75 ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ ±15 RL = 10 kΩ VOM – Maximum Peak Output Voltage – V VOM – Maximum Peak Output Voltage – V MAXIMUM PEAK OUTPUT VOLTAGE vs LOAD RESISTANCE 100 VCC± = ±15 V TA = 25°C See Figure 2 ±12.5 ±10 ±7.5 ±5 ±2.5 0 0.1 125 0.2 TA – Free-Air Temperature – °C 0.4 VOM – Maximum Peak Output Voltage – V ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ RL = 10 kΩ TA = 25°C ±10 ±7.5 ±5 ±2.5 0 0 2 4 6 8 10 12 14 16 A VD– Large-Signal Differential Voltage Amplification – V/mV MAXIMUM PEAK OUTPUT VOLTAGE vs SUPPLY VOLTAGE ±12.5 2 4 7 10 Figure 10 Figure 9 ±15 0.7 1 RL – Load Resistance – kΩ LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION VS FREE-AIR TEMPERATURE 1000 400 200 100 40 20 10 ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ 4 2 1 –75 VCC± = ±15 V VO = ±10 V RL = 2 kΩ –50 |VCC±| – Supply Voltage – V –25 0 25 50 75 100 125 TA – Free-Air Temperature – °C Figure 12 Figure 11 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. An 18-pF compensation capacitor is used. 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL070 JFET-INPUT OPERATIONAL AMPLIFIER SLOS121B – NOVEMBER 1993 – REVISED MARCH 2001 A VD – Differential Voltage Amplification – dB 106 105 104 103 ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ 102 VCC± = ±15 V C2 = 3 pF TA = 25°C See Figure 3 101 1 100 1k 10 k 100 k 1M 100 M f – Frequency – Hz 106 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY ÌÌÌÌÌÌÌ ÌÌÌÌÌÌÌ ÌÌÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌ ÌÌÌÌ ÌÌÌÌ VCC± = ±5 V to ±15 V RL = 2 kΩ TA = 25°C 105 104 Differential Voltage Amplification (left scale) 103 102 Phase Shift (right scale) 101 1 1 10 100 ÌÌÌÌ ÌÌÌÌ ÌÌÌÌ 1.02 Unity-Gain Bandwidth (left scale) 1.01 Phase Shift (right scale) 1 0.9 0.99 ÌÌÌÌÌÌÌ ÌÌÌÌÌÌÌ ÌÌÌÌÌÌÌ 0.8 0.7 –75 VCC± = ±15 V RL = 2 kΩ f = B1 for Phase Shift –50 –25 0 25 0.98 50 180° 10 M 75 100 ÌÌÌÌÌ ÌÌÌÌÌ 89 1.03 0.97 125 CMRR – Common-Mode Rejection Ratio – dB ÌÌÌÌÌ ÌÌÌÌÌ 1 1M 135° COMMON-MODE REJECTION RATIO vs FREE-AIR TEMPERATURE Normalized Phase Shift Normalized Unity-Gain Bandwidth 1.1 100 k 90° Figure 14 NORMALIZED UNITY-GAIN BANDWIDTH AND PHASE SHIFT vs FREE-AIR TEMPERATURE 1.2 10 k 45° f – Frequency – Hz Figure 13 1.3 1k 0° Phase Shift DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREQUENCY WITH FEED-FORWARD COMPENSATION A VD– Large-Signal Differential Voltage Amplification – V/mV TYPICAL CHARACTERISTICS† VCC± = ±15 V RL = 10 kΩ 88 87 86 85 84 83 –75 –50 –25 0 25 50 75 100 125 TA – Free-Air Temperature – °C TA – Free-Air Temperature – °C Figure 15 Figure 16 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. An 18-pF compensation capacitor is used. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TL070 JFET-INPUT OPERATIONAL AMPLIFIER SLOS121B – NOVEMBER 1993 – REVISED MARCH 2001 TYPICAL CHARACTERISTICS† SUPPLY CURRENT vs SUPPLY VOLTAGE 2 2 TA = 25°C No Signal No Load 1.8 1.8 1.6 I CC± – Supply Current – mA I CC± – Supply Current – mA SUPPLY CURRENT vs FREE-AIR TEMPERATURE 1.4 1.2 1 0.8 0.6 1.6 1.4 1.2 1 0.8 0.6 0.4 0.4 0.2 0.2 0 0 2 4 6 8 10 12 14 0 –75 16 VCC± = ±15 V No Signal No Load –50 –25 TOTAL POWER DISSIPATED vs FREE-AIR TEMPERATURE ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ 75 100 125 ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ 1.15 VCC± = ±15 V No Signal No Load 1.10 50 VCC± = ±15 V RL = 2 kΩ CL = 100 pF 1.05 1 0.95 0.90 25 0 –75 50 NORMALIZED SLEW RATE vs FREE-AIR TEMPERATURE Normalized Slew Rate P D– Total Power Dissipation – mW 75 25 Figure 18 Figure 17 100 0 TA – Free-Air Temperature – °C |VCC±| – Supply Voltage – V –50 –25 0 25 50 75 100 125 0.85 –75 –50 TA – Free-Air Temperature – °C –25 0 25 50 75 100 125 TA – Free-Air Temperature – °C Figure 19 Figure 20 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. An 18-pF compensation capacitor is used. 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL070 JFET-INPUT OPERATIONAL AMPLIFIER SLOS121B – NOVEMBER 1993 – REVISED MARCH 2001 TYPICAL CHARACTERISTICS TOTAL HARMONIC DISTORTION vs FREQUENCY 1 50 THD – Total Harmonic Distortion – % Vn – Equivalent Input Noise Voltage – nV/ Hz EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY 40 30 20 10 ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ 0 10 VCC± = ±15 V AVD = 10 RS = 20 Ω TA = 25°C 40 100 400 1 k 4 k 10 k 40 k 100 k 0.4 0.1 ÌÌÌÌ ÌÌÌÌ ÌÌÌÌ ÌÌÌÌ VCC± = ±15 V AVD = 1 VI(RMS) = 6 V TA = 25°C 0.04 0.01 0.004 0.001 100 400 1k f – Frequency – Hz Figure 21 V I and VO – Input and Output Voltage – V Output 2 0 ÌÌÌ ÌÌÌ –2 Input –4 –6 28 24 Overshoot 20 90% 16 12 8 4 10% 0 –4 0 0.5 1 1.5 40 k 100 k OUTPUT VOLTAGE vs ELAPSED TIME VO – Output Voltage – mV ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌ VCC± = ±15 V RL = 2 kΩ CL = 100 pF TA = 25°C 4 10 k Figure 22 VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE 6 4k f – Frequency – Hz 2 2.5 3 3.5 0 0.1 ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ VCC± = ±15 V RL = 2 kΩ TA = 25°C tr 0.2 0.3 0.4 0.5 0.6 0.7 t – Elapsed Time – µs t – Time – µs Figure 24 Figure 23 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 TL070 JFET-INPUT OPERATIONAL AMPLIFIER SLOS121B – NOVEMBER 1993 – REVISED MARCH 2001 APPLICATION INFORMATION 220 kΩ 0.00375 µF 10 kΩ 0.01 µF 0.003 µF 0.03 µF 27 kΩ MIN VCC+ 100 Ω – TL070 + 1 µF Input 100 Ω + 75 µF 47 kΩ 10 pF 3.3 kΩ MIN 100 kΩ Treble MAX 0.03 µF 0.003 µF 10 kΩ VCC– Balance 10 kΩ 100 kΩ Bass MAX 5 kΩ + Gain 47 µF 68 kΩ 10 pF Figure 25. IC Preamplifier ÌÌÌÌÌÁÁÁ ÌÌÌÌÌÁÁÁ ÌÌÌÌÌÁÁÁ IC PREAMPLIFIER RESPONSE CHARACTERISTICS MAX Bass Voltage Amplification – dB 20 15 VCC± = ±15 V TA = 25°C See Figure 25 MAX Treble 10 5 0 –5 –10 –15 MIN Bass 20 40 ÁÁÁ ÁÁÁ MIN Treble –20 –25 100 200 400 1k 2k 4k f – Frequency – Hz Figure 26 12 – TL070 + VCC– 50 pF 25 VCC+ POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 10 k 20 k Output PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TL070CD OBSOLETE SOIC D 8 TBD Call TI Call TI TL070CP OBSOLETE PDIP P 8 TBD Call TI Call TI TL070IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL070IDRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL070IP OBSOLETE PDIP P 8 TBD Lead/Ball Finish Call TI MSL Peak Temp (3) Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 MECHANICAL DATA MPDI001A – JANUARY 1995 – REVISED JUNE 1999 P (R-PDIP-T8) PLASTIC DUAL-IN-LINE 0.400 (10,60) 0.355 (9,02) 8 5 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.325 (8,26) 0.300 (7,62) 0.020 (0,51) MIN 0.015 (0,38) Gage Plane 0.200 (5,08) MAX Seating Plane 0.010 (0,25) NOM 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.430 (10,92) MAX 0.010 (0,25) M 4040082/D 05/98 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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