STB120N4LF6 STD120N4LF6 N-channel 40 V, 3.1 mΩ, 80 A DPAK, D²PAK STripFET™ VI DeepGATE™ Power MOSFET Features Order codes VDSS RDS(on) max ID STB120N4LF6 40 V 4.0 mΩ 80 A STD120N4LF6 40 V 4.0 mΩ 80 A 3 1 ■ Logic level drive ■ 100% avalanche tested DPAK 3 1 D²PAK Application ■ Switching applications – Automotive Description Figure 1. Internal schematic diagram This product is a 40 V N-channel STripFET™ VI Power MOSFET based on the ST’s proprietary STripFET™ technology, with a new gate structure. The resulting Power MOSFET exhibits the lowest RDS(on) in all packages. Table 1. Device summary Order codes Marking STB120N4LF6 Packages D²PAK 120N4LF6 STD120N4LF6 February 2011 Packaging Tape and reel DPAK Doc ID 16919 Rev 2 1/18 www.st.com 18 Contents STB120N4LF6, STD120N4LF6 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2/18 .............................................. 8 Doc ID 16919 Rev 2 STB120N4LF6, STD120N4LF6 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit 40 V ± 20 V Drain current (continuous) at TC = 25 °C 80 A Drain current (continuous) at TC = 100 °C 80 A Drain current (pulsed) 320 A PTOT Total dissipation at TC = 25 °C 110 W Tstg Storage temperature -55 to 175 °C VDS Drain-source voltage (VGS = 0) VGS Gate-source voltage ID (1) ID IDM (2) Tj Operating junction temperature 1. Limited by wire bonding 2. Pulse width limited by safe operating area Table 3. Thermal resistance Value Symbol Parameter Unit DPAK Rthj-case Rthj-pcb Thermal resistance junction-case max Thermal resistance junction-pcb max (1) D²PAK 1.36 50 °C/W 35 °C/W 1. When mounted on 1 inch2 2 oz. Cu board. Table 4. Symbol IAV EAS (1) Avalanche data Parameter Value Unit Not-repetitive avalanche current 40 A Single pulse avalanche energy 394 mJ 1. Starting Tj = 25 °C, ID = 40 A, VDD = 25 V Doc ID 16919 Rev 2 3/18 Electrical characteristics 2 STB120N4LF6, STD120N4LF6 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 5. Symbol Parameter Test conditions Min. Typ. 40 - Max. Unit Drain-source breakdown Voltage ID = 250 µA, VGS= 0 IDSS Zero gate voltage drain current (VGS = 0) VDS = 20 V VDS = 20 V,Tc = 125 °C - 1 10 µA µA IGSS Gate body leakage current (VDS = 0) VGS = ± 20 V - ±100 nA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA - 3 V Static drain-source on resistance VGS = 5 V, ID = 40 A 3.6 5.0 mΩ RDS(on) VGS = 10 V, ID = 40 A 3.1 4.0 mΩ Min Typ. Max. Unit - 4300 650 375 - pF pF pF - 80 15 15 - nC nC nC V(BR)DSS Table 6. Symbol 4/18 Static 1 V Dynamic Parameter Test conditions Ciss Coss Crss Input capacitance Output capacitance Reverse transfer capacitance VDS = 25 V, f=1 MHz, VGS = 0 V Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD = 20 V, ID = 80 A VGS = 10 V (see Figure 14) RG Intrinsic gate resistance f=1 MHz open drain Doc ID 16919 Rev 2 1.35 Ω STB120N4LF6, STD120N4LF6 Table 7. Symbol Electrical characteristics Switching on/off (inductive load) Parameter td(on) tr Turn-on delay time Rise time td(off) tf Turn-off delay time Fall time Table 8. Symbol Test conditions Min. Typ. Max. Unit VDD = 20 V, ID = 40 A, RG = 4.7 Ω, VGS = 10 V Figure 15 - 15 95 - ns ns - 125 45 - ns ns Min. Typ. Max. Unit - 80 320 A A 1.1 V Source drain diode Parameter Test conditions ISD ISDM(1) Source-drain current Source-drain current (pulsed) VSD(2) Forward on voltage ISD = 40 A, VGS = 0 - Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 80 A, di/dt = 100 A/µs, VDD = 32 V, TJ = 150 °C Figure 17 - trr Qrr IRRM 50 85 3.5 ns nC A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% Doc ID 16919 Rev 2 5/18 Electrical characteristics STB120N4LF6, STD120N4LF6 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance Figure 5. Transfer characteristics AM08964v1 ID (A) Tj=175°C Tc=25°C Single pulse is ea ar S(on) his RD t in ax on m ati by er ed Op imit L 100 100µs 1ms 10 10ms 1 0.1 0.1 Figure 4. 10 1 VDS(V) Output characteristics AM08965v1 ID (A) AM08966v1 ID (A) VGS=10V 350 5V 300 VDS=2V 300 250 4V 200 200 150 100 100 3V 50 0 0 Figure 6. 0.5 1.0 1.5 0 0 VDS(V) Normalized BVDSS vs temperature AM08967v1 BVDSS Figure 7. 1 2 4 3 VGS(V) Static drain-source on resistance AM08968v1 RDS(on) (mΩ) (norm) ID=1mA VGS=10V 1.05 3.5 1.00 3.0 0.95 2.5 0.90 0.85 -75 6/18 -25 25 75 125 175 TJ(°C) 2.0 0 Doc ID 16919 Rev 2 20 40 60 80 ID(A) STB120N4LF6, STD120N4LF6 Figure 8. Electrical characteristics Gate charge vs gate-source voltage Figure 9. AM08969v1 VGS (V) Capacitance variations AM08970v1 C (pF) VDD=20V ID=80A 12 Ciss 10 8 1000 6 Coss 4 Crss 2 0 0 20 40 100 80 60 Qg(nC) Figure 10. Normalized gate threshold voltage vs temperature AM08971v1 VGS(th) (norm) 0.1 1 Figure 11. Normalized on resistance vs temperature AM08972v1 RDS(on) (norm) ID=250µA 1.2 VDS(V) 10 ID=40A VGS=10V 2.0 1.0 1.5 0.8 0.6 1.0 0.4 0.5 0.2 0 -75 -25 25 75 125 175 TJ(°C) 0 -75 -25 25 75 125 175 TJ(°C) Figure 12. Source-drain diode forward characteristics AM08973v1 VSD (V) TJ=-55°C 1.0 0.9 TJ=25°C 0.8 0.7 0.6 TJ=175°C 0.5 0.4 0 20 40 60 80 ISD(A) Doc ID 16919 Rev 2 7/18 Test circuits 3 STB120N4LF6, STD120N4LF6 Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF VGS IG=CONST VDD 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 AM01469v1 Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test switching and diode recovery times circuit A A D.U.T. FAST DIODE B B L A D G VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 Figure 17. Unclamped inductive waveform AM01471v1 Figure 18. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 8/18 0 Doc ID 16919 Rev 2 10% AM01473v1 STB120N4LF6, STD120N4LF6 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and products status are available at: www.st.com. ECOPACK is an ST trademark. Doc ID 16919 Rev 2 9/18 Package mechanical data Table 9. STB120N4LF6, STD120N4LF6 D²PAK (TO-263) mechanical data mm Dim. Min. Typ. A 4.40 4.60 A1 0.03 0.23 b 0.70 0.93 b2 1.14 1.70 c 0.45 0.60 c2 1.23 1.36 D 8.95 9.35 D1 7.50 E 10 E1 8.50 10.40 e 2.54 e1 4.88 5.28 H 15 15.85 J1 2.49 2.69 L 2.29 2.79 L1 1.27 1.40 L2 1.30 1.75 R V2 10/18 Max. 0.4 0° 8° Doc ID 16919 Rev 2 STB120N4LF6, STD120N4LF6 Package mechanical data Figure 19. D²PAK (TO-263) drawing 0079457_R Figure 20. D²PAK footprint(a) 16.90 12.20 5.08 1.60 3.50 9.75 Footprint a. All dimension are in millimeters Doc ID 16919 Rev 2 11/18 Package mechanical data Table 10. STB120N4LF6, STD120N4LF6 DPAK (TO-252) mechanical data mm Dim. Min. Typ. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 E 5.10 6.40 6.60 E1 4.70 e 2.28 e1 4.40 4.60 H 9.35 10.10 L 1 L1 2.80 L2 0.80 L4 0.60 1 R V2 12/18 Max. 0.20 0° 8° Doc ID 16919 Rev 2 STB120N4LF6, STD120N4LF6 Package mechanical data Figure 21. DPAK (TO-252) drawing 0068772_G Figure 22. DPAK footprint(b) 6.7 1.8 3 1.6 2.3 6.7 2.3 1.6 AM08850v1 b. All dimension are in millimeters Doc ID 16919 Rev 2 13/18 Packaging mechanical data 5 STB120N4LF6, STD120N4LF6 Packaging mechanical data Table 11. D²PAK (TO-263) tape and reel mechanical data Tape Reel mm mm Dim. 14/18 Dim. Min. Max. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T P0 3.9 4.1 P1 11.9 12.1 Base qty 1000 P2 1.9 2.1 Bulk qty 1000 R 50 T 0.25 0.35 W 23.7 24.3 Doc ID 16919 Rev 2 Min. Max. 330 13.2 26.4 30.4 STB120N4LF6, STD120N4LF6 Table 12. Packaging mechanical data DPAK (TO-252) tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. A0 6.8 7 A B0 10.4 10.6 B 1.5 12.1 C 12.8 1.6 D 20.2 G 16.4 50 B1 Min. Max. 330 13.2 D 1.5 D1 1.5 E 1.65 1.85 N F 7.4 7.6 T K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 Doc ID 16919 Rev 2 18.4 22.4 15/18 Packaging mechanical data STB120N4LF6, STD120N4LF6 Figure 23. Tape for D²PAK(TO-263) and DPAK (TO-252) 10 pitches cumulative tolerance on tape +/- 0.2 mm T P0 Top cover tape P2 D E F W K0 B0 A0 P1 D1 User direction of feed R Bending radius User direction of feed AM08852v2 Figure 24. Reel for D²PAK(TO-263) and DPAK (TO-252) T REEL DIMENSIONS 40mm min. Access hole At sl ot location B D C N A Full radius Tape slot in core for tape start 25 mm min. width G measured at hub AM08851v2 16/18 Doc ID 16919 Rev 2 STB120N4LF6, STD120N4LF6 6 Revision history Revision history Table 13. Document revision history Date Revision Changes 14-Dec-2009 1 First release 23-Feb-2011 2 Document status promoted from preliminary data to datasheet. Doc ID 16919 Rev 2 17/18 STB120N4LF6, STD120N4LF6 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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