STRH40P10 Rad-Hard P-channel 100 V, 34 A Power MOSFET Features VBDSS ID RDS(on) Qg 100 V 34 A 0.060 Ohm 162 nC ■ Fast switching ■ 100% avalanche tested ■ Hermetic package ■ 100 krad TID ■ SEE radiation hardened 3 1 2 TO-254AA Applications ■ Satellite ■ High reliability Figure 1. Internal schematic diagram D (1) Description This P-channel Power MOSFET is developed with STMicroelectronics unique STripFET™ process. It has specifically been designed to sustain high TID and provide immunity to heavy ion effects. G (3) S (2) SC06140p Table 1. Device summary Part number ESCC part number STRH40P10HY1 - STRH40P10HYG Note: TBD Quality level Package Engineering model TO-254AA ESCC flight Lead finish Mass (g) Gold 10 Temp. range EPPL -55 to 150°C Target Contact ST sales office for information about the specific conditions for product in die form and for other packages. November 2011 Doc ID 18354 Rev 6 1/18 www.st.com 18 Contents STRH40P10 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Radiation characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 Electrical characteristics (curves) 5 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2/18 Doc ID 18354 Rev 6 . . . . . . . . . . . . . . . . . . . . . . . . . . 10 STRH40P10 1 Electrical ratings Electrical ratings (TC= 25 °C unless otherwise specified). Note: For the P-channel MOSFET actual polarity of voltages and current has to be reversed. Table 2. Absolute maximum ratings (pre-irradiation) Symbol Parameter Value Unit VDS (1) Drain-source voltage (VGS = 0) 100 V VGS (2) Gate-source voltage ±20 V Drain current (continuous) 34 A Drain current (continuous) at TC= 100 °C 21 A Drain current (pulsed) 136 A Total dissipation 176 W Peak diode recovery voltage slope 2.5 V/ns ID (3) ID (3) IDM (4) PTOT (3) dv/dt (5) Tstg TJ Storage temperature °C - 55 to 150 Operating junction temperature °C 1. This rating is guaranteed @ TJ ≥ 25 °C (see Figure 10: Normalized BVDSS vs temperature). 2. This value is guaranteed over the full range of temperature. 3. Rated according to the Rthj-case + Rthc-s. 4. Pulse width limited by safe operating area. 5. ISD ≤40 A, di/dt ≤100 A/µs, VDD = 80% V(BR)DSS. Table 3. Thermal data Symbol Value Unit Thermal resistance junction-case max 0.71 °C/W Case-to-sink typ 0.21 °C/W Value Unit Avalanche current, repetitive or not-repetitive (pulse width limited by TJ max) TBD A EAS(1) Single pulse avalanche energy (starting TJ=25 °C, ID= 17 A, VDD=50 V) 1133 mJ EAS Single pulse avalanche energy (starting TJ=110 °C, ID= 17 A, VDD=50 V) 332 mJ Rthj-case Rthc-s Table 4. Symbol IAR Parameter Avalanche characteristics Parameter Doc ID 18354 Rev 6 3/18 Electrical ratings Table 4. STRH40P10 Avalanche characteristics (continued) Symbol EAR Parameter Value Repetitive avalanche (Vdd = 50 V, IAR = 24 A, f = 100 KHz, TJ = 25 °C, duty cycle = 10%) 25 mJ Repetitive avalanche (Vdd = 50 V, IAR = 17 A, f = 100 KHz, TJ = 110 °C, duty cycle = 10%) 1. Maximum rating value. 4/18 Unit Doc ID 18354 Rev 6 8 STRH40P10 2 Electrical characteristics Electrical characteristics (TC = 25 °C unless otherwise specified). Note: For the P-channel MOSFET actual polarity of voltages and current has to be reversed. Pre-irradiation Table 5. Symbol Pre-irradiation on/off states Parameter Test conditions Min. Typ. Max. Unit 10 µA 100 IDSS Zero gate voltage drain current (VGS = 0) 80% BVDss IGSS Gate body leakage current (VDS = 0) VGS = 20 V VGS = -20 V -100 nA nA BVDSS (1) Drain-to-source breakdown voltage VGS = 0, ID = 1 mA 100 V VGS(th) Gate threshold voltage VDS = VGS, ID = 1 mA RDS(on) Static drain-source on resistance VGS = 12 V; ID = 17 A 2 0.060 4.5 V 0.075 Ω 1. This rating is guaranteed @ TJ ≥ 25 °C (see Figure 10: Normalized BVDSS vs temperature). Table 6. Symbol Ciss Coss (1) Crss Qg Qgs Qgd RG(1) Pre-irradiation dynamic Parameter Test conditions Min. Typ. Max. Unit Input capacitance Output capacitance Reverse transfer capacitance VGS = 0, VDS = 25 V, f=1 MHz 3710 510 204 4640 635 255 5570 760 306 pF pF pF Total gate charge Gate-to-source charge Gate-to-drain (“Miller”) charge VDD = 50 V, ID = 34 A, VGS=12 V 130 14 32 162 18 40 194 22 48 nC nC nC Gate input resistance f=1MHz gate DC bias=0 test signal level=20mV open drain Ω 1.5 1. Not tested, guaranteed by process. Table 7. Symbol td(on) tr td(off) tf Pre-irradiation switching times Parameter Turn-on delay time Rise time Turn-off-delay time Fall time Test conditions VDD = 50 V, ID = 17 A, RG = 4.7 Ω, VGS = 12 V Doc ID 18354 Rev 6 Min. Typ. Max Unit 15 19 68 34 24 31 129 46 33 43 190 58 ns ns ns ns 5/18 Electrical characteristics Table 8. Symbol ISD ISDM (2) VSD (3) trr(4) Qrr(4) IRRM(4) trr(4) Qrr(4) IRRM(4) STRH40P10 Pre-irradiation source drain diode (1) Parameter Test conditions Typ. Source-drain current Source-drain current (pulsed) Forward on voltage ISD = 30 A, VGS = 0 Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 34 A, di/dt = 40 A/µs VDD= 12 V, TJ = 25 °C Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 34 A, di/dt = 40 A/µs VDD= 12 V, TJ = 150 °C 1. Refer to the Figure 16. 2. Pulse width limited by safe operating area. 3. Pulsed: pulse duration = 300 µs, duty cycle 1.5%. 4. Not tested in production, guaranteed by process. 6/18 Min. Doc ID 18354 Rev 6 Max Unit 34 136 A A 1.1 276 345 4.1 316 473 7.1 133 V 414 ns µC A ns µC A STRH40P10 3 Radiation characteristics Radiation characteristics The technology of the STMicroelectronics rad-hard Power MOSFETs is extremely resistant to radiative environments. Every manufacturing lot is tested for total ionizing dose (irradiation done according to the ESCC 22900 specification, window 1) using the TO-3 package. Both pre-irradiation and post-irradiation performances are tested and specified using the same circuitry and test conditions in order to provide a direct comparison. (Tamb= 22 ± 3 °C unless otherwise specified). Total dose radiation (TID) testing One bias conditions using the TO-3 package: – VGS bias: + 20 V applied and VDS= -100 V during irradiation The following parameters are measured (see Table 9, Table 10 and Table 11): ● before irradiation ● after irradiation ● after 24 hrs @ room temperature ● after 168 hrs @ 100 °C anneal Table 9. Symbol Post-irradiation on/off states @ TJ= 25 °C, (Co60 γ rays 100 K Rad(Si)) Parameter Test conditions Drift values ∆ Unit IDSS Zero gate voltage drain current (VGS = 0) 80% BVDss +1 µA IGSS Gate body leakage current (VDS = 0) VGS = 12 V VGS = -12 V 1.5 -1.5 µA BVDSS Drain-to-source breakdown voltage VGS = 0, ID = 1 mA +5% V VGS(th) Gate threshold voltage VDS = VGS, ID = 1 mA +150% V RDS(on) Static drain-source on resistance VGS = 10 V; ID = 20 A -4% / +35% Ω Table 10. Symbol Qg Dynamic post-irradiation @ TJ= 25 °C, (Co60 γ rays 100 K Rad(Si)) (1) Parameter Test conditions Drift values ∆ Unit -15% / +5% Total gate charge Qgs Gate-source charge Qgd Gate-drain charge IG = 1 mA, VGS = 12 V, VDS = 50 V, IDS = 20 A -5% / +200% nC -10% / +100% 1. Parameter not measured after irradiation but guaranteed by the results obtained during the evaluation phase that proves this parameter is directly correlated to the VGS(th) shift. Doc ID 18354 Rev 6 7/18 Radiation characteristics STRH40P10 Source drain diode post-irradiation @ TJ= 25 °C, (Co60 γ rays 100 K Rad(Si))(1) Table 11. Symbol Parameter VSD (2) Test conditions Forward on voltage Drift values ∆. Unit ± 5% V ISD = 40 A, VGS = 0 1. Refer to Figure 16. 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% Single event effect, SOA The technology of the STMicroelectronics rad-hard Power MOSFETs is extremely resistant to heavy ion environment for single event effect (irradiation per MIL-STD-750E, method 1080 bias circuit in Figure 3: Single event effect, bias circuit). SEB and SEGR tests have been performed with a fluence of 3e+5 ions/cm². The accept/reject criteria are: ● SEB test: drain voltage checked, trigger level is set to Vds = - 5 V. Stop condition: as soon as a SEB occurs or if the fluence reaches 3e+5 ions/cm². ● SEGR test: the gate current is monitored every 200 ms. A gate stress is performed before and after irradiation. Stop condition: as soon as the gate current reaches 100 nA (during irradiation or during PIGS test) or if the fluence reaches 3e+5 ions/cm². The results are: Table 12. – no SEB – SEGR test produces the following SOA (see Table 12: Single event effect (SEE), safe operating area (SOA) and Figure 2: Single event effect, SOA) Single event effect (SEE), safe operating area (SOA) Ion Let (Mev/(mg/cm2) Kr 8/18 Energy Range (MeV) (µm) VDS (V) @VGS=0 @VGS= 2 V @VGS= 5 V @VGS= 10 V @VGS= 15 V 768 94 - -60 - - - 756 92 - - - - -20 32 Doc ID 18354 Rev 6 STRH40P10 Radiation characteristics Figure 2. Single event effect, SOA .U0H9FPðPJ 9GV9GVPD[ 9JV9 Figure 3. Single event effect, bias circuit(a) a. Bias condition during radiation refer to Table 12: Single event effect (SEE), safe operating area (SOA) . Doc ID 18354 Rev 6 9/18 Electrical characteristics (curves) STRH40P10 4 Electrical characteristics (curves) Figure 4. Safe operating area Thermal impedance Figure 7. Transfer characteristics HV32530v1 ID (A) 100 Figure 5. Tj=150°C Tc=25°C Sinlge pulse 100µs Operation in this area is Limited by max RDS(on) 10 1ms 10ms 1 DC operation 0.1 0.1 Figure 6. 10 1 100 VDS(V) Output characteristics HV32500v1 ID (A) 140 VGS= 12 V HV32505v1 ID (A) Vds = 3 V 100 120 80 5V 100 TJ = 150 °C 80 60 60 TJ = 25 °C 40 4V 40 20 20 TJ = -55 °C 0 0 Figure 8. 5 10 15 0 0 VDS(V) Gate charge vs gate-source voltage Figure 9. HV32510v1 -VGS (V) VDD=50 V 10 2 4 8 6 10 VGS(V) Capacitance variations HV32520v1 C (pF) 6100 5100 8 Ciss 4100 6 3100 4 2 Crss 1100 Coss 100 0 0 10/18 2100 ID= -34 A ID= -17 A ID= -8.5 A 20 60 100 140 Qg(nC) Doc ID 18354 Rev 6 0 20 40 60 80 VDS(V) STRH40P10 Electrical characteristics (curves) Figure 10. Normalized BVDSS vs temperature Figure 11. Static drain-source on resistance Figure 12. Normalized gate threshold voltage vs temperature Figure 13. Normalized on resistance vs temperature Figure 14. Source drain-diode forward characteristics Doc ID 18354 Rev 6 11/18 Test circuits 5 STRH40P10 Test circuits Figure 15. Switching times test circuit for resistive load (1) 1. Max driver VGS slope = 1V/ns (no DUT) Figure 16. Source drain diode 12/18 Doc ID 18354 Rev 6 STRH40P10 Test circuits Figure 17. Unclamped inductive load test circuit (single pulse and repetitive) Doc ID 18354 Rev 6 13/18 Package mechanical data 6 STRH40P10 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Table 13. TO-254AA mechanical data mm Inch Dim. Min. Max. Min. Typ. Max. A 13.59 13.84 0.535 0.545 B 13.59 13.84 0.535 0.545 C 20.07 20.32 0.790 0.800 D 6.32 6.60 0.249 0.260 E 1.02 1.27 0.040 0.050 F 3.56 3.81 0.140 0.150 G 16.89 17.40 0.665 0.685 H I 6.86 0.89 1.02 0.270 1.14 0.035 0.040 J 3.81 0.150 K 3.81 0.150 L 12.95 14.50 M 2.92 3.18 N 0.71 R1 1.00 R2 14/18 Typ. 1.52 1.65 1.78 Doc ID 18354 Rev 6 0.510 0.045 0.571 0.039 0.060 0.065 0.070 STRH40P10 Package mechanical data Figure 18. TO-254AA drawing Doc ID 18354 Rev 6 15/18 Order codes STRH40P10 7 Order codes Table 14. Ordering information Order code ESCC part number Quality level EPPL STRH40P10HY1 - Engineering model - STRH40P10HYG TBD Package Lead finish Marking Packing TO-254AA Gold TBD Strip pack ESCC flight Target Contact ST sales office for information about the specific conditions for products in die form and for other packages. 16/18 Doc ID 18354 Rev 6 STRH40P10 8 Revision history Revision history Table 15. Document revision history Date Revision Changes 23-Dec-2010 1 First release. 02-Feb-2011 2 Updated Figure 1. 03-May-2011 3 Updated Figure 1. 22-Jun-2011 4 Updated features on coverpage. 25-Jul-2011 5 Updated order codes in Table 1: Device summary and Table 14: Ordering information. Minor text changes. 09-Nov-2011 6 Updated dynamic values on Table 6: Pre-irradiation dynamic, Table 7: Pre-irradiation switching times and Table 8: Pre-irradiation source drain diode. Doc ID 18354 Rev 6 17/18 STRH40P10 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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