SN55ALS160, SN75ALS160 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS018D – JUNE 1986 – REVISED MAY 1995 SUITABLE FOR IEEE STANDARD 488-1978 (GPIB)† D D D D D D D 8-Channel Bidirectional Transceivers High-Speed Advanced Low-Power Schottky (ALS) Circuitry Low Power Dissipation: SN55ALS160 . . . 56 mW Max Per Channel SN75ALS160 . . . 46 mW Max Per Channel Fast Propagation Times . . . 20 ns Max High-Impedance pnp Inputs Receiver Hysteresis: SN55ALS160 . . . 550 mV Typ SN75ALS160 . . . 650 mV Typ Open-Collector Driver Output Option No Loading of Bus When Device Is Powered Down (VCC = 0) Power-Up/Power-Down Protection (Glitch Free) SN55ALS160 . . . J OR W PACKAGE SN75ALS160 . . . DW OR N PACKAGE (TOP VIEW) TE B1 B2 B3 B4 B5 B6 B7 B8 GND GPIB I/O Ports 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC D1 D2 D3 D4 D5 D6 D7 D8 PE Terminal I/O Ports SN55ALS160 . . . FK PACKAGE (TOP VIEW) B2 B1 TE VCC D1 D D description 3 2 1 20 19 B8 GND PE D8 D7 The SN55ALS160 and SN75ALS160 eightB3 18 D2 4 channel general-purpose interface bus B4 17 D3 5 transceivers are monolithic, high-speed, B5 16 D4 6 advanced low-power Schottky (ALS) devices B6 15 D5 7 designed for two-way data communications over 14 D6 B7 8 9 10 11 12 13 single-ended transmission lines. They are designed to meet the requirements of IEEE Standard 488 - 1978. The transceivers feature driver outputs that can be operated in either the passive-pullup or 3-state mode. If talk enable (TE) is high, these ports have the characteristics of passive-pullup outputs when pullup enable (PE) is low and of 3-state outputs when PE is high. Taking TE low places these ports in the high-impedance state. The driver outputs are designed to handle loads up to 48 mA of sink current. An active turn-off feature has been incorporated into the bus-terminating resistors so that the device exhibits a high impedance to the bus when VCC = 0. When combined with the SN55ALS161, SN75ALS161, or SN75ALS162 bus management transceiver, the pair provides the complete 16-wire interface for the IEEE - 488 bus. The SN55ALS160 is characterized for operation from – 55°C to 125°C. The SN75ALS160 is characterized for operation from 0°C to 70°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. † The transceivers are suitable for IEEE Standard 896 applications to the extent of the operating conditions and characteristics specified in this data sheet. Certain limits contained in the IEEE specification are not met or cannot be tested over the entire military temperature range. Copyright 1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN55ALS160, SN75ALS160 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS018D – JUNE 1986 – REVISED MAY 1995 Function Tables EACH DRIVER INPUTS D TE PE OUTPUT B H H H H L H X H X L X L X L Z‡ Z‡ EACH RECEIVER INPUTS B TE PE OUTPUT D L L X L H L X H X H X Z H = high level, L = low level, X = irrelevant, Z = high-impedance state † This is the high-impedance state of a normal 3-state output modified by the internal resistors to VCC and GND. logic symbol‡ PE TE 11 1 logic diagram (positive logic) PE M1 [3S] M2 [0C] TE EN3 [XMT] D1 EN4 [RCV] 11 1 19 2 D1 19 2 3 (1 4 D2 D3 D4 D5 D6 D7 D8 18 1 /2 ) 3 17 4 16 5 15 6 14 7 13 8 12 9 B1 D2 3 B2 D3 B3 4 B5 B7 B8 D4 Terminal I/O Ports ‡ This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Designates 3-state outputs Designates open-collector outputs with passive pullup GPIB I/O Ports B5 14 7 D7 B4 15 6 D6 B3 16 5 D5 B2 17 B4 B6 B1 18 B6 13 8 B7 12 D8 9 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 B8 SN55ALS160, SN75ALS160 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS018D – JUNE 1986 – REVISED MAY 1995 schematics of inputs and outputs EQUIVALENT OF ALL CONTROL INPUTS EQUIVALENT OF ALL INPUT/OUTPUT PORTS VCC 9 kΩ NOM 10 kΩ NOM 1.7 kΩ NOM R(eq) Input 4 kΩ NOM 4 kΩ NOM GND Input/Output Port Driver output R(eq) = 30 Ω NOM Receiver output R(eq) = 110 Ω NOM R(eq) = equivalent resistor Circuit inside dashed lines is on the driver outputs only. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Low-level driver output current, IOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA: SN55ALS160 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C SN75ALS160 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C Case temperature for 60 seconds, TC: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Lead temperature 1,6 mm (1/16 inch) from the case for 10 seconds: DW or N package . . . . . . . . . . . 260°C Lead temperature 1,6 mm (1/16 inch) from the case for 60 seconds: J or W package . . . . . . . . . . . . . 300°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to network ground terminal. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR TA = 70°C POWER RATING TA = 125°C POWER RATING DW 1125 mW 9.0 mW/°C 720 mW — FK 1375 mW 11.0 mW/°C 880 mW 275 mW 275 mW J 1375 mW 11.0 mW/°C 880 mW N 1150 mW 9.2 mW/°C 736 mW — W 1000 mW 8.0 mW/°C 640 mW 200 mW POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN55ALS160, SN75ALS160 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS018D – JUNE 1986 – REVISED MAY 1995 SN55ALS160 recommended operating conditions Supply voltage, VCC High-level input voltage, VIH NOM MAX UNIT 5 5.25 V TE and PE at TA = – 55°C to 125°C 2 Bus and terminal at TA = 25°C to 125°C 2 Bus and terminal at TA = – 55°C Low-level input voltage, VIL MIN 4.75 V 2.1 TE and PE at TA = – 55°C to 125°C 0.8 Bus and terminal at TA = 25°C to – 55°C 0.8 Bus and terminal at TA = 125°C High level output current, High-level current IOH Low level output current, Low-level current IOL V 0.7 Bus ports with pullups active (VCC = 5 V) – 5.2 mA Terminal ports – 800 µA Bus ports 48 Terminal ports 16 Operating free-air temperature, TA – 55 mA 125 °C SN75ALS160 recommended operating conditions Supply voltage, VCC High-level input voltage, VIH MIN NOM MAX UNIT 4.75 5 5.25 V 2 Low-level input voltage, VIL High level output current, High-level current IOH Low level output current, Low-level current IOL 0.8 V Bus ports with pullups active – 5.2 mA Terminal ports – 800 µA Bus ports 48 Terminal ports 16 Operating free-air temperature, TA 4 V 0 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 70 mA °C electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) TEST CONDITIONS† SN55ALS160 MIN TYP‡ MAX SN75ALS160 MIN TYP‡ MAX UNIT II = – 18 mA, VCC = MIN – 0.8 – 0.8 V VCC = 5 V, VCC = 5 V, TA = – 55°C and 25°C TA = 125°C IOH = – 800 µA, IOH = – 5.2 mA, TE at 0.8 V, TE at 0.8 V, Bus IOL = 16 mA, IOL = 48 mA, Terminal VI = 5.5 V, Terminal,, PE, or TE PARAMETER VIK Input clamp voltage Vhys y H t i voltage lt Hysteresis (VIT+ – VIT– IT ) – 1.5 Bus High level output voltage High-level VOL Low level output voltage Low-level II Input current at maximum input voltage IIH IIL High-level input current VI/O(b I/O(bus)) Voltage at bus port Low-level input current Terminal Bus Terminal PE and TE at 2 V, VCC = MIN VCC = MIN Current into bus port Power on Short circuit output current Short-circuit ICC Supply current 3.5 2.7 3.5 2.5 3.3 2.5 3.3 V 0.5 0.3 0.5 0.35 0.5 0.35 0.5 VCC = MAX 0.2 100 0.2 100 µA VI = 2.7 V, VI = 0.5 V, VCC = MAX VCC = MAX 0.1 20 0.1 20 µA – 30 –100 – 10 –100 µA Driver disabled,, VCC = 5 V (SN55’) II(bus) = 0 II(bus) = –12 mA TE at 2 V, Driver disabled, VCC = 5 V (SN55’) Terminal VCC = 0 VCC = MAX Bus VCC = MAX No load,, VCC = MAX 2.5 3 3.7 2.5 3 –1.5 –1.3 3.7 –1.5 V –1.3 0 – 3.2 0 – 3.2 2.5 – 3.2 VI(bus) = 2.5 V to 3.7 V 2.5 – 3.2 0 2.5 0 2.5 0.7 2.5 0.7 2.5 VI(bus) = 0 to 2.5 V 40 40 – 15 – 35 – 75 – 15 – 35 – 75 – 25 – 50 – 125 – 25 – 50 – 125 Terminal outputs low and enabled 42 56 42 65 Bus outputs low and enabled 52 85 52 80 CI/O(bus) Bus-port capacitance VCC = 0 to 5 V, VI/O = 0 to 2 V, f = 1 MHz † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. ‡ All typical values are at VCC = 5 V, TA = 25°C. § VOH applies to 3-state outputs only. V 30 30 mA µA mA mA pF 5 SLLS018D – JUNE 1986 – REVISED MAY 1995 IOS 2.7 0.3 VI(bus) = 3.7 V to 5 V VI(bus) = 5 V to 5.5 V Power off V 0.25 VCC = MIN VCC = MIN VI(bus) = –1.5 V to 0.4 V VI(bus) = 0.4 V to 2.5 V II/O(bus) 0.65 0.55 SN55ALS160, SN75ALS160 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 VOH§ Bus 0.4 0.4 – 1.5 SN55ALS160, SN75ALS160 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS018D – JUNE 1986 – REVISED MAY 1995 switching characteristics at VCC = 4.75 V, 5 V, and 5.25 V, CL = 50 pF (unless otherwise noted) FROM (INPUT) PARAMETER tPLH TO (OUTPUT) TEST CONDITIONS TA† 25°C Propagation g delayy time,, low- to high-level g output Terminal Bus See Figure 1 25°C Propagation g delay y time,, highg to low-level output Full range tPLH Propagation g delay y time,, low- to high-level g output Full range 25°C tPHL Output enable time to high level tPHZ Output disable time from high level Output disable time from low level tPZH Output enable time to high level tPHZ Output disable time from high level 25°C ten Output pullup enable time 17 20 10 See Figure 3 8 25°C Terminal See Figure 4 9 Bus See Figure 5 24 Output pullup disable time Full range ns 19 36 50 10 18 23 15 ns 26 30 15 24 31 16 Full range 25°C 28 24 Full range 25°C 14 34 12 Full range 25°C 30 16 16 Full range 25°C ns 41 Full range 25°C 15 18 24 Full range 25°C ns 15 18 8 Full range 25°C 14 UNIT 16 Full range PE tdi dis Bus Output enable time to low level Output disable time from low level 10 Full range TE tPLZ 25°C 25°C Output enable time to low level tPLZ MAX Full range TE tPZL See Figure 2 Propagation g delay y time,, highg to low-level output tPZH tPZL Terminal TYP‡ Full range tPHL Bus MIN 24 25 9 ns 16 20 † Full range is – 55°C to 125°C. ‡ All typical values are at VCC = 5 V. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SN55ALS160, SN75ALS160 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS018D – JUNE 1986 – REVISED MAY 1995 switching characteristics over recommended range of operating free-air temperature, VCC = 5 V PARAMETER FROM (INPUT) TO (OUTPUT) Terminal Bus Bus TEST CONDITIONS TYP† MAX CL = 30 pF,, See Figure 1 7 20 8 20 Terminal CL = 30 pF,, See Figure 2 7 14 9 14 19 30 Bus CL = 15 pF,, See Figure 3 5 12 16 35 MIN tPLH tPHL Propagation delay time, low- to high-level output tPLH tPHL Propagation delay time, low- to high-level output tPZH tPHZ Output enable time to high level tPZL tPLZ Output enable time to low level 9 20 tPZH tPHZ Output enable time to high level 13 30 Output disable time from high level 12 20 tPZL tPLZ Output enable time to low level 12 20 11 20 11 22 6 12 Propagation delay time, high- to low-level output Propagation delay time, high- to low-level output Output disable time from high level TE Output disable time from low level TE Terminal CL = 15 pF,, See Figure 4 Output disable time from low level ten Output pullup enable time tdis Output pullup disable time † Typical values are at TA = 25°C. PE Bus CL = 15 pF, See Figure 5 UNIT ns ns ns ns ns PARAMETER MEASUREMENT INFORMATION 5V [7 V] PE 3V Output Generator (see Note A) D 200 Ω D Input [500 Ω] 3V 1.5 V 1.5 V 0 B tPLH CL = 30 pF [ = 50 pF ] (see Note B) 50 Ω 480 Ω [500 Ω] B Output tPHL VOH 2.2 V 1V VOH TE 3V TEST CIRCUIT VOLTAGE WAVEFORMS [ ] denotes the SN55ALS160 military test conditions. NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes probe and jig capacitance. Figure 1. Terminal-to-Bus Test Circuit and Voltage Waveforms 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN55ALS160, SN75ALS160 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS018D – JUNE 1986 – REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION 4.3 V [7 V] TE 3V B Input Output Generator (see Note A) B 240 Ω [500 Ω] D 0 tPLH tPHL VOH CL = 30 pF [ = 50 pF ] (see Note B) 50 Ω 1.5 V 1.5 V 3 kΩ [500 Ω] D Output 1.5 V 1.5 V VOL TEST CIRCUIT VOLTAGE WAVEFORMS [ ] denotes the SN55ALS160 military test conditions. NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes probe and jig capacitance. Figure 2. Bus-to-Terminal Test Circuit and Voltage Waveforms 5V [7 V] 3V PE 200 Ω [500 Ω] TE Input Output S2 S1 D B CL = 15 pF [ = 50 pF ] (see Note B) 3V 1.5 V 1.5 V 0 tPZH B Output 480 Ω S1 to 3 V [500 Ω] S2 Open tPHZ 90% 2V 0.8 V tPZL Generator (see Note A) B Output S1 to GND S2 Closed TE 50 Ω TEST CIRCUIT VOH tPLZ 3.5 V 1V 0.5 V VOL VOLTAGE WAVEFORMS [ ] denotes the SN55ALS160 military test conditions. NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes probe and jig capacitance. Figure 3. TE-to-Bus Test Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 SN55ALS160, SN75ALS160 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS018D – JUNE 1986 – REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION 4.3 V [7 V] 3V TE Input Generator (see Note A) TE S2 50 Ω Output D S1 3V CL = 15 pF [ = 50 pF ] (see Note B) B 0 tPHZ tPZH D Output S1 to 3 V S2 Open 240 Ω [500 Ω] 3 kΩ [500 Ω] 1.5 V 1.5 V 90% VOH 1.5 V 0 tPLZ tPZL 4V D Output S1 to GND S2 Closed TEST CIRCUIT 1V 0.7 V VOL VOLTAGE WAVEFORMS [ ] denotes the SN55ALS160 military test conditions. NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes probe and jig capacitance. Figure 4. TE-to-Terminal Test Circuit and Voltage Waveforms Generator (see Note A) 50 Ω PE 3V D PE Input B Output 1.5 V 1.5 V 0 CL = 15 pF [ = 50 pF ] (see Note B) RL = 480 Ω [ = 500 Ω ] ten B Output tdis 90% VOH 2V VOL ≈ 0.8 3V TE TEST CIRCUIT VOLTAGE WAVEFORMS [ ] denotes the SN55ALS160 military test conditions. NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes probe and jig capacitance. Figure 5. PE-to-Bus Test Circuit and Voltage Waveforms 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN55ALS160, SN75ALS160 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS018D – JUNE 1986 – REVISED MAY 1995 TYPICAL CHARACTERISTICS TERMINAL HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT TERMINAL LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 0.6 3.5 VOL – Low-Level Output Voltage – V VCC = 5 V TA = 25°C 3 2.5 2 1.5 1 0.5 VCC = 5 V TA = 25°C 0.5 0.4 0.3 0.2 0.1 0 0 0 – 5 – 10 – 15 – 20 – 25 – 30 – 35 IOH – High-Level Output Current – mA 0 – 40 10 20 30 40 50 IOL – Low-Level Output Current – mA Figure 6 60 Figure 7 TERMINAL OUTPUT VOLTAGE vs BUS INPUT VOLTAGE 4 VCC = 5 V No Load TA = 25°C 3.5 VO – Output Voltage – V VOH – High-Level Output Voltage – V 4 3 2.5 2 VIT + VIT – 1.5 1 0.5 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 VI – Input Voltage – V 1.6 1.8 2 Figure 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 SN55ALS160, SN75ALS160 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS018D – JUNE 1986 – REVISED MAY 1995 TYPICAL CHARACTERISTICS BUS HIGH-LEVEL OUTPUT VOLTAGE vs BUS HIGH-LEVEL OUTPUT CURRENT BUS LOW-LEVEL OUTPUT VOLTAGE vs BUS LOW-LEVEL OUTPUT CURRENT 0.6 4 VOL– Low-Level Output Voltage – V VOH – High-Level Output Voltage – V VCC = 5 V TA = 25°C 3 2 1 VCC = 5 V TA = 25°C 0.5 0.4 0.3 0.2 0.1 0 0 0 – 10 – 20 – 30 – 40 – 50 0 – 60 10 20 30 40 50 60 70 80 90 100 IOL – Low-Level Output Current – mA IOH – High-Level Output Current – mA Figure 9 Figure 10 BUS OUTPUT VOLTAGE vs TERMINAL INPUT VOLTAGE BUS CURRENT vs BUS VOLTAGE 4 2 VCC = 5 V TA = 25°C 1 I I/O(bus) – Bus Current – mA II/O(bus) VO – Output Voltage – V VCC = 5 V No Load TA = 25°C 3 2 1 0 –1 –2 –3 –4 –5 The Unshaded Area Conforms to Paragraph 3.5.3 of IEEE Standard 488 - 1978 –6 0 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 –7 –2 –1 VI – Input Voltage – V 1 2 3 4 VI/O(bus) – Bus Voltage – V Figure 12 Figure 11 12 0 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 6 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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