2SJ278 Silicon P-Channel MOS FET Application High speed power switching Features • • • • • Low on-resistance High speed switching Low drive current 4 V gate drive device can be driven from 5 V source Suitable for switching regulator, DC-DC converter Outline UPAK 3 2 1 4 D 1. Gate 2. Drain 3. Source 4. Drain G S 2SJ278 Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Unit Drain to source voltage VDSS –60 V Gate to source voltage VGSS ±20 V Drain current ID –1 A –4 A –1 A Drain peak current I D(pulse)* Body to drain diode reverse drain current I DR 1 2 Channel dissipation Pch* 1 W Channel temperature Tch 150 °C Storage temperature Tstg –55 to +150 °C Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Value on the alumina ceramic board (12.5×20×0.7 mm) 3. Marking is “MY”. Electrical Characteristics (Ta = 25°C) Item Symbol Min Typ Max Unit Test conditions Drain to source breakdown voltage V(BR)DSS –60 — — V I D = –10 mA, VGS = 0 Gate to source breakdown voltage V(BR)GSS ±20 — — V I G = ±100 µA, VDS = 0 Gate to source leak current I GSS — — ±5 µA VGS = ±16 V, VDS = 0 Zero gate voltage drain current I DSS — — –10 µA VDS = –50 V, VGS = 0 Gate to source cutoff voltage VGS(off) –1.0 — –2.25 V I D = –1 mA, VDS = –10 V Static drain to source on state RDS(on) — 0.7 0.83 Ω I D = –0.5 A, VGS = –10 V*1 — 0.9 1.2 Ω I D = –0.5 A, VGS = –4 V*1 resistance Forward transfer admittance |yfs| 0.6 1.0 — S I D = –0.5 A, VDS = –10 V*1 Input capacitance Ciss — 160 — pF VDS = –10 V, VGS = 0, Output capacitance Coss — 80 — pF f = 1 MHz Reverse transfer capacitance Crss — 28 — pF Turn-on delay time t d(on) — 7 — ns I D = –0.5 A, VGS = –10 V, Rise time tr — 8 — ns RL = 60 Ω Turn-off delay time t d(off) — 30 — ns Fall time tf — 25 — ns Body to drain diode forward voltage VDF — –1.1 — V I F = –1 A, VGS = 0 Body to drain diode reverse recovery time t rr — 90 — ns I F = –1 A, VGS = 0, diF/dt = 50 A/µs 2 2SJ278 Power vs. Temperature Derating Maximum Safe Operation Area Drain Current 1.5 1.0 –1 50 100 150 Ambient Temperature C –0.3 Operation in this area is limited by R DS(on) –0.1 m s O (1 sh pe ot ra tio n ) 200 Ta (°C) –0.01 Ta = 25 °C –0.005 –0.1 –0.3 –1 –3 –10 –30 –100 Drain to Source Voltage V DS (V) Typical Transfer Characteristics –1.0 –10 V –6 V –4 V ID –3 V (A) Pulse Test –1.2 –0.8 –2.5 V –0.4 Drain Current I D (A) Drain Current –1.6 10 D Typical Output Characteristics –2.0 = 1 10 0 µ 0 s µs –0.03 0.5 0 PW s m I D (A) –5 –3 1 Channel Dissipation Pch (W) (on the aluminam ceramic board) 2.0 –0.8 V DS = –10 V Pulse Test –0.6 75 °C –0.4 Tc = –25 °C 25 °C –0.2 VGS = –2 V 0 –2 –4 –6 Drain to Source Voltage –8 –10 V DS (V) 0 –1 –2 –3 Gate to Source Voltage –4 –5 V GS (V) 3 2SJ278 I D = –1 A –0.8 -0.6 –0.5 A -0.4 –0.2 Static Drain to Source on State Resistance R DS(on) ( Ω) 0 4 Pulse Test –0.2 A –2 –4 –6 Gate to Source Voltage –8 –10 V GS (V) Static Drain to Source on State Resistance vs. Temperature 2.0 Pulse Test 1.6 –1 A 1.2 –0.5 A –0.2 A –1 A VGS = –4 V 0.8 –10 V –0.5 A –0.2 A 0.4 0 –40 Static Drain to Source on State Resistance vs. Drain Current 5 Pulse Test 2 1 VGS = –4 V 0.5 –10 V 0.2 0.1 0.05 –0.05 –0.1 –0.2 –0.5 –1 –2 Drain Current I D (A) –5 Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |y fs | (S) Drain to Source Saturation Voltage V DS(on) (V) –1.0 Drain to Source On State Resistance R DS(on) ( Ω ) Drain to Source Saturation Voltage vs. Gate to Source Voltage 5 2 Tc = –25 °C 1 25 °C 0.5 75 °C 0.2 V DS = –10 V Pulse Test 0.1 0.05 0 40 80 120 160 Case Temperature Tc (°C) –0.01 –0.02 –0.05 –0.1 –0.2 Drain Current I D (A) –0.5 –1 2SJ278 Typical Capacitance vs. Drain to Source Voltage Body–Drain Diode Reverse Recovery Time 1000 Capacitance C (pF) di/dt = 50 A/µs VGS = 0, duty < 1 % 200 100 50 20 Ciss 100 Coss Crss 10 VGS = 0 f = 1 MHz 10 1 5 –0.02 –0.05 –0.1 –0.2 –0.5 –1 –2 Reverse Drain Current I DR (A) 0 –40 –60 –4 ID = –1A V DS V DD = –10 V –25 V –40 V –80 –100 0 –8 –12 V GS –16 4 8 12 16 Gate Charge Qg (nc) -40 –50 –20 20 V GS = –10 V, V DD = –30 V PW = 2 µs, duty < 1 % Switching Time t (ns) –20 –30 500 V GS (V) V DD = –10 V –25 V –40 V –20 Switching Characteristics 0 Gate to Source Voltage V DS (V) 0 –10 Drain to Source Voltage V DS (V) Dynamic Input Characteristics Drain to Source Voltage Reverse Recovery Time trr (ns) 500 200 100 50 tf t d(off) 20 10 tr t d(on) 5 –0.01 –0.02 –0.05 –0.1 –0.2 Drain Current –0.5 –1 I D (A) 5 2SJ278 Reverse Drain Current vs. Source to Drain Voltage Reverse Drain Current I DR (A) –1.0 Pulse Test –10 V –0.8 –5 V –0.6 –0.4 V GS = 0, 5 V –0.2 0 –0.4 –0.8 –1.2 Drain to Source Voltage –1.6 V DS (V) Switching Time Test Circuit Waveforms Vout Monitor Vin Monitor –2.0 Vin 10% D.U.T. RL 90% Vin –10 V 50Ω V DD = –30 V Vout td(on) 6 90% 90% 10% 10% tr td(off) tf Unit: mm 1.5 1.5 3.0 0.44 Max Hitachi Code JEDEC EIAJ Weight (reference value) (0.2) (2.5) (1.5) (0.4) 0.53 Max 0.48 Max 1.5 ± 0.1 0.44 Max 2.5 ± 0.1 4.25 Max φ1 0.8 Min 1.8 Max 0.4 4.5 ± 0.1 UPAK — Conforms 0.050 g Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. 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