2SK2978 Silicon N Channel MOS FET High Speed Power Switching ADE-208-659B (Z) 3rd. Edition Jun 1998 Features • Low on-resistance R DS(on) = 0.09Ω typ. (V GS = 4 V, ID = 1.5 A) • Low drive current • High speed switching • 2.5V gate drive devices. Outline UPAK 3 2 1 D 4 G 1. Gate 2. Drain 3. Source 4. Drain S 2SK2978 Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Unit Drain to source voltage VDSS 20 V Gate to source voltage VGSS ±10 V Drain current ID 2.5 A 5 A 2.5 A 1 W Drain peak current I D(pulse) Note1 Body-drain diode reverse drain current I DR Note2 Channel dissipation Pch Channel temperature Tch 150 °C Storage temperature Tstg –55 to +150 °C Note: 1. PW ≤ 10µs, duty cycle ≤ 1 % 2. When using the alumina ceramic board (12.5 x 20 x 0.7 mm) Electrical Characteristics (Ta = 25°C) Item Symbol Min Typ Max Unit Test Conditions Drain to source breakdown voltage V(BR)DSS 20 — — V I D = 10mA, VGS = 0 Gate to source breakdown voltage V(BR)GSS ±10 — — V I G = ±100µA, VDS = 0 Zero gate voltege drain current I DSS — — 10 µA VDS = 20 V, VGS = 0 Gate to source leak current I GSS — — ±10 µA VGS = ±8V, VDS = 0 Gate to source cutoff voltage VGS(off) 0.5 — 1.5 V I D = 1mA, VDS = 10V Static drain to source on state resistance RDS(on) — 0.09 0.12 Ω I D = 1.5A, VGS = 4V Note3 Static drain to source on state resistance RDS(on) — 0.12 0.20 Ω I D = 1.5A, VGS = 2.5V Note3 Forward transfer admittance |yfs| 3.0 5.0 — S I D = 1.5A, VDS = 10V Note3 Input capacitance Ciss — 260 — pF VDS = 10V Output capacitance Coss — 150 — pF VGS = 0 Reverse transfer capacitance Crss — 75 — pF f = 1MHz Turn-on delay time t d(on) — 15 — ns VGS = 4V, I D = 1.5A Rise time tr — 70 — ns RL = 6.67Ω Turn-off delay time t d(off) — 55 — ns Fall time tf — 70 — ns Body–drain diode forward voltage VDF — 0.9 — V I F = 2.5A, VGS = 0 Body–drain diode reverse recovery time — 75 — ns I F = 2.5A, VGS = 0 diF/ dt =50A/µs Note: 2 3. Pulse test 4. Marking is “ZY” t rr 2SK2978 Main Characteristics Power vs. Temperature Derating I D (A) Drain Current m Operation in 0.1 this area is limited by R DS(on) n tio ra 50 100 150 Ambient Temperature 0.01 Ta = 25 °C 0.1 0.3 1 3 10 30 100 Drain to Source Voltage V DS (V) 200 Ta (°C) Typical Transfer Characteristics Typical Output Characteristics 10 V 5 V 5 3V Pulse Test V DS = 10 V Pulse Test 2.5 V (A) 4 5 4 ID 2V 3 Drain Current I D (A) pe O 0.3 0.03 0 Drain Current µs 1 10 1 C 0.5 = 1.0 10 3 D Channel Dissipation Test condition : When using the alumina ceramic board (12.5 x 20 x 0.7 mm) Maximum Safe Operation Area ) ot µs sh 0 s (1 10 m s 1.5 10 PW Pch (W) 2.0 2 1 VGS = 1.5 V 0 2 4 6 Drain to Source Voltage 8 V DS (V) 10 3 2 1 0 75°C 25°C Tc = –25°C 1 2 3 Gate to Source Voltage 4 5 V GS (V) 3 2SK2978 Drain to Source Saturation Voltage vs. Gate to Source Voltage Drain to Source On State Resistance R DS(on) (Ω ) Drain to Source Saturation Voltage V DS(on) (V) 1 Pulse Test 0.8 0.6 ID=5A 0.4 0.2 2.5 A 1A Static Drain to Source on State Resistance vs. Drain Current 1.5 A 1 Pulse Test 0.5 0.2 VGS = 2.5 V 0.1 4V 0.05 0.02 0.01 4 6 2 4 Gate to Source Voltage 8 10 Static Drain to Source on State Resistance vs. Temperature 0.25 Pulse Test 0.2 2.5 A ID=5A 0.15 2.5 V 5A 0.1 VGS = 4 V 1A 1, 2.5 A 0.05 0 –40 0.1 V GS (V) 0 40 80 120 160 Case Temperature Tc (°C) 0.2 0.5 1 Drain Current 2 5 I D (A) 10 Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |y fs | (S) Static Drain to Source on State Resistance R DS(on) (Ω ) 0 10 5 Tc = –25 °C 25 °C 2 1 75 °C 0.5 0.2 0.1 0.1 V DS = 10 V Pulse Test 2 0.2 0.5 1 Drain Current I D (A) 5 10 2SK2978 Body–Drain Diode Reverse Recovery Time Typical Capacitance vs. Drain to Source Voltage 1000 50 20 10 0.1 Coss 100 Crss 30 10 3 di / dt = 50 A / µs V GS = 0, Ta = 25 °C 2 1 5 0.2 0.5 Reverse Drain Current I DR (A) Ciss 300 Capacitance C (pF) Reverse Recovery Time trr (ns) 100 VGS = 0 f = 1 MHz 1 0 10 40 30 16 V GS VDD = 10 V 5V 20 10 0 12 8 VDD = 10 V 5V 4 V DS 4 8 12 16 Gate Charge Qg (nc) 10 15 20 25 0 20 Switching Characteristics V GS = 4 V, V DD = 10 V PW = 5 µs, duty < 1 % 500 Switching Time t (ns) I D = 2.5 A 1000 V GS (V) 20 Gate to Source Voltage Drain to Source Voltage V DS (V) Dynamic Input Characteristics 50 5 Drain to Source Voltage V DS (V) 200 tr 100 tf 50 t d(off) 20 10 0.1 t d(on) 0.2 1 0.5 Drain Current 2 5 I D (A) 10 5 2SK2978 Reverse Drain Current vs. Source to Drain Voltage Reverse Drain Current I DR (A) 5 4V 4 2.5 V 3 V GS = 0 2 1 Pulse Test 0 0.4 0.8 1.2 1.6 Source to Drain Voltage 2.0 V SD (V) Switching Time Test Circuit Waveform Vout Monitor Vin Monitor 90% D.U.T. RL Vin Vin 4V 50Ω V DD = 10 V Vout 10% 10% 90% td(on) 6 tr 10% 90% td(off) tf 2SK2978 Package Dimensions Unit: mm 4.5 ± 0.1 φ 1.0 0.53 max 0.48 max 1 2 1.5 1.5 3.0 3 0.8 min 4 1.5 ± 0.1 0.44 max 2.5 ± 0.1 4.25 max 0.4 1.8 max 0.44 max Hitachi Code EIAJ JEDEC UPAK SC–62 – 7 Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. 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