HA12188AF Pre-Amplifier and Servo IC for Quadruple-Speed CD-ROM ADE-207-183(Z) 1st. Edition October 1995 Description The typical values of built-in capacitances in this IC are reduced 10% compared with those in IC HA12188F. The values of Electrical Characteristics of this IC are same as those of IC HA12188F. Functions • RF amplifier • Focus error amplifier • Tracking error amplifier • FOK detector • Mirror detector • Defect detector • APC amplifier • Focus, tracking, and sled servo control • Inner/outer direction detector Features • Built-in variable resistors for adjusting tracking error EF balance, tracking gain, and focus gain • Single power supply • Supports double and quadruple speeds • Few external components • FP-56 package HA12188AF Block Diagram VCC 42 41 40 39 38 37 36 RS1 RFS RS2 35 34 Bias 33 32 31 30 29 Mirror Defect – + FOK 28 LDS – + + – 43 RF2 44 27 CLK 26 DATA – + RF1 FE + – Input 25 XLT I/F 24 DC Logic 45 + + – APC 23 XRST 22 SENS VR Output 46 47 + – 48 20 DEFECT or DRT TR1 SLM DRIV. BAL TR2 TM5 TM6 + – 49 21 COUT I/F + – VR 19 SSA + – 18 50 VR 51 17 – + 52 + TM2 TE TM3 TM4 + – 53 THS TZC Phase compen. 54 FA – + – + 55 TM7 FZC – + FS4 TPS 56 TM1 FS2 DS1 FLS DS2 Phase compen. FS1 16 TLS TAC DRIV. FSA FPS Focus bias adj. – + ×2.7 ×2.7 2 3 4 5 6 7 8 9 10 11 12 13 14 + 1 FAC DRIV. • The states of the IC’s internal switches at XRST = “L” are shown at block diagram. • The black dot symbol of transfer switch shows on state. • The symbols “ ” mean connecting to VCC. • The symbols “ ” mean connecting to pin 45. Rev.1, Oct. 1995, page 2 of 35 TSA 15 VCC HA12188AF Pin Descriptions and Equivalent Circuits Pin No. Symbol Equivalent Circuit Function 1 FH 3 TH Tracking error hold signal output 2 TSI Tracking servo input 56 FSI Focus servo input 4 FLS 90 k Focus-servo low-frequency filter resistor & capacitor connection (FLS on) 5 FLS 30 k Focus-servo low-frequency filter capacitor connection (FLS off) 6 SGND 7 FPS Resistor connection for programming focus-servo phase compensation (FPS off) 8 FPS Resistor connection for programming focus-servo phase compensation (FPS on) 9 FSA Focus servo output 470 k Focus error hold signal output — Servo ground 20 k 10 FS1 FS1 voltage output 20 k 11 TLS 33 k Tracking servo low-frequency filter capacitor connection (TLS off) Rev.1, Oct. 1995, page 3 of 35 HA12188AF Pin Descriptions and Equivalent Circuits (cont) Pin No. Symbol Equivalent Circuit 12 TLS 13 TPS Resistor connection for programming tracking servo phase compensation (TPS off) 14 TPS Resistor connection for programming tracking servo phase compensation (TPS on) 15 SVCC 16 TSA 100 k — Function Tracking servo low-frequency filter resistor & capacitor connection (TLS on) Servo power supply Tracking servo output 22 k 17 TM2 Sled servo input 18 SSM SSA amplifier inverting input 19 SSA Sled servo output Rev.1, Oct. 1995, page 4 of 35 HA12188AF Pin Descriptions and Equivalent Circuits (cont) Pin No. Symbol 20 DRT Equivalent Circuit Function VCC 10 k 21 COUT Defect signal output or inner/outer direction signal output COUT output 22 SENS SENS output 23 XRST Reset input 24 DC DC input 25 XLT XLT input 26 DATA Data input 27 CLK Clock input 28 LDS Laser switch input 50 k 50 k 29 DFIN 30 DFO Defect envelope signal output 31 DFH Defect hold signal output 43 k Defect comparator input Rev.1, Oct. 1995, page 5 of 35 HA12188AF Pin Descriptions and Equivalent Circuits (cont) Pin No. Symbol 32 FOK Equivalent Circuit Function FOK comparator output VCC 20 k 33 MIRH Mirror hold signal output 100 k 34 RFA RF signal AC input 40 k 18 k 35 BYPS 36 ISET 37 PGND 38 RFO Capacitor connection for ripple filter 20 k Resistor connection for programming reference current — Pre-amplifier ground RF signal output 18 k 40 k 39 RS1 Rev.1, Oct. 1995, page 6 of 35 RS1 switch HA12188AF Pin Descriptions and Equivalent Circuits (cont) Pin No. Symbol Equivalent Circuit 40 RS2 RS2 switch 41 RFM RFS amplifier inverting input 5k 42 PVCC 43 RF1 Function 5k — Pre-amplifier power supply RF1 amplifier input 10 k 44 RF2 RF2 amplifier input 45 VC Voltage reference output 20 k 46 MD APC amplifier input 47 LD APC amplifier output 150 k 1k 48 TR1 TR1 amplifier input 80 k 3.6 p 32 k 20 k 49 TR2 16 k TR2 amplifier input Rev.1, Oct. 1995, page 7 of 35 HA12188AF Pin Descriptions and Equivalent Circuits (cont) Pin No. Symbol Equivalent Circuit Function 50 TEP 51 TEM TE amplifier inverting input 52 TEO TE amplifier output 53 TZC TZC comparator input 22.6 k TE amplifier non-inverting input 75 k 54 FAM 55 FAO Rev.1, Oct. 1995, page 8 of 35 5.5 k FA amplifier inverting input FA amplifier output HA12188AF Operation 1. Microprocessor Control The IC’s internal switches can be operated by sending control data from a microprocessor. The signal timing is shown in figure 1, and the control commands are listed in table 1. DATA 0 T1 1 2 3 4 5 6 7 T2 CLK T3 T4 XLT Item Symbol Min Typ Max Unit Clock frequency fCLK — — 520 kHz Clock pulse width T1, T2 0.96 — — µs Delay time T3 1 — — µs Latch pulse width T4 2 — — µs Figure 1 Timing Diagram for Microprocessor Control Signals from the microprocessor are input at pins 23 to 27. A low input at the XRST pin resets the IC. Normally this pin should be kept high. (See figure 2.) 27 CLK 26 DATA Input 25 XLT I/F 24 DC Logic 23 XRST 22 SENS Output I/F 21 COUT 20 DEFECT or DRT Figure 2 Microprocessor Interface Rev.1, Oct. 1995, page 9 of 35 HA12188AF Table 1 Microprocessor Control Commands DATA D2 D7D6D5D4 D3 Focus mode 0 0 0 0 FS4 Tracking mode and FS1 DRT setting DRT *3 0 0 0 1 0: Defect 1: Direction Access control mode 0 0 1 0 *1 SENS *2 DEFECT OFF TM7 *4 0 0 1 1 D3 0 0 1 1 D2 Current value 32µA 0 16µA 1 24µA 0 8µA 1 Mirror *7 Speed setting mode EF balance adjustment Tracking gain and focus gain adjustment 0 1 0 0 D3 0 0 1 D2 0 1 1 Mode Normal Double Quadruple 0 1 0 1 0 1 1 0 D0 FS2 FS1 FZC FS1 current *5 THS H TZC See table 2 TM3, TM4 current *6 Pulse setting mode D1 BAL2 TM5, TM6 current *6 D1 0 0 1 1 D0 Current value 32µA 0 16µA 1 24µA 0 8µA 1 H Focus tracking RF FLS FPS RS1 RS2 H BAL0 H TLS TPS BAL1 0 ; Focus gain GF2 GF0 H 1 ; Tracking gain GT2 GT0 H Notes: 1. The switch name surrounded by circle means that the switch turns on when the corresponding bit is “1”. The switch name with bar surrounded by circle means that the switch turns on when the corresponding bit is “0”. 2. “DEFECT OFF” means that switches DS1 and DS2 don’t turn on when the corresponding bit is “1”. Though the “DEFECT OFF” bit is set, the output at pin 20 is defect signal (in defect signal output mode). 3. DRT (pin 20) outputs defect signal when the corresponding bit is “0”, and outputs direction signal when the corresponding bit is “1”. 4. TM7 can turn on only when COUT is high. 5. The value of two current sources over switch FS1 are 18 µA(source) 36 µA(sink) when the corresponding bit is “1”, and are 9 µA(source) 18 µA(sink) when the corresponding bit is “0”. 6. The current values through switches TM3, TM4, TM5 and TM6 can be selected in four steps. 7. The speed of Mirror circuit can be selected in three steps. Don’t use D3 = “1”, D2 = “0” mode. Rev.1, Oct. 1995, page 10 of 35 HA12188AF Table 2 Access Control Mode DATA ST1 D3 D2 D1 D0 $20 0 0 0 0 $21 0 0 0 1 $22 0 0 1 0 $23 0 0 1 1 $24 0 1 0 0 $25 0 1 0 1 $26 0 1 1 0 $27 0 1 1 1 $28 1 0 0 0 $29 1 0 0 1 $2A 1 0 1 0 $2B 1 0 1 1 $2C 1 1 0 0 $2D 1 1 0 1 $2E 1 1 1 0 $2F 1 1 1 1 ST2 ST3 TM6 TM5 TM4 TM3 TM2 TM1 TM6 TM5 TM4 TM3 TM2 TM1 TM6 TM5 TM4 TM3 TM2 TM1 A circle means that the switch is ON. Note: After the microprocessor sends serial data, TM1 to TM6 can be switched among the states listed under ST1 to ST3 by input at the DC pin. First, if the microprocessor sends serial data when DC is high, TM1 to TM6 are placed in the state listed under ST1. When DC is brought low, the states change to the states listed under ST2. Then if DC is brought high again, the states change to the states listed under ST3. Rev.1, Oct. 1995, page 11 of 35 HA12188AF Table 2-A Access Control Mode Appendix 1) Tracking servo DATA Tracking servo movement D3 D2 at DC = H (ST1) 0 0 Servo loop off 0 1 Servo loop on 1 0 Servo loop off jump to outside track 1 1 Servo loop off jump to inside track 2) Sled servo DATA Sled servo movement D1 D0 at DC = H (ST1) 0 0 Servo loop off 0 1 Servo loop on 1 0 Servo loop off move to outside track 1 1 Servo loop off move to inside track Rev.1, Oct. 1995, page 12 of 35 HA12188AF 2. RF and Focus Error Pre-Amplifiers The main beam output signals from the photodiode IC are led in through resistors at pins 43 and 44. The outputs of amplifiers RF1 and RF2 are summed by amplifier RFS to generate the EFM RF signal. (*1) External resintances of pins 43 and 44 and amplifier RFS should be set according to the pick-up so that the RF signal at pin 38 is about 1.5 VOP (the difference between the peak level of 11T signal component and the voltage at no signal). Switches RS1 and RS2 operate together under microprocessor control. For example they are on for normal or double speed, and off for quadruple speed. ON resistance of RS1 is 1.1kΩ typ and on resistance of RS2 is 530Ω typ. Figure 3-A shows the frequency characteristic at pin 38 in the condition of figure 3.(Input resistances of pins 43 and 44 are 10kΩ.) External resistances and capacitances should be fitted according to the pick-up. Stray capacitances of board print patterns have influence on this frequency characteristic. Therefore external resistances and capacitances should be set considering stray capacitances. Amplifier FE subtracts the output of amplifier RF2 from the output of amplifier RF1 to generate the focus error signal. The gain is 0dB. The focus error signal is output as the output of amplifier FA at pin 55, with a gain set by variable resistor VR and the external resistance values. With the external resistors in figure 3, the gain of amplifier FA is 8.7dB (initial value after reset). Variable resistor VR is controlled by 3-bit data. The gain can be varied from –5dB to +7dB with respect to the reset value. The focus error signal is binarized by comparator FZC, with a Vth equal to VC + 0.38V. A reference voltage of 1/2 VCC is output at pin 45. The IC’s internal reference voltage is connected internally. The feedback resistance of amplifier FA should be set according to the pick-up so that the focus S-curve at pin 55 is about 3V peak-to-peak. Note: 1 The sink current of amplifier RFS is about 1mA. When load capacitance of pin 38 is big because of wiring with CD DSP LSI etc, please use buffer amplifier. (for example emitter follower transistor) Rev.1, Oct. 1995, page 13 of 35 HA12188AF 8.2 k 1.8 k 1.5 k 22 p 2p 24 p VCC 42 41 40 39 38 RFS RS1 RS2 – + 8.1 p 5k 160 k + – 43 RF2 44 100 µ + 45 54 15 k + – RF1 160 k 5k 10 k 8.1 p – + 160 k FE 160 k VR 10 k VC FA + – – + 5.5 k – + 55 FZC Unit R : Ω C:F Figure 3 RF and Focus Error Pre-Amplifiers RS1,2 ON Gain (dB) 10 180 OFF 144 108 Gain 72 0 36 0 –10 –36 Phase –72 –108 –20 –144 –30 10k –180 100k 1M Frequency (Hz) 2M 4M 10M Figure 3-A Frequency characteristic example of RF preamplifiers Rev.1, Oct. 1995, page 14 of 35 Phase (deg) 20 HA12188AF 5.2 k 12.5 k 27.6 k 9.7 k GF2 GF1 GF0 Unit R : Ω Figure 4 Focus VR Table 3 Focus VR and Gain D2 D1 D0 VR Gain 0 1 0 9.7k –4.8dB 0 1 1 7.2k –2.2dB 0 0 0 5.5k ±0dB 0 0 1 4.6k +1.6dB 1 1 0 3.4k +3.8dB 1 1 1 3k +4.9dB 1 0 0 2.7k +6.0dB 1 0 1 2.4k +6.8dB Rev.1, Oct. 1995, page 15 of 35 HA12188AF 3. Tracking Pre-Amplifiers The sub-beam outputs from the photodiode IC are led in through resistors at pins 48 and 49. External resistances of pins 48 and 49 and amplifier TE should be set according to the pick-up so that the traverse signal at pin 52 is about 2 VPP. After a reset, the initial value of the feedback resistance BAL from amplifier TR1 to pin 48 is 400kΩ, the same as the feedback resistance from amplifier TR2 to pin 49. BAL has a variable resistance value that is controlled by 4-bit data. The variable range is from –32% to +28% of the reset value. This resistance can be varied to adjust the EF balance of the tracking error. Amplifier TE generates the tracking error signal. Its input signals are received from the preceding stage through variable resistors VR. With the external resistor values in figure 5, after a reset, the initial value of the gain is 8.8dB. The variable VR resistance is controlled by 3-bit data. The gain can be varied from –5dB to +7dB with respect to the reset value. The tracking error signal is coupled through a capacitor to input pin 53 and binarized by comparator TZC, with a Vth equal to VC. (*1) Note: 1 At normal speed the output of amplifier TE contains much EFM signal components. Therefore the output of amplifier TE had better be led in through LPF for reduction of EFM signal components at pin 53. + – 48 BAL TR2 49 62 k TR1 + – 3.6 p VR 400 k 3.6 p 50 VR 51 – + 62 k TE 52 0.022 µ 53 75 k + – TZC Unit R : Ω C:F Figure 5 Tracking Pre-Amplifiers Rev.1, Oct. 1995, page 16 of 35 HA12188AF 80 k 32 k 20 k 40 k 80 k 160 k 16 k BAL3 BAL2 BAL1 BAL0 Unit R : Ω Figure 6 BAL 21.7 k 51.7 k 114 k 40 k GT2 GT1 GT0 Unit R : Ω Figure 7 Tracking VR Table 4 Tracking VR Values and Gain D2 D1 D0 VR Gain 0 1 0 40k –4.9dB 0 1 1 29.6k –2.3dB 0 0 0 22.6k ±0dB 0 0 1 18.8k +1.6dB 1 1 0 14.1k +3.9dB 1 1 1 12.5k +4.9dB 1 0 0 11.1k +6.1dB 1 0 1 10.1k +6.9dB Rev.1, Oct. 1995, page 17 of 35 HA12188AF Table 5 BAL Values D3 D2 D1 D0 BAL Ratio 1 0 0 0 272k –32% 1 0 0 1 288k –28% 1 0 1 0 304k –24% 1 0 1 1 320k –20% 1 1 0 0 336k –16% 1 1 0 1 352k –12% 1 1 1 0 368k –8% 1 1 1 1 384k –4% 0 0 0 0 400k ±0% 0 0 0 1 416k +4% 0 0 1 0 432k +8% 0 0 1 1 448k +12% 0 1 0 0 464k +16% 0 1 0 1 480k +20% 0 1 1 0 496k +24% 0 1 1 1 512k +28% 4. FOK Detector This detector is a comparator that generates the FOK signal. FOK is one of the signals that determines when to activate the focus servo. When the voltage at pin 38 exceeds the voltage at pin 34 by approximately 0.4V, pin 32 goes high. 0.015 µ 0.015 µ 0.033 µ 34 33 32 Mirror 31 30 29 Defect FOK – + Unit C : F Figure 8 Mirror, FOK, and Defect Detectors Rev.1, Oct. 1995, page 18 of 35 HA12188AF 5. Defect Detector When a scratched disc is played, the EFM RF signal has the shape shown in figure 9 (a). The defect detector detects the drop-out area of this signal. Scratches with dimensions of about 100µm or greater are detected. (a) Pin 38 ;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;; (b) Pin 20 Figure 9 Defect Detector Waveforms 6. Mirror Detector As the pick-up travels across tracks, the EFM RF signal varies as in figure 10 (a). At pin 34, the signal varies as in figure 10 (b). The mirror detector detects the mirror areas. The external capacitor on pin 33 integrates the track-crossing frequency component. The internal time constant of the mirror detector can be set for normal, double, or quadruple speed by microprocessor commands, to raise the trackable range of track-crossing frequencies. (a) Pin 38 ;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;; ;;;;;; ;;;;;; ;;;;;; ;;;;;; ;;;;;; ;;;;;; ;;;;;; ;;;;;; ;;;;;; ;;;;;; ;;;;;; ;;;;;; (b) Pin 34 ;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;; (c) Mirror signal (internal signal) Figure 10 Mirror Detector Waveforms Rev.1, Oct. 1995, page 19 of 35 HA12188AF 7. Bias The 12-kΩ external resistor on pin 36 sets the reference value of the IC’s internal bias current. Use only this resistance value. The IC will not operate correctly with other resistance values. Pin 35 is for a bypass capacitor to eliminate noise from the IC’s internal bias circuits. 0.1 µ 12 k 36 35 Bias Unit R : Ω C:F Figure 11 Bias 8. APC This circuit is for the Psub laser diode. The APC circuit is switched off when pin 28 is high. APC 46 1k 47 28 LDS + – Unit R : Ω Figure 12 APC 9. Focus Servo System The focus error signal is led in through a gain-control resistor to pin 56. Focus bias is adjusted at pin 56. When a defect is detected, switch DS2 propagates the focus error signal, which is integrated by an internal resistor and external capacitor. Switch DS2 also inverts the phase of the propagated signal. Switch FS4 is the focus servo loop switch. Switch FLS switches low frequency filter, thereby switching the AC gain of the servo. Switch FPS switches the peak phase-compensation frequency. This switch is linked with switch FLS and tracking servo switches TLS and TPS. For example this switch is off at normal, double speed and is on at quadruple speed. The DC gain from input at pin 56 to output at pin 9 is 19dB. Figure 14 shows the frequency characteristic when pin 4, 5 are open. Rev.1, Oct. 1995, page 20 of 35 HA12188AF Switch FS1 switches a current source to generate the focus search voltage. When switch FS2 is switched on, focus is acquired by switching switch FS1 on and off. The current through switch FS1 can be switched in two stages: 36µA sink/18µA source, and 18µA sink/9µA source. 18µ/ 36µ/ 18µ 9µ FS4 56 22 k 20 k FS2 90 k 150 k FLS Focus bias adj. FPS 20 k ×2.7 30 k 1 4 0.1 µ 6 5 7k FSA Phase compen. DS2 470 k 7 FS1 8 – + 9 91 k 10 10 µ + 0.047 µ 0.047 µ 330 k 330 k FAC DRIV. Unit R : Ω C:F Figure 13 Focus Servo 50 180 30 0 20 Phase 10 0 10 Note: 108 Gain 100 1k 2k 4k Frequency (Hz) Phase (deg) Gain (dB) 40 –108 10k –180 100k Peak frequency of phase compensation is inversely proportional to external resistance value (330kΩ at this figure) of pin 7, 8.(dot line : $40 mode, solid line : $42 mode) Figure 14 Focus Servo Frequency Characteristic (pin 4, 5 are open) Rev.1, Oct. 1995, page 21 of 35 HA12188AF The transform function of phase compen block at figure 13 is as follows. VOUT 1+jω 8.95 ≈ –9 ) ( 7.9×10 I 1+jω (2.7×10–6) 1+jω 5.6×10–10 I –9 –10 7.9×10 5.6×10 ø ≈ tan-1ω –tan-1ω I I VIN ( ) at FPS OFF I7 or I8 ≈ ( ) ( ) –tan-1ω (2.7×10–6) I = I7 at FPS ON I = 2.7 I8 VCC – 0.71V External resistance value of pin 7 or 8 10. Tracking Servo System The tracking error signal is led in through a gain-control resistor to pin 2. When a defect is detected, switch DS1 propagates the tracking error signal, which is integrated by an internal resistor and external capacitor. Switch DS1 also inverts the phase of the propagated signal. Switch TM1 is the tracking servo loop switch. Switch TLS switches low frequency filter, thereby switching the AC gain of the servo. The purpose of switch THS is to raise the high-frequency gain. Switch TPS switches the peak phase-compensation frequency. This switch is linked with switch TLS and focus servo switches FLS and FPS. For example this switch is off at normal, double speed and is on at quadruple speed. Switch TM7 is turned on by taking the logical AND of COUT and microprocessor data, to improve the performance of the pick-up. COUT is a signal generated by latching Mirror with both edges of TZC. TM3 TM4 THS 18 p Phase compen. TM7 TSA 100 k – + 18 p TPS 22 k TM1 100 k DS1 100 k 16 TLS 167 k 470 k 2 3 TAC DRIV. 33 k 11 0.1 µ 0.1 µ ×2.7 12 13 14 100 k 0.1 µ 330 k 330 k Figure 15 Tracking Servo Rev.1, Oct. 1995, page 22 of 35 15 VCC Unit R : Ω C:F 50 180 40 108 Gain 30 0 20 Phase 10 0 10 Note: 100 1k 2k 4k Frequency (Hz) Phase (deg) Gain (dB) HA12188AF –108 10k –180 100k Peak frequency of phase compensation is inversely proportional to external resistance value (330kΩ at this figure) of pin 13, 14. (dot line : $40 mode, solid line : $42 mode) Figure 16 Tracking Servo Frequency Characteristic (pin 11, 12 are open) The transform function of phase compen block at figure 15 is as follows. VOUT 1+jω ≈ 4.47 –9 ) ( 7.9×10 I –10 ( 5.6×10 ) I –9 –10 7.9×10 ø ≈ tan-1ω ( ) –tan-1ω ( 5.6×10 ) I I VIN 1+jω at TPS OFF I13 or I14 ≈ I = I13 at TPS ON I = 2.7 I14 VCC – 0.71V External resistance value of pin 13 or 14 Rev.1, Oct. 1995, page 23 of 35 HA12188AF Figure 17 shows the phase relationships of Mirror, the tracking error, TZC, and COUT. TM7 operates to prevent the moving direction component of the tracking error signal from reaching the actuator. The purpose of switches TM3 and TM4 is to generate the track jump voltage. A positive voltage appears at pin 16 when TM3 is switched on. A negative voltage appears at pin 16 when TM4 is switched on. The current values through switches TM3 and TM4 can be selected in four steps: 8µA, 16µA, 24µA, and 32µA. The DC gain from input at pin 2 to output at pin 16 is 13dB. Figure 16 shows the frequency characteristic when pin 11, 12 are open. Mirror Tracking error TZC COUT (a) Moving inward (b) Moving outward Figure 17 Phase Relationships of Mirror and Other Signals 11. DRT DRT is an output signal that indicates the inward or outward direction. In the example in figure 18, DRT is low during motion from outer toward inner tracks, and high for motion in the reverse direction. This signal is output from pin 20 on command from the microprocessor. RF ; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ; ; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ;; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ;;;;;;; ;;;;;;; ;;;;;; ;;;;;;;;;; ;;;;;; ;;;;;; ;;;;;;; ; ;;;;;;; ;;;;;;; ;;;;;; ;;;;;;;;;; ;;;;;; ;;;;;; ;;;;;;; (moving outward) DRT H Figure 18 DRT Rev.1, Oct. 1995, page 24 of 35 (moving inward) L HA12188AF 12. Sled Servo The signal output at pin 16 is passed through a low-pass filter and input at pin 17. TM2 is the loop switch of the sled servo. TM5 and TM6 are current switches that generate voltages for large movements of the sled. A positive voltage appears at pin 19 when TM5 is switched on. A negative voltage appears at pin 19 when TM6 is switched on. The current values through switches TM5 and TM6 can be selected in four steps: 8µA, 16µA, 24µA, and 32µA. SLM DRIV. TM5 TM6 19 SSA 56 k + – 18 6.8 k 22 µ TM2 on resistsnce 230 Ω typ + 17 TM2 0.22 µ 12 k 82 k Unit R : Ω C:F Figure 19 Sled Servo 13. Direct Control The switches in the tracking control and sled servo control blocks can be switched on and off by microprocessor commands. TM1 to TM6 can also be controlled directly by the DC pin after input of serial data from the microprocessor. When the microprocessor sends a command from $20 to $2F as serial data with DC high, TM1 to TM6 are placed in the states indicated under ST1 in table 2. Next, when DC is driven low, the states change to ST2. When DC is brought high again, the states change to ST3. Example of using the DC terminal for 1 track jump is as follows. For inside track jump, after sending the $2C at DC = “H”, when the TZC’s rising edge is detected set DC = “L” and set DC = “H” after a setting time. For outside track jump, after sending the $28 at DC = “H”, when the TZC’s falling edge is detected, set DC = “L” and set DC = “H” after a setting time. Rev.1, Oct. 1995, page 25 of 35 HA12188AF Test Circuit Diagram VCC S34A 0.1 µ 10 k VIN 34 S34 0.015 µ 4.7 k S38 12 k VCC 0.033 µ 0.1 µ 42 41 40 39 0.015 µ S32 10 k 38 37 36 RS1 RFS 35 34 Bias RS2 33 32 31 30 29 Mirror –+ Defect FOK 28 – + S43 10 k + – 43 10 k S44 10 µ RF2 44 27 26 – + RF1 FE + – 560 APC S48 VR 48 TR2 S49 21 390 k S21 10 k S20 4 k7 19 SSA TM5 TM6 VR 51 k + – VR 62 k 51 – + 62 k S53 52 54 15 k + – FA Phase compen. THS TZC – + S17 TM7 – FZC + 55 S56 5k6 TM3 TM4 53 39 k 17 TM2 TE FS4 S55 TSA + – S52 6 k2 18 50 39 k 10 k S19 + – BAL + – 49 10 k 20 TR1 390 k S22 22 Output I/F + – 47 2SB 561 c VCC 23 46 2k 24 Logic 45 VCC 25 Input I/F + – TPS TM1 56 FS2 DS1 FLS DS2 FS1 Phase compen. 16 4 k7 FSA FPS – + ×2.7 1 2 3 4 5 6 7 S16 TLS ×2.7 8 9 10 11 12 13 15 14 VCC 33 k S2 200 k 33 k 200 k VCC VCC S9 4 k7 S60 S61 0.1 µ VIN 60 Rev.1, Oct. 1995, page 26 of 35 V61 Unit R : Ω C:F HA12188AF Absolute Maximum Ratings Item Symbol Value Unit Power supply voltage VCC 7 V Power dissipation PT 550 mW Operating temperature Topr –20 to +75 °C Storage temperature Tstg –55 to +125 °C Note: Recommended operating power supply voltage range: 5 ±0.5V. Rev.1, Oct. 1995, page 27 of 35 HA12188AF Electrical Characteristics (Ta = 25°C, VCC = 5V) Item Symbol Min Typ Max Unit Test Conditions Pins 1.Current dissipation ICC — 36 52 mA No signal 15, 42 2.Reference voltage VC 2.3 2.5 2.7 V I45 = ±5mA 45 RF amp. 3.Offset voltage VRF –65 0 65 mV 4.Max. output level H VRFH 4.2 — — V S38,S43,S44,S61 V61 = 4.0V 38 5.Max. output level L VRFL — — 2.1 V S38,S43,S44,S61 V61 = 1.0V 38 6.Voltage gain GVRF 10.0 12.0 14.0 dB S43, S44, S60 V38/VIN 60 38 7.Offset voltage VFA –65 0 65 mV 8.Max. output level H VFAH 4.0 4.5 — V S44, S55, S61 V61 = 4.0V 55 9.Max. output level L VFAL — 0.5 1.0 V S43, S55, S61 V61 = 4.0V 55 10.Voltage gain 1 GVFAI 6.7 8.7 10.7 dB S43, S60 V55/VIN 60 55 11.Voltage gain 2 GVFA2 6.7 8.7 10.7 dB S44, S60 V55/VIN 60 55 12.Offset voltage VTE –50 0 50 mV 13.Max. output level H VTEH 4.0 4.5 — V S49, S52, S61 V61 = 4.0V 52 14.Max. output level L VTEL — 0.5 1.0 V S48, S52, S61 V61 = 4.0V 52 15.Voltage gain 1 GVTE1 7.0 9.0 11.0 dB S49, S60 V52/VIN 60 52 16.Voltage gain 2 GVTE2 7.0 9.0 11.0 dB S48, S60 V52/VIN 60 52 17.FOK Vth VFOK 0.25 0.38 0.50 V S34, S61 when V32 ≥ 4V Min (V38 – V34) 32 18.“H” output voltage VFKH 4.7 — — V S34, S61 32 19.“L” output voltage VFKL — — 0.4 V S32, S34, S61 32 20.Max operation frequency FDH 2 — — kHz S43, S44, S60 20 21.Min operation frequency FDL — — 1 kHz S43, S44, S60 20 22.“H” output voltage VDFH 4.7 — — V 23.“L” output voltage VDFL — — 0.4 V Focus error amp. Tracking error amp. FOK Defect Note: All offset voltages are values referring to VC (pin 45)at XRST = “L”. Rev.1, Oct. 1995, page 28 of 35 38 55 52 20 S20 20 HA12188AF Electrical Characteristics (Ta = 25°C, VCC = 5V) (cont) Item Defect COUT Symbol Min Typ Max Unit Test Conditions Pins 24.Operation min input level VDF1 0.75 — — VPP S43, S44, S60 20 25.operation max input level VDF2 — — 2.5 VPP S43, S44, S60 20 1 26.Max operation frequency FCO 100 — — kHz 27.“H” output voltage VCOH 4.7 — — V 28.“L” output voltage VCOL — — 0.4 V 29.“H” input level VMH 4.0 — — V 23 to 27 30.“L” input level VML — — 1.0 V 23 to 27 31.APC voltage VAPC 0.09 0.16 0.23 V 46 32.TZC Vth VTZC –40 0 40 mV S53, S61 Refer to V53 53 33.FZC Vth VFZC 0.25 0.38 0.50 V S43, S61 55 34.Offset voltage VFO –100 0 100 mV 35.Max output level H VFOH 4.0 4.5 — V S9, S56, S61 FS4 on, V61 = 1.0V 9 36.Max output level L VFOL — 0.8 1.0 V S9, S56, S61 FS4 on, V61 = 4.0V 9 37.Voltage gain GVFO 16.9 18.9 20.9 dB S56, S60 V9/VIN 60 FS4, FLS, FPS on 9 38.Search voltage 1 VS1 –0.70 –0.51 –0.32 V FS2 on V9 – VFO – VC 9 39.Search voltage 2 VS2 0.32 0.51 0.70 V FS2, FS1 on V9 – VFO – VC 9 40.Offset voltage VTO –120 0 120 mV 41.Max output level H VTOH 4.0 4.5 — V S2, S16, S61 TM1 on, V61 = 1.0V 16 42.Max output level L VTOL — 0.8 1.0 V S2, S16, S61 TM1 on, V61 = 4.0V 16 CLK, DATA, XLT, DC, XRST APC Focus servo amp. Tracking servo amp. S34A, S53, S60 * Mirror Qudruple mode 21 21 S21 21 9 16 Note: 90deg phase differnce between VIN 34 and VIN 60. Rev.1, Oct. 1995, page 29 of 35 HA12188AF Electrical Characteristics (Ta = 25°C, VCC = 5V) (cont) Item Tracking servo amp. Sled servo amp. SENS LDS Focus VR Tracking VR Symbol Min Typ Max Unit Test Conditions Pins 43.Voltage gain GVTO 11.4 13.4 15.4 dB S2, S60 TLS, TPS, TM1 on V16/VIN 60 16 44.TM3 voltage VTM3 0.51 0.71 0.89 V TM3 on V16 – VTO – VC 16 45.TM4 voltage VTM4 –0.89 –0.71 –0.51 V TM4 on V16 – VTO – VC 16 46.Offset voltage VSO –66 0 66 mV 47.Max output level H VSOH 4.0 4.5 — V S17, S19, S61 TM2 on V61 = 4.0V 19 48.Max output level L VSOL — 0.8 1.0 V S17, S19, S61 TM2 on, V61 = 1.0V 19 49.Voltage gain GVS 17.3 19.3 21.3 dB S17, S60 TM2 on, V19/VIN 60 19 50.TM5 voltage VTM5 0.55 0.85 1.10 V 16µA mode TM5 on V19 – VSO – VC 19 51.TM6 voltage VTM6 –1.10 –0.85 –0.55 V 16µA mode TM6 on V19 – VSO – VC 19 52.“H” output voltage VSEH 4.7 — — V 53.“L” output voltage VSEL — — 0.4 V 54.“H” input voltage VLDH 3.5 — — V 28 55.“L” input voltage VLDL — — 0.5 V 28 56.VR gain 1 GFVR1 –5.8 –4.8 –3.8 dB S43, S60 V55 / VIN60 – GVFA1 55 57.VR gain 2 GFVR2 –3.2 –2.2 –1.2 dB S43, S60 V55 / VIN60 – GVFA1 55 58.VR gain 3 GFVR3 2.8 3.8 4.8 dB S43, S60 V55 / VIN60 – GVFA1 55 59.VR gain 4 GFVR4 5.8 6.8 7.8 dB S43, S60 V55 / VIN60 – GVFA1 55 60.VR gain 1 GTVR1 –5.9 –4.9 –3.9 dB S48, S60 V52 / VIN60 – GVTE2 52 61.VR gain 2 GTVR2 –3.3 –2.3 –1.3 dB S48, S60 V52 / VIN60 – GVTE2 52 62.VR gain 3 GTVR3 2.9 3.9 4.9 dB S48, S60 V52 / VIN60 – GVTE2 52 63.VR gain 4 GTVR4 5.9 6.9 7.9 dB S48, S60 V52 / VIN60 – GVTE2 52 Rev.1, Oct. 1995, page 30 of 35 19 22 S22 22 HA12188AF Electrical Characteristics (Ta = 25°C, VCC = 5V) (cont) Item BAL Mirror Symbol Min Typ Max Unit Test Conditions Pins 64.BAL gain 1 GBA1 –4.2 –3.2 –2.2 dB S48, S60 V52/VIN60 – GVTE2 52 65.BAL gain 2 GBA2 –3.7 –2.7 –1.7 dB S48, S60 V52/VIN60 – GVTE2 52 66.BAL gain 3 GBA3 –3.2 –2.2 –1.2 dB S48, S60 V52/VIN60 – GVTE2 52 67.BAL gain 4 GBA4 –2.4 –1.4 –0.4 dB S48, S60 V52/VIN60 – GVTE2 52 68.BAL gain 5 GBA5 1.1 2.1 3.1 dB S48, S60 V52/VIN60 – GVTE2 52 69.Operation min input level VMI1 0.25 — — VPP S34A, S53, S60 Quadraple mode 21 70.Operation max input level VMI2 — — 2.5 VPP S34A, S53, S60 Quadraple mode 21 Test Method Notes Item No. Notes 1 I15 (I15 means “current at pin 15”. Following expressions are same as this expression.)+ I42 2 V45 (V45 means “voltage at pin 45”. Following expressions are same as this expression. These symbols mean DC voltage at DC measuring and AC voltage at AC measuring.) 3 V38 – VC 4, 5 V38 6 20log (V38 / VIN60) VIN60 = 500kHz, 0.2 VPP 7 V55 – VC 8, 9 V55 10, 11 20log (V55 / VIN60) VIN60 = 4kHz, 0.5 VPP 12 V52 – VC 13, 14 V52 15, 16 20log (V52 / VIN60) VIN60 = 4kHz, 0.5 VPP 17 (V38 – V34) at the point that V32 exceeds 4V when V61 is lowered from 2.5V. 18, 19 V32 20 The maximum frequency for VIN60 such that the pin 20 signal is still a square wave. VIN60 = 0.25 VPP + VC + 95mVDC 21 The minimum frequency for VIN60 such that the pin 20 signal is still a square wave. VIN60 = 0.25 VPP + VC + 95mVDC 22, 23 V20 Rev.1, Oct. 1995, page 31 of 35 HA12188AF Test Method Notes (cont) Item No. Notes 24 The minimum voltage for V38 such that the pin 20 signal is still a square wave. VIN60 = 1kHz + VC + 95mVDC 25 The maximum voltage for V38 such that the pin 20 signal is still a square wave. VIN60 = 1kHz + VC + 95 mVDC 26 VIN60, VIN34 90deg phase difference input signal VIN60 = VIN34 = 1 VPP The maximum frequency for VIN60 (VIN34) such that the pin 21 signal is still a square wave. 27, 28 V21 29 H input voltage of pin 23 to 27 30 L input voltage of pin 23 to 27 31 V46 32 (V61 – V53) such that V22 exceeds 4V when V61 is upped from 2.4V. (SENS = TZC mode) 33 (V55 – VC) such that V22 exceeds 4V when V61 is upped from 2.5V. (SENS = FZC mode) 34 V9 – VC 35, 36 V9 37 20log (V9 / VIN60) VIN60 = 1kHz, 0.15 VPP 38, 39 V9 – VFO – VC 40 V16 – VC 41, 42 V16 43 20log (V16 / VIN60) VIN60 = 1kHz, 0.3 VPP 44, 45 V9 – VTO – VC 46 V19 – VC 47, 48 V19 49 20log (V19 / VIN60) VIN60 = 4kHz, 0.15 VPP 50, 51 V19 – VSO – VC 52, 53 V22 54 Input voltage of pin 28 such that APC is off. 55 Input voltage of pin 28 such that APC is on. 56 GF2 = 0, GF1 = 1, GF0 = 0 20log (V55 / VIN60) – GVFA1 VIN60 = 4kHz, 0.5 VPP 57 GF2 = 0, GF1 = 1, GF0 = 1 20log (V55 / VIN60) – GVFA1 VIN60 = 4kHz, 0.5 VPP 58 GF2 = 1, GF1 = 1, GF0 = 0 20log (V55 / VIN60) – GVFA1 VIN60 = 4kHz, 0.5 VPP 59 GF2 = 1, GF1 = 0, GF0 = 1 20log (V55 / VIN60) – GVFA1 VIN60 = 4kHz, 0.5 VPP 60 GT2 = 0, GT1 = 1, GT0 = 0 20log (V52 / VIN60) – GVTE2 VIN60 = 4kHz, 0.5 VPP 61 GT2 = 0, GT1 = 1, GT0 = 1 20log (V52 / VIN60) – GVTE2 VIN60 = 4kHz, 0.5 VPP 62 GT2 = 1, GT1 = 1, GT0 = 0 20log (V52 / VIN60) – GVTE2 VIN60 = 4kHz, 0.5 VPP 63 GT2 = 1, GT1 = 0, GT0 = 1 20log (V52 / VIN60) – GVTE2 VIN60 = 4kHz, 0.5 VPP Rev.1, Oct. 1995, page 32 of 35 HA12188AF Test Method Notes (cont) Item No. Notes 64 BAL3 = 1, BAL2 = 0, BAL1 = 0, BAL0 = 0 20log (V52 / VIN60) – GVTE2 VIN60 = 4kHz, 0.5VPP 65 BAL3 = 1, BAL2 = 0, BAL1 = 0, BAL0 = 1 20log (V52 / VIN60) – GVTE2 VIN60 = 4kHz, 0.5VPP 66 BAL3 = 1, BAL2 = 0, BAL1 = 1, BAL0 = 0 20log (V52 / VIN60) – GVTE2 VIN60 = 4kHz, 0.5VPP 67 BAL3 = 1, BAL2 = 1, BAL1 = 0, BAL0 = 0 20log (V52 / VIN60) – GVTE2 VIN60 = 4kHz, 0.5VPP 68 BAL3 = 0, BAL2 = 1, BAL1 = 1, BAL0 = 1 20log (V52 / VIN60) – GVTE2 VIN60 = 4kHz, 0.5VPP 69 The minimum input voltage for VIN34 such that the pin 21 signal is still a square wave. VIN60 = 1MHz, 1 VPP VIN34 = 100kHz 70 The maximum input voltage for VIN34 such that the pin 21 signal is still a square wave. VIN60 = 1MHz, 1 VPP VIN34 = 100kHz Rev.1, Oct. 1995, page 33 of 35 HA12188AF Package Dimensions Unit: mm 12.8 ± 0.3 10.0 42 29 28 56 15 0.65 12.8 ± 0.3 43 1 0.35 0.10 Rev.1, Oct. 1995, page 34 of 35 0.1 +0.1 –0.09 0.775 2.20 0.13 M 0.17 ± 0.05 0.15 ± 0.04 0.32 ± 0.08 0.30 ± 0.06 2.54 Max 14 0.775 1.40 0 – 8˚ 0.60 ± 0.15 Hitachi Code JEDEC Code EIAJ Code Weight FP-56 — ED-7404A Mod. 0.51 g HA12188AF Disclaimer 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Sales Offices Hitachi, Ltd. Semiconductor & Integrated Circuits. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109 URL NorthAmerica : http://semiconductor.hitachi.com/ Europe : http://www.hitachi-eu.com/hel/ecg Asia : http://sicapac.hitachi-asia.com Japan : http://www.hitachi.co.jp/Sicd/indx.htm For further information write to: Hitachi Semiconductor (America) Inc. 179 East Tasman Drive, San Jose,CA 95134 Tel: <1> (408) 433-1990 Fax: <1>(408) 433-0223 Hitachi Europe GmbH Electronic Components Group Dornacher Straße 3 D-85622 Feldkirchen, Munich Germany Tel: <49> (89) 9 9180-0 Fax: <49> (89) 9 29 30 00 Hitachi Europe Ltd. Electronic Components Group. Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 585160 Hitachi Asia Ltd. Hitachi Tower 16 Collyer Quay #20-00, Singapore 049318 Tel : <65>-538-6533/538-8577 Fax : <65>-538-6933/538-3877 URL : http://www.hitachi.com.sg Hitachi Asia Ltd. (Taipei Branch Office) 4/F, No. 167, Tun Hwa North Road, Hung-Kuo Building, Taipei (105), Taiwan Tel : <886>-(2)-2718-3666 Fax : <886>-(2)-2718-8180 Telex : 23222 HAS-TP URL : http://www.hitachi.com.tw Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road Tsim Sha Tsui, Kowloon, Hong Kong Tel : <852>-(2)-735-9218 Fax : <852>-(2)-730-0281 URL : http://www.hitachi.com.hk Copyright Hitachi, Ltd., 2000. All rights reserved. Printed in Japan. Colophon 2.0 Rev.1, Oct. 1995, page 35 of 35