ETC P07D03LV

P07D03LV
Dual N-Channel Enhancement Mode
Field Effect Transistor
NIKO-SEM
SOP-8
PRODUCT SUMMARY
V(BR)DSS
RDS(ON)
ID
30
20mΩ
7A
G : GATE
D : DRAIN
S : SOURCE
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
LIMITS
UNITS
Drain-Source Voltage
VDS
±30
V
Gate-Source Voltage
VGS
±20
V
TC = 25 °C
Continuous Drain Current
Pulsed Drain Current
7
ID
TC = 70 °C
1
6
IDM
TC = 25 °C
Power Dissipation
40
2
PD
TC = 70 °C
A
W
1.3
Junction & Storage Temperature Range
Tj, Tstg
-55 to 150
1
TL
275
Lead Temperature ( /16” from case for 10 sec.)
°C
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
Junction-to-Ambient
TYPICAL
MAXIMUM
UNITS
62.5
°C / W
RθJA
1
Pulse width limited by maximum junction temperature.
Duty cycle ≤ 1%
2
ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)
PARAMETER
SYMBOL
TEST CONDITIONS
LIMITS
UNIT
MIN TYP MAX
STATIC
Drain-Source Breakdown Voltage
V(BR)DSS
VGS = 0V, ID = 250µA
30
VGS(th)
VDS = VGS, ID = 250µA
0.7
Gate-Body Leakage
IGSS
VDS = 0V, VGS = ±20V
Zero Gate Voltage Drain Current
IDSS
On-State Drain Current1
ID(ON)
Gate Threshold Voltage
1
1.4
±100 nA
VDS = 24V, VGS = 0V
1
VDS = 20V, VGS = 0V, TJ = 55 °C
10
VDS = 5V, VGS = 10V
1
V
25
µA
A
OCT-14-2002
Dual N-Channel Enhancement Mode
Field Effect Transistor
NIKO-SEM
Drain-Source On-State
Resistance1
Forward Transconductance
RDS(ON)
1
gfs
P07D03LV
SOP-8
VGS = 2.5V, ID = 5A
40
48
VGS = 4.5V, ID = 6A
23
30
VGS = 10V, ID = 7A
18
25
VDS = 15V, ID = 5A
16
mΩ
S
DYNAMIC
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
80
Total Gate Charge2
Qg
9
Gate-Source Charge
2
Gate-Drain Charge2
Turn-On Delay Time
2
Rise Time2
Turn-Off Delay Time
2
Fall Time2
830
VGS = 0V, VDS = 15V, f = 1MHz
Qgs
VDS = 0.5V(BR)DSS, VGS = 5V,
2.8
Qgd
ID = 7A
3.1
td(on)
pF
185
13
nC
5.7
tr
VDS = 15V
10
td(off)
ID ≅ 1A, VGS = 10V, RGEN = 6Ω
18
tf
nS
5
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C)
Continuous Current
IS
3
Pulsed Current3
ISM
6
Forward Voltage1
VSD
IF = 1A, VGS = 0V
Reverse Recovery Time
trr
IF = 5A, dlF/dt = 100A / µS
Reverse Recovery Charge
Qrr
1
A
V
15.5
nS
7.9
nC
1
Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2%.
Independent of operating temperature.
3
Pulse width limited by maximum junction temperature.
2
REMARK: THE PRODUCT MARKED WITH “P07D03LV”, DATE CODE or LOT #
2
OCT-14-2002
NIKO-SEM
Dual N-Channel Enhancement Mode
Field Effect Transistor
P07D03LV
SOP-8
TYPICAL PERFORMANCE CHARACTERISTICS
3
OCT-14-2002
NIKO-SEM
Dual N-Channel Enhancement Mode
Field Effect Transistor
4
P07D03LV
SOP-8
OCT-14-2002
Dual N-Channel Enhancement Mode
Field Effect Transistor
NIKO-SEM
P07D03LV
SOP-8
SOIC-8 (D) MECHANICAL DATA
Dimension
mm
Min.
Typ.
Max.
A
4.8
4.9
5.0
B
3.8
3.9
C
5.8
D
0.38
E
Dimension
mm
Min.
Typ.
Max.
H
0.5
0.715
0.83
4.0
I
0.18
0.254
0.25
6.0
6.2
J
0.445
0.51
K
1.27
0.22
0°
4°
8°
L
F
1.35
1.55
1.75
M
G
0.1
0.175
0.25
N
5
OCT-14-2002