TI CSD75211W1723

CSD75211W1723
SLPS250A – MAY 2010 – REVISED AUGUST 2011
www.ti.com
Dual P-Channel NexFET™ Power MOSFET
Check for Samples: CSD75211W1723
PRODUCT SUMMARY
FEATURES
1
•
•
•
•
•
•
•
Dual P-Ch MOSFETs
Common Source Configuration
Small Footprint 1.7 mm × 2.3 mm
Ultra Low Qg and Qgd
Pb Free
RoHS Compliant
Halogen Free
VDS
Drain to Source Voltage
-20
V
Qg
Gate Charge Total (-4.5V)
4.5
nC
Qgd
Gate Charge Gate to Drain
RDS(on)
VGS(th)
nC
50
mΩ
VGS = -2.5V
39
mΩ
VGS = -4.5V
32
mΩ
Threshold Voltage
-0.7
V
Text Added for Spacing
ORDERING INFORMATION
APPLICATIONS
•
•
•
Drain to Source On Resistance
0.9
VGS = -1.8V
Battery Management
Battery Protection
DC-DC Converters
Device
Package
Media
Qty
Ship
CSD75211W1723
1.7-mm × 2.3-mm
Wafer Level
Package
7-Inch
Reel
3000
Tape and
Reel
Text Added for Spacing
ABSOLUTE MAXIMUM RATINGS
DESCRIPTION
The device has been designed to deliver the lowest
on resistance and gate charge in the smallest outline
possible with thermal characteristics in an ultra low
profile. Low on resistance and gate charge coupled
with the small footprint and low profile make the
device ideal for battery operated space constrained
application in load management as well as DC-DC
converter applications
Top View
G1
D1
D1
D1
S
S
S
S
G2
D2
D2
D2
TA = 25°C unless otherwise stated
VALUE
UNIT
VDS
Drain to Source Voltage
-20
V
VGS
Gate to Source Voltage
±8
V
-4.5
A
-6
A
1.5
W
–55 to 150
°C
Continuous Drain Current (1) (2)(3)
ID
Pulsed Drain Current (1) (2)(3)
Continupus Gate Clamp Current (4)
IG
Pulsed Gate Clamp Current (4)
PD
Power Dissipation (1)
TJ,
TSTG
Operating Junction and Storage
Temperature Range
(1)
(2)
(3)
(4)
May be limited by Max source current
Based on Min Cu footprint
Per MOSFET
Total for device
P0114-01
RD1D2(on) vs VGS
80
ID = -2A
70
60
T C = 125°C
50
40
30
T C = 25°C
20
10
0
0
1
2
3
4
5
6
-VGS - Gate-to-Source Voltage - V
7
8
G006
RD1D2(on) - Drain-Drain On-State Resistance - mΩ
RDS(on) - Drain-Source On-State Resistance - mΩ
RDS(on) vs VGS
140
ID = −2A
120
100
T C = 125°C
80
60
40
T C = 25°C
20
0
0
1
2
3
4
5
6
-VGS - Gate-to-Source Voltage - V
7
8
G013
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010–2011, Texas Instruments Incorporated
CSD75211W1723
SLPS250A – MAY 2010 – REVISED AUGUST 2011
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Static Characteristics
BVDSS
Drain to Source Voltage
VGS = 0V, ID = -250μA
IDSS
Drain to Source Leakage Current
VGS = 0V, VDS = -16V
IGSS
Gate to Source Leakage Current
VDS = 0V, VGS = ±8V
VGS(th)
Gate to Source Threshold Voltage
VDS = VGS, ID = -250μA
RDS(on)
Drain to Source On Resistance
RDD(on)
Drain to Drain On Resistance
gfs
Transconductance
-20
-0.4
V
-1
μA
±100
nA
-0.7
-1.1
VGS = -1.8V, IDS = -2A
50
70
mΩ
V
VGS = -2.5V, IDS = -2A
39
50
mΩ
VGS = -4.5V, IDS = -2A
32
40
mΩ
VGS = -1.8V, IDS = -2A
80
110
mΩ
VGS = -2.5V, IDS = -2A
61
75
mΩ
VGS = -4.5V, IDS = -2A
46
55
mΩ
VDS = -10V, ID = -2A
6.4
S
Dynamic Characteristics
CISS
Input Capacitance
COSS
Output Capacitance
460
600
pF
220
290
CRSS
Reverse Transfer Capacitance
pF
73
95
pF
RG
Qg
Seried Gate Resistance
1.6
3.2
Ω
Gate Charge Total (-4.5V)
4.5
5.9
nC
Qgd
Gate Charge Gate to Drain
Qgs
Gate Charge Gate to Source
Qg(th)
Gate Charge at Vth
QOSS
Output Charge
td(on)
Turn On Delay Time
tr
Rise Time
td(off)
Turn Off Delay Time
tf
Fall Time
VGS = 0V,
VDS = -10V,
f = 1MHz
VDS = -10V, ID = -2A
VDS = -17V, VGS = 0V
VDS = -10V, VGS = -4.5V,
ID = -2A, RG = 2Ω
0.9
nC
0.9
nC
0.4
nC
4.9
nC
3.7
ns
4.1
ns
9.1
ns
1.6
ns
Diode Characteristics
VSD
Diode Forward Voltage
Qrr
Reverse Recovery Charge
trr
Reverse Recovery Time
ID = -2A, VGS = 0V
0.7
VDD= -17V, IF = -2A,
di/dt = 300A/μs
11
1
nC
V
19
ns
THERMAL CHARACTERISTICS
(TA = 25°C unless otherwise stated)
PARAMETER
R θJA
R θJA
(1)
(2)
(3)
2
MIN
Thermal Resistance Junction to Ambient (Minimum Cu area)
2
Thermal Resistance Junction to Ambient (1 in Cu area)
(1) (2)
(2) (3)
TYP
MAX
UNIT
160
°C/W
69
°C/W
Device mounted on FR4 material with minimum Cu mounting area.
Measured with both devices biased in a parallel condition.
Device mounted on FR4 material with 1 in2 of 2oz. Cu.
Copyright © 2010–2011, Texas Instruments Incorporated
CSD75211W1723
SLPS250A – MAY 2010 – REVISED AUGUST 2011
www.ti.com
CSD75211W1723 TTA MIN Rev 0
CSD86311W1723
CSD75211W1723 TTA MIN Rev 0
CSD86311W1723
Max RθJA = 69°C/W
when mounted on
1inch2 (6.45 cm2) of
2-oz. (0.071-mm thick)
Cu.
Max RθJA = 160°C/W
when mounted on a
minimum pad area of
2-oz. (0.071-mm thick)
Cu.
G1 S G2 D2 D1
G1 S G2 D2 D1
M0183-01
M0182-01
TYPICAL MOSFET CHARACTERISTICS
(TA = 25°C unless otherwise stated)
ZqJA - Normalized Thermal Impedance
10
1
0.5
0.3
0.1
0.01
0.1
0.05
Duty Cycle = t1/t2
0.02
0.01
P
t1
Single Pulse
t2
0.001
0.0001
0.0001
Typical RqJA = 128°C/W (min Cu)
TJ = P ´ ZqJA ´ RqJA
0.001
0.01
0.1
1
tp - Pulse Duration - s
10
100
1k
G012
Figure 1. Transient Thermal Impedance
Copyright © 2010–2011, Texas Instruments Incorporated
3
CSD75211W1723
SLPS250A – MAY 2010 – REVISED AUGUST 2011
www.ti.com
TYPICAL MOSFET CHARACTERISTICS (continued)
20
20
18
18
-IDS - Drain-to-Source Current - A
-IDS - Drain-to-Source Current - A
(TA = 25°C unless otherwise stated)
16
14
VGS = -4.5V
12
10
VGS = -1.8V
VGS = -3.5V
8
VGS = -3V
6
4
VGS = -2.5V
T C = 25°C
14
12
10
8
6
T C = 125°C
4
2
2
0
0.3
0.6
0.9
1.2
-VDS - Drain-to-Source Voltage - V
0
1.5
0.2
G001
Figure 2. Saturation Characteristics
0.4 0.6 0.8
1
1.2 1.4 1.6
-VGS - Gate-to-Source Voltage - V
G002
1k
3.5
3
2.5
2
1.5
Ciss = Cgd + Cgs
C - Capacitance - nF
C - Capacitance - nF
4
Coss = Cds + Cgd
100
Crss = Cgd
1
f = 1MHz
VGS = 0V
0.5
10
0
0.5
1
1.5
2
2.5
3
Qg - Gate Charge - nC
3.5
4
4.5
0
5
10
15
-VDS - Drain-to-Source Voltage - V
G003
0.9
ID = -250µA
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-75
-25
25
75
T C - Case Temperature - °C
20
G004
Figure 5. Capacitance
125
175
Figure 6. Threshold Voltage vs. Temperature
G005
RDS(on) - Drain-Source On-State Resistance - mΩ
Figure 4. Gate Charge
-VGS(th) - Threshold Voltage - V
2
ID = -2A
VDS = -10V
4.5
0
4
1.8
Figure 3. Transfer Characteristics
5
-VGS - Gate-to-Source Voltage - V
T C = -55°C
16
0
0
VDS = -5V
80
ID = -2A
70
60
T C = 125°C
50
40
30
T C = 25°C
20
10
0
0
1
2
3
4
5
6
-VGS - Gate-to-Source Voltage - V
7
8
G006
Figure 7. RDS(on) vs. Gate-to-Source Voltage
Copyright © 2010–2011, Texas Instruments Incorporated
CSD75211W1723
SLPS250A – MAY 2010 – REVISED AUGUST 2011
www.ti.com
TYPICAL MOSFET CHARACTERISTICS (continued)
1.6
140
ID = −2A
Normalized On-State Resistance
RD1D2(on) - Drain-Drain On-State Resistance - mΩ
(TA = 25°C unless otherwise stated)
120
100
T C = 125°C
80
60
40
T C = 25°C
20
1
2
3
4
5
6
-VGS - Gate-to-Source Voltage - V
7
8
1
0.8
0.6
0.4
0.2
-25
25
75
T C - Case Temperature - °C
125
175
G007
G013
Figure 8. RD1D2(on) vs. Gate-to-Source Voltage
Figure 9. Normalized On-State Resistance vs. Temperature
10
-IDS - Drain-to-Source Current - A
10
-ISD - Source-to-Drain Current - A
1.2
0
-75
0
0
ID = -2A
VGS = -8V
1.4
1
T C = 125°C
0.1
T C = 25°C
0.01
0.001
0.0001
0
0.2
0.4
0.6
0.8
-VSD - Source-to-Drain Voltage - V
1
1ms
1
10ms
0.1
Area May be
Limited by RDS(on)
Single Pulse
Typical R θJA = 128°C/W (min Cu)
0.01
0.01
1s
DC
0.1
1
10
-VDS - Drain-to-Source Voltage - V
G008
Figure 10. Typical Diode Forward Voltage
11110
100ms
100
G009
Figure 11. Maximum Safe Operating Area
5
4.5
-ID - Drain Current - A
4
3.5
3
2.5
2
1.5
1
0.5
0
-50
-25
0
25
50
75
100 125
T J - Junction Temperature - °C
150
175
G011
Figure 12. Maximum Drain Current vs. Temperature
Copyright © 2010–2011, Texas Instruments Incorporated
5
CSD75211W1723
SLPS250A – MAY 2010 – REVISED AUGUST 2011
www.ti.com
MECHANICAL DATA
CSD75211W1723 Package Dimensions
Pin A1 Mark
1
3
2
4
+0.00
–0.08
A
1.74
B
C
2.32
+0.00
–0.08
0.62 Max
Top View
Side View
0.04
0.62 Max
0.35 ±0.10
Seating Plate
Front View
1.50
0.50
Solder Ball
Ø 0.31 ±0.015
0.50
0.50
C
1.00
0.50
Pinout
B
A
Pin A1 Mark
(Hidden)
1
2
3
Position
Designation
A2, A3, A4
Drain 1
C2, C3, C4
Drain 2
A1
Gate 1
C1
Gate 2
B1, B2, B3, B4
Source
4
Bottom View
M0184-01
NOTE: All dimensions are in mm (unless otherwise specified)
6
Copyright © 2010–2011, Texas Instruments Incorporated
CSD75211W1723
SLPS250A – MAY 2010 – REVISED AUGUST 2011
www.ti.com
Land Pattern Recommendation
1.50
0.50
0.50
0.50
Ø 0.25
1.00
0.50
A
B
C
1
2
3
4
M0185-01
NOTE: All dimensions are in mm (unless otherwise specified)
Text Added for Spacing
Text Added for Spacing
Tape and Reel Information
4.00 ±0.10
2.00 ±0.05
45° Max
4.00 ±0.10
1.90 ±0.05
3.50 ±0.05
8.00
+0.30
–0.10
1.75 ±0.10
Ø 1.50 ±0.10
Pin A1 Mark
0.30
0.80 ±0.05
0.254 ±0.02
45° Max
2.45 ±0.05
M0186-01
NOTE: All dimensions are in mm (unless otherwise specified)
Spacer
REVISION HISTORY
Changes from Original (May 2010) to Revision A
•
Page
Changed VGS in the Abs Max Ratings table From: +8 To: ±8 .............................................................................................. 1
Copyright © 2010–2011, Texas Instruments Incorporated
7
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