TPD2EUSB30 www.ti.com SLVSA12 – NOVEMBER 2009 2-CHANNEL ESD SOLUTION FOR SUPER-SPEED (6 GBPS) USB 3.0 INTERFACE Check for Samples: TPD2EUSB30 FEATURES APPLICATIONS • • • • • • 1 • • • • • • • 0.05-pF Matching Capacitance Between the Differential Signal Pair Single-Pair Differential Lines to Protect the Differential Data and Clock Lines of the USB3.0, eSATA, or LVD Interface Flow-Through Pin Mapping for the High-Speed Lines Ensures Zero Additional Skew Due to Board Layout While Placing ESD-Protection Chip Near the Connector Supports Data Rates in Excess of 6 Gbps ESD Protection Meets or Exceeds IEC61000-4-2 (Level 4) 5-A Peak Pulse Current (8/20 μs Pulse) for D+, D– Lines Industrial Temperature Range: –40°C to 85°C Space-Saving DRT Package Notebooks Set-Top Boxes DVD Players Media Players Portable Computers DRT PACKAGE (TOP VIEW) D+ 1 3 D– GND 2 DESCRIPTION/ORDERING INFORMATION The TPD2EUSB30 provides 2 ESD clamp circuits with flow-through pin mapping for ease of board layout. This device has been designed to protect sensitive components which are connected to ultra high-speed data and transmission lines. The TPD2EUSB30 offers protection from stress caused by ESD (electrostatic discharge). This device also offers 5 A (8/20 μs) peak pulse current ratings per IEC 61000-4-5 (lightning) specification. The monolithic silicon technology allows matching between the differential signal pairs. The less than differential 0.05-pF capacitance ensures that the differential signal distortion due to added ESD clamp remains minimal. The 0.7-pF line capacitance is suitable for high-speed data rate (in excess of 6 Gbps). The TPD2EUSB30 conforms to IEC61000-4-2 (Level 4) ESD protection. The TPD2EUSB30 is offered in space saving DRT (1 mm × 1 mm) package. The TPD2EUSB30 is characterized for operation over ambient air temperature range of –40°C to 85°C. ORDERING INFORMATION TA –40°C to 85°C (1) (2) PACKAGE SOT (3-DRT) (1) (2) Tape and reel ORDERABLE PART NUMBER TPD2EUSB30DRTR TOP-SIDE MARKING 5PX Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009, Texas Instruments Incorporated TPD2EUSB30 SLVSA12 – NOVEMBER 2009 www.ti.com CIRCUIT DIAGRAMS DRT Circuit D– D+ GND TERMINAL FUNCTIONS TERMINAL NAME DRT PIN NO. TYPE D+, D- 1, 2 ESD port GND 3 GND DESCRIPTION High-speed ESD clamp, provides ESD protection to the high-speed differential data lines Ground ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) IO voltage tolerance D+, D– pins TA Operating free-air temperature range Tstg Storage temperature range ESD protection (1) MIN MAX 0 6 –40 85 –65 UNIT °C 125 °C IEC 61000-4-2 Contact Discharge D+, D– pins ±8 kV IEC 61000-4-2 Air-Gap Discharge D+, D– pins ±8 kV Peak pulse current (tp = 8/20 μs) D+, D– pins 5 A Peak pulse power (tp = 8/20 μs) D+, D– pins 45 W Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum-rated conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN VRWM Reverse stand-off voltage D+,D– pins to ground Vclamp Clamp voltage D+,D– pins to ground, IIO Current from IO port to supply pins VIO = 2.5 V, ID = 8 mA VD Diode forward voltage D+,D– pins, lower clamp diode, VIO = 2.5 V, ID = 8 mA Rdyn Dynamic resistance D+,D– pins, I=1A CIO IO capacitance D+,D– pins VIO = 2.5 V VBR Break-down voltage IIO = 1 mA 2 TYP Submit Documentation Feedback 7 UNIT 5.5 V 8 V 0.01 0.1 μA 0.8 0.95 V IIO = 1 A 0.6 MAX 1 Ω 0.7 pF V Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPD2EUSB30 TPD2EUSB30 www.ti.com SLVSA12 – NOVEMBER 2009 TYPICAL OPERATING CHARACTERISTICS 1.20E-12 10 TA = 25°C 5 1.10E-12 9.00E-13 Leakage Current (pA) Capacitnace (Farads) 0 1.00E-12 DBZ Package 8.00E-13 DRT Package 7.00E-13 –5 –10 –15 D– –20 D+ –25 –30 6.00E-13 5.00E-13 0.0 VIO = 2.5 V –35 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 –40 Figure 1. IO Capacitance vs IO Voltage 11 55 10 5.0 50 4.5 45 4.0 40 3.5 35 3.0 30 25 Current (A) 2.0 20 1.5 15 1.0 10 Power (W) 9 8 5 0 10 15 20 25 30 Time (ms) 35 40 45 6 5 3 2 1 0 0.0 7 4 5 0.5 50 0 0 Figure 3. Peak Pulse Waveforms 100 20 90 10 80 0 70 -10 60 -20 50 40 30 -70 0 -80 -10 -90 -20 75 100 Time (ns) 125 150 20 Voltage (V) 25 30 35 40 -50 -60 50 15 -40 10 25 10 -30 20 0 5 Figure 4. D+,D– Transmission Line Pulser Plot (100 ns Pulse, 10 ns Rise Time) Amplitude (V) Amplitude (V) Current (A) IPP (A) 60 PPP (W) Measured at one IO, the other IO open 2.5 85 Figure 2. Leakage Current vs Temperature 6.0 5.5 55 25 Temperature (°C) –40 Voltage (V) 175 Figure 5. IEC Clamping Waveforms (8 kV Contact) 200 -100 0 25 50 75 100 Time (ns) 125 150 175 200 Figure 6. IEC Clamping Waveforms (–8 kV Contact) Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPD2EUSB30 3 TPD2EUSB30 SLVSA12 – NOVEMBER 2009 www.ti.com APPLICATION INFORMATION Layout Guide with TPD2EUSB30DRTR Refer to Figure 7, the TPD2EUSB30DRTR is offered in space saving DRT package. The DRT package is a 1mm* 1mm package with flow-through pin-mapping for the high-speed differential lines. It is recommended to place the DRT package right next to the USB 3.0 connector. The GND pin should connected to GND plane of the board through a large VIA. If a dedicated GND plane is not present right underneath, it is recommended to route to the GND plane through a wide trace. The current associated with IEC ESD stress can be in the range of 30Amps or higher momentarily. A good, low impedance GND path ensures the system robustness against IEC ESD stress. The TPD2EUSB30 can provide system level ESD protection to the high-speed differential ports (>6 Gbps data rate). The flow-through package offers flexibility for board routing with traces up to 15 mills wide. It allows the differential signal pairs couple together right after they touch the ESD ports (pin 1 and pin 2) of the TPD2EUSB30. TX+ VBUS TPD2EUSB30 TXD- 1-mm D- GND USB 3.0 Host/ Controller/ PHY GND 8-mm D+ D+ RX+ GND 1-mm RX- Figure 7. Layout Guide with the TPD2EUSB30 at the USB3.0 Class A connector TPD2EUSB30 Eye Pattern Test Setup See Figure 9 for a demonstration of the TPD2EUSB30 performance the lab set-up. Figure 8 shows a lab board that was designed to demonstrate the degradation of the eye pattern quality with and without the TPD2EUSB30 in the USB 3.0 signal path. Figure 10 shows that there is only ~2 ps jitter penalty to the differential signal when the TPD2EUSB30 device was added in the signal path Eye Pattern Measurement Point Pattern Generator 36” Lossy Transmission Line USB3.0 Receiver PHY Figure 8. Measurement Setup to collect the Eye Pattern on a Reference Board with TPD2EUSB30 4 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPD2EUSB30 TPD2EUSB30 www.ti.com SLVSA12 – NOVEMBER 2009 Eye Pattern Measurement Point Pattern Generator 36” Lossy Transmission Line TPD2EUSB30 USB3.0 Receiver PHY Figure 9. Measurement Setup to collect the Eye Pattern on a Reference Board with TPD2EUSB30 Figure 10. Lab Setup for the Eye-Pattern Measurement with TPD2EUSB30 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPD2EUSB30 5 TPD2EUSB30 SLVSA12 – NOVEMBER 2009 www.ti.com Figure 11. Output eye diagram without TPD2EUSB30 (Figure 8 Setup, 5 Gbps Data Rate) 6 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPD2EUSB30 TPD2EUSB30 www.ti.com SLVSA12 – NOVEMBER 2009 Figure 12. Output eye diagram with the TPD2EUSB30 (Figure 9 Setup, 5 Gbps Data Rate) Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPD2EUSB30 7 PACKAGE OPTION ADDENDUM www.ti.com 17-Dec-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing TPD2EUSB30DRTR ACTIVE SOT DRT Pins Package Eco Plan (2) Qty 3 3000 Green (RoHS & no Sb/Br) Lead/Ball Finish CU NIPDAU MSL Peak Temp (3) Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 20-Jul-2010 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPD2EUSB30DRTR Package Package Pins Type Drawing SOT DRT 3 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 3000 180.0 8.4 Pack Materials-Page 1 1.16 B0 (mm) K0 (mm) P1 (mm) 1.16 0.63 4.0 W Pin1 (mm) Quadrant 8.0 Q3 PACKAGE MATERIALS INFORMATION www.ti.com 20-Jul-2010 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPD2EUSB30DRTR SOT DRT 3 3000 202.0 201.0 28.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications. TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DLP® Products www.dlp.com Communications and Telecom www.ti.com/communications DSP dsp.ti.com Computers and Peripherals www.ti.com/computers Clocks and Timers www.ti.com/clocks Consumer Electronics www.ti.com/consumer-apps Interface interface.ti.com Energy www.ti.com/energy Logic logic.ti.com Industrial www.ti.com/industrial Power Mgmt power.ti.com Medical www.ti.com/medical Microcontrollers microcontroller.ti.com Security www.ti.com/security RFID www.ti-rfid.com Space, Avionics & Defense www.ti.com/space-avionics-defense RF/IF and ZigBee® Solutions www.ti.com/lprf Video and Imaging www.ti.com/video Wireless www.ti.com/wireless-apps Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2010, Texas Instruments Incorporated