TPD8S009 www.ti.com ....................................................................................................................................................................................................... SLVS816 – JULY 2008 8-CHANNEL DISPLAY/HDMI PORT ESD PROTECTION FEATURES 1 • • • • • • • • • • • Supports High-Definition Multimedia Interface (HDMI) 1.3 or Display Port Data Rate Low 0.8-pF Line Capacitance for Each Data Line 0.05-pF Matching Capacitance Between Differential Signal Pair Four-Pair Differential Lines to Protect Differential Data and Clock Lines of HDMI and Display Port Interface Match With 0.5-mm Pitch Display Port Connector for Seamless Routing and Minimal Line Glitch Due to ESD Clamps Flow-Through Single-in-Line Pin Mapping for High-Speed Lines Ensures No Additional Board Layout Burden While Placing ESD Protection Chip Near DP/HDMI Connector Supports Data Rates in Excess of 2.7 Gbps IEC 61000-4-2 (Level 4) System Level ESD Compliance Ioff Feature Commercial Temperature Range: –40°C to 85°C 15-Pin 0.5-mm Pitch DSM Package: Length = 6.5 mm, Width = 2.5 mm, and Height = 0.8 mm DSM PACKAGE (TOP VIEW) D0+ 1 GND 2 D0– 3 D1+ 4 GND 5 D1– 6 D2+ 7 GND 8 D2– 9 D3+ 10 GND 11 D3– 12 15 VCC 14 N.C. 13 VCC N.C. – Not internally connected DESCRIPTION/ORDERING INFORMATION The TPD8S009 provides an electrostatic discharge (ESD) solution for the display port and high-definition multimedia interface (HDMI) high-speed lines. This device offers eight ESD clamp circuits with flow-through pin mapping that matches the display port or HDMI port connector pin assignments. This device supports HDMI 1.3 or display port data rate (in excess of 3 Gbps). The Dx+/Dx– ports add only 0.8-pF capacitance to the high-speed differential lines. In addition, the monolithic integrated circuit technology ensures that there is excellent matching between the two signal pairs of the differential line. This is a direct advantage over discrete ESD clamp solutions, where variations between two different ESD clamps may significantly degrade the differential signal quality. The TPD8S009 complies with IEC61000-4-2 (Level 4) ESD protection. This device is offered in a space-saving SON package with 0.5-mm pitch matching the display port or HDMI connector pitch. The unique pin mapping allows the system designer to select the ESD solution at the last phase of the design without any changes in the board layout or degradation of signal-integrity performance. The TPD8S009 is characterized for operation over the ambient air temperature range of –40°C to 85°C. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008, Texas Instruments Incorporated TPD8S009 SLVS816 – JULY 2008 ....................................................................................................................................................................................................... www.ti.com ORDERING INFORMATION TA PACKAGE –40°C to 85°C (1) (2) SON – DSM (1) (2) ORDERABLE PART NUMBER Tape and reel TPD8S009DSMR TOP-SIDE MARKING PK009 Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. BLOCK DIAGRAM VCC GND D3+ D3– D2– D2+ D1– D1+ D0– D0+ GND TERMINAL FUNCTIONS TERMINAL 2 TYPE NAME NO. D0+, D0–, D1+, D1–, D2+, D2–, D3+, D3– 1, 3, 4, 6, 7, 9, 10, 12 ESD port GND 2, 5, 8, 11 GND N.C. 14 No connect VCC 13, 15 Supply DESCRIPTION High-speed ESD clamp provides ESD protection to the high-speed display port/HDMI differential data lines. Ground No internal signal connection I/O supply Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPD8S009 TPD8S009 www.ti.com ....................................................................................................................................................................................................... SLVS816 – JULY 2008 ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) MIN MAX –0.3 6 V 0 VCC V Storage temperature range –65 125 °C Characterized free-air operating temperature range –40 85 °C 260 °C IEC 61000-4-2 Contact Discharge ±8 kV IEC 61000-4-2 Air-Gap Discharge ±9 kV Peak pulse power (tp = 8/20 µs) 25 W Peak pulse current (tp = 8/20 µs) 2.5 A VCC Supply voltage range VIO IO signal voltage range Tstg TA Lead temperature, 1.6 mm (1/16 in) from case for 10 s UNIT ELECTRICAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP VRWM Reverse standoff voltage Any IO pin to ground VBR Breakdown voltage IIO = 1 mA Any IO pin to ground IIO IO port current VIO = 3.3 V, VCC = 5 V Any IO pin Ioff Current from IO port to supply pins VIO = 3.3 V, VCC = 5 V Any IO pin VD Diode forward voltage IIO = 8 mA Lower clamp diode RDYN Dynamic resistance I=1A Any IO pin 1.1 CIO IO capacitance VCC = 5 V, VIO = 2.5 V Any IO pin 0.8 ICC Operating supply current VIO = Open, VCC = 5 V VCC pin 0.1 MAX UNIT 5.5 V 0.1 µA 0.01 0.1 µA 0.8 0.95 9 V 0.01 0.6 pF 1 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPD8S009 V Ω µA 3 TPD8S009 SLVS816 – JULY 2008 ....................................................................................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS 1 4.0 48 3.5 42 0 –1 36 3.0 D0+ D1+ –4 2.5 30 2.0 24 D1D2+ –5 D2- –6 18 1.5 –7 Current (A) –8 –9 1.0E+00 1.0E+02 1.0E+04 1.0E+06 Frequency (Hz) 1.0E+08 1.0 12 0.5 6 1.0E+10 0 50 0.0 0 5 10 15 20 25 30 Time (μs) 35 40 45 Figure 2. Peak Pulse Waveforms 240 80 200 40 160 0 120 –40 Amplitude (V) Amplitude (V) Figure 1. Insertion Loss vs Frequency 80 40 –80 –120 0 –160 –40 –200 –80 0 4 PPP (W) Power (W) D0- IPP (A) Insertion Loss (dB) –2 –3 20 40 60 80 100 120 Time (ns) 140 160 180 200 –240 0 20 40 60 80 100 120 Time (ns) 140 160 180 Figure 3. IEC Clamping Waveforms (8-kV Contact, 20 ns/div) Figure 4. Figure 3. IEC Clamping Waveforms (–8-kV Contact, 20 ns/div) Figure 5. Eye Diagram Without TPD8S009 (2.5 Gbps Data Rate) Figure 6. Eye Diagram With TPD8S009 (2.5 Gbps Data Rate) Submit Documentation Feedback 200 Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPD8S009 TPD8S009 www.ti.com ....................................................................................................................................................................................................... SLVS816 – JULY 2008 APPLICATION INFORMATION PIN NO. SIGNAL TYPE 1 Out 2 GND 3 PIN NAME MATING ROW CONTACT LOCATION ML Lane 0(p) Top GND Bottom Out ML Lane 0(n) Top 4 Out ML Lane 1(p) Bottom 8 GND GND Top 6 Out ML Lane 1(n) Bottom 7 Out ML Lane 2(p) Top 8 GND GND Bottom 9 Out ML Lane 2(n) Top 10 Out ML Lane 3(p) Bottom 11 GND GND Top 12 Out ML Lane 3(n) Bottom 13 GND GND Top 14 GND GND Bottom 15 I/O Aux CH (p) Top 16 GND GND Bottom 17 I/O Aux CH (n) Top 18 In Hot Plug Detect Bottom VERTICALLY OPPOSED CONNECTOR FRONT VIEW TPD8S009 Core Scalar/ Switch TPD4E001 19 PWR Out Return DP PWR Top 20 PWR RIN DP PWR Bottom Display Port Connector TPD8S009 and TPD4E001 provide complete ESD protection for display or HDMI interface Figure 7. Typical Application The TPD8S009 can provide system-level ESD protection to the high-speed differential lines of the HDMI or display ports. The flow-through package offers flexibility for board routing with traces up to 15-mm wide. Figure 7 shows the board-layout scheme for the four differential pair lines. The special pin configuration of the TPD8S009 matches the HDMI or display port pin assignments. It allows the differential signal pairs to couple together after they touch the ESD ports (pins 1–3, 4–6, 7–9, and 10–12) of the TPD8S009. TPD4E001 is recommended for ESD protection of slow-speed control lines. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPD8S009 5 PACKAGE OPTION ADDENDUM www.ti.com 26-Jun-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing TPD8S009DSMR ACTIVE SON DSM Pins Package Eco Plan (2) Qty 15 3000 Green (RoHS & no Sb/Br) Lead/Ball Finish CU NIPDAU MSL Peak Temp (3) Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 4-Jul-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPD8S009DSMR Package Package Pins Type Drawing SON DSM 15 SPQ Reel Reel Diameter Width (mm) W1 (mm) 3000 180.0 12.4 Pack Materials-Page 1 A0 (mm) B0 (mm) K0 (mm) P1 (mm) 2.75 6.75 0.95 4.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 4-Jul-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPD8S009DSMR SON DSM 15 3000 195.0 200.0 45.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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