SHARP LZ23BP2

LZ23BP2
1/3-type Progressive-scan Color CCD
Area Sensor with 350 k Pixels
LZ23BP2
DESCRIPTION
PIN CONNECTIONS
The LZ23BP2 is a 1/3-type (6.0 mm) solid-state
image sensor that consists of PN photo-diodes and
CCDs (charge-coupled devices). With approximately 350 000 pixels (695 horizontal x 504
vertical), the sensor provides a stable highresolution color image. All pixel signals can be read
independently via the vertical shift register and
horizontal shift register.
16-PIN HALF-PITCH WDIP
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Progressive scan
Square pixel
Compatible with VGA format
Number of effective pixels : 659 (H) x 494 (V)
Number of optical black pixels
– Horizontal : 2 front and 34 rear
– Vertical : 8 front and 2 rear
Number of dummy bits
– Horizontal : 16
– Vertical : 4
Pixel pitch : 7.4 µm (H) x 7.4 µm (V)
R, G, and B primary color mosaic filters
Low fixed-pattern noise and lag
No burn-in and no image distortion
Blooming suppression structure
Built-in output amplifier
Built-in overflow drain voltage circuit and reset
gate voltage circuit
Variable electronic shutter (1/30 to 1/10 000 s)
Package :
16-pin half-pitch WDIP [Ceramic]
(WDIP016-N-0450)
Row space : 11.43 mm
TOP VIEW
ØV4 1
16 ØH2
ØV3 2
15 ØH1
ØV2 3
14 ØRS
ØV1 4
13 PW
GND 5
12 OFD
NC1 6
11 GND
GND 7
10 NC2
9 OD
OS 8
(WDIP016-N-0450)
PRECAUTIONS
• The exit pupil position of lens should be more
than 25 mm from the top surface of the CCD.
• Refer to "PRECAUTIONS FOR CCD AREA
SENSORS" for details.
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in
catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
1
LZ23BP2
PIN DESCRIPTION
SYMBOL
OD
PIN NAME
Output transistor drain
OS
ØRS
Output signals
ØV1, ØV2, ØV3, ØV4
Vertical shift register clock
ØH1, ØH2
Horizontal shift register clock
Reset transistor clock
OFD
Overflow drain
PW
GND
P-well
Ground
NC1, NC2
No connection
ABSOLUTE MAXIMUM RATINGS
(TA = +25 ˚C)
SYMBOL
VOD
RATING
0 to +18
UNIT
V
NOTE
VOFD
VØRS
Internal output
Internal output
V
V
1
2
Vertical shift register clock voltage
VØV
Horizontal shift register clock voltage
VØH
–11.5 to +17.5
–0.3 to +12
V
V
Voltage difference between P-well and vertical clock
VPW-VØV
–29 to 0
V
Voltage difference between vertical clocks
Storage temperature
VØV-VØV
TSTG
0 to +15
–40 to +85
V
˚C
TOPR
–20 to +70
˚C
PARAMETER
Output transistor drain voltage
Overflow drain voltage
Reset gate clock voltage
Ambient operating temperature
3
NOTES :
1. Do not connect to DC voltage directly. When OFD is connected to GND, connect VOD to GND. Overflow drain clock is
applied below 27 Vp-p.
2. Do not connect to DC voltage directly. When ØRS is connected to GND, connect VOD to GND. Reset gate clock is
applied below 8 Vp-p.
3. When clock width is below 10 µs, and clock duty factor is below 0.1%, voltage difference between vertical clocks will be
below 28 V.
2
LZ23BP2
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Ambient operating temperature
SYMBOL
TOPR
MIN.
TYP.
25.0
MAX.
UNIT
˚C
Output transistor drain voltage
Overflow drain clock p-p level
VOD
14.55
15.0
15.45
V
VØOFD
22.5
Ground
P-well voltage
GND
VPW
LOW level
Vertical shift
VØV1L, VØV2L
VØV3L, VØV4L
INTERMEDIATE level
HIGH level
VØV3I, VØV4I
VØV1H, VØV3H
Horizontal shift
register clock
LOW level
VØH1L, VØH2L
HIGH level
Reset gate clock p-p level
–9.5
VØV1I, VØV2I
register clock
24.5
V
1
VØVL
V
V
2
–8.5
V
0.0
–10.0
–9.0
NOTE
0.0
V
14.55
15.0
15.45
V
VØH1H, VØH2H
–0.05
4.5
0.0
5.0
0.05
5.5
V
V
VØRS
4.5
5.0
5.5
V
Vertical shift register clock frequency
fØV1, fØV2
fØV3, fØV4
15.73
kHz
Horizontal shift register clock frequency
Reset gate clock frequency
fØH1, fØH2
fØRS
12.27
12.27
MHz
MHz
1
NOTES :
• Connect NC1 and NC2 to GND directly or through a capacitor larger than 0.047 µF.
1. Use the circuit parameter indicated in "SYSTEM CONFIGURATION EXAMPLE", and do not connect to DC voltage directly.
2. VPW is set below VØVL that is low level of vertical shift register clock, or is used with the same power supply that is connected
to VL of V driver IC.
* To apply power, first connect GND and then turn on VOD. After turning on VOD, turn on PW first and then turn on other powers
and pulses. Do not connect the device to or disconnect it from the plug socket while power is being applied.
3
LZ23BP2
CHARACTERISTICS (1/30 s progressive scan readout mode)
(TA = +25 ˚C, Operating conditions : The typical values specified in "RECOMMENDED OPERATING CONDITIONS".
Color temperature of light source : 3 200 K, IR cut-off filter (CM-500, 1 mmt) is used.)
PARAMETER
Standard output voltage
Photo response non-uniformity
Saturation output voltage
Dark output voltage
Dark signal non-uniformity
Sensitivity (green channel)
Sensitivity ratio
Smear ratio
Image lag
Blooming suppression ratio
Output transistor drain current
Output impedance
Dark noise
OB difference in level
SYMBOL
VO
PRNU
VSAT
VDARK
DSNU
R
RR
RB
SMR
AI
ABL
IOD
RO
VNOISE
MIN.
TYP.
150
MAX.
10
500
245
0.3
0.2
0.5
0.5
370
0.55
0.4
–86
3.0
2.0
0.8
0.6
–76
1.0
UNIT
mV
%
mV
mV
mV
mV
dB
%
500
4.0
350
0.2
8.0
0.3
1.0
mA
$
mV
mV
NOTE
2
3
4
1, 5
1, 6
7
8
8
9
10
11
12
1, 13
NOTES :
• Within the recommended operating conditions of VOD,
VOFD of the internal output satisfies with ABL larger than
500 times exposure of the standard exposure conditions,
and VSAT larger than 500 mV.
1. TA = +60 ˚C
2. The average output voltage of G signal under uniform
illumination. The standard exposure conditions are
defined as when Vo is 150 mV.
3. The image area is divided into 10 x 10 segments under
the standard exposure conditions. Each segment's
voltage is the average output voltage of all pixels within
the segment. PRNU is defined by (Vmax – Vmin)/Vo,
where Vmax and Vmin are the maximum and minimum
values of each segment's voltage respectively.
4. The image area is divided into 10 x 10 segments. Each
segment's voltage is the average output voltage of all
pixels within the segment. VSAT is the minimum
segment's voltage under 10 times exposure of the
standard exposure conditions.
5. The average output voltage under non-exposure
conditions.
6. The image area is divided into 10 x 10 segments under
non-exposure conditions. DSNU is defined by (Vdmax –
Vdmin), where Vdmax and Vdmin are the maximum and
minimum values of each segment's voltage respectively.
7. The average output voltage of G signal when a 1 000
lux light source with a 90% reflector is imaged by a lens
of F4, f50 mm.
8. RR is defined by VR/VG. RB is defined by VB/VG, where
VR, VG and VB are the average output voltages of red,
green and blue signals respectively, under the standard
exposure conditions.
9. The sensor is exposed only in the central area of V/10
square with a lens at F4, where V is the vertical image
size. SMR is defined by the ratio of the output voltage
detected during the vertical blanking period to the
maximum output voltage in the V/10 square.
10. The sensor is exposed at the exposure level
corresponding to the standard conditions. AI is defined
by the ratio of the output voltage measured at the 1st
field during the non-exposure period to the standard
output voltage.
11. The sensor is exposed only in the central area of V/10
square, where V is the vertical image size. ABL is
defined by the ratio of the exposure at the standard
conditions to the exposure at a point where blooming is
observed.
12. The RMS value of the dark noise (after CDS). (100 kHz
to 5.0 MHz, SC trap on.)
13. The difference between the average output voltage of
the effective area and that of the OB area under nonexposure conditions.
4
LZ23BP2
PIXEL STRUCTURE
OPTICAL BLACK
(2 PIXELS)
yyyyyyyyy
,,,,,,,,,
,,,,,,,,,
yyyyyyyyy
,,,,,,,,,
yyyyyyyyy
,,,,,,,,,
yyyyyyyyy
,,,,,,,,,
yyyyyyyyy
,,,,,,,,,
yyyyyyyyy
OPTICAL BLACK
(2 PIXELS)
1 pin
659 (H) x 494 (V)
OPTICAL BLACK
(34 PIXELS)
OPTICAL BLACK
(8 PIXELS)
COLOR FILTER ARRAY
(1, 494)
(659, 494)
G
B
G
B
G
G
B
G
B
G
R
G
R
G
R
R
G
R
G
R
G
B
G
B
G
G
B
G
B
G
R
G
R
G
R
R
G
R
G
R
G
B
G
B
G
G
B
G
B
G
R
G
R
G
R
R
G
R
G
R
G
B
G
B
G
G
B
G
B
G
R
G
R
G
R
R
G
R
G
R
G
B
G
B
G
G
B
G
B
G
R
G
R
G
R
R
G
R
G
R
G
B
G
B
G
G
B
G
B
G
R
G
R
G
R
R
G
R
G
R
(1, 1)
(659, 1)
5
LZ23BP2
TIMING CHART
VERTICAL TRANSFER TIMING
525 1
10
20
30
HD
VD
ØV1
ØV2
ØV3
ØV4
ØOFD
492 494 OB2
493 OB1
D2 D4 OB2 OB4 OB6 OB8 D1 D3 OB1 OB3 OB5 OB7 1
OS
2
HORIZONTAL TRANSFER TIMING
780, 1
78
HD
38
ØH1
107.5
ØH2
ØRS
OS
πππππ659
PRE SCAN (16)
OB (2)
OUTPUT (659) 1πππππππππππ
OB (34)
780 1
45
73
ØV1
87
59
ØV2
80
38
ØV3
52
94
ØV4
66
ØOFD
6
83
LZ23BP2
READOUT TIMING
HD
ØV1
ØV2
ØV3
ØV4
22.5 µs (276 bits)
32.5 µs (399 bits)
5.05 µs 5.05 µs
(62 bits) (62 bits)
63.5 µs (780 bits)
7
+
V2
V4
V3B
NC
V3A
V1B
V1A
VMa
VH
8
13 14 15 16 17 18 19 20 21 22 23 24
1
6
NC1
5
GND
4
ØV1
3
ØV2
ØV3
ØV4
VDD
(*1) ØRS, OFD :
Use the circuit parameter indicated in
this circuit example, and do not connect
to DC voltage directly.
8
7
GND
2
9
OS
1
LZ23BP2
16 15 14 13 12 11 10
(*1)
(*1)
1 M$
CCD
OUT
+
+5 V
V3X
VH1AX
V1X
V2X
OFDX
VL
LR36685
VMb
2
POFD
3
ØH2
4
ØH1
5
ØRS
6
PW
7
OFD
8
GND
9
1 M$
270 pF
OD
12 11 10
0. 47 µF
0.01 µF
100 $
NC2
V4X
VH3AX
VH
ØH2
ØRS
ØH1
VL (VPW)
VOD
LZ23BP2
SYSTEM CONFIGURATION EXAMPLE
VOFDH
VH3BX
OFDX
V2X
V1X
VH1AX
V3X
+
GND
VH3AX
V4X
VH1BX
+
PACKAGES FOR CCD AND CMOS DEVICES
PACKAGE
(Unit : mm)
16 WDIP (WDIP016-N-0450)
10.50±0.10 (◊2)
0.50R
2.5
1
8
0.45±0.45
2.5
(◊1)
CCD
0.5
8.4
5.70±0.15
¬
(◊1)
4-0.20RMAX.
0.04
Cross Section A-A'
1.25±0.20
3.50±0.30
1.27±0.25
A'
P-1.27TYP.
0.25
M
2.23±0.20
2.75±0.20
Package (Cerdip)
2.5
A
0.30TYP.
CCD
Rotation error of die : ¬ = 1.5˚MAX.
9.2
1.3
5.29MAX.
3.37±0.25
6.10±0.15
Glass Lid
0.60±0.05 (◊2)
9
(◊1)
16
1.46±0.10
10.50±0.10 (◊2)
11.40±0.15
Center of effective imaging area
and center of package
(◊1 : Reference area)
(◊2 : Lid's size)
12.20±0.15
0.85±0.45
0.25±0.05
11.43±0.25
0.46TYP.
9
PRECAUTIONS FOR CCD AREA SENSORS
PRECAUTIONS FOR CCD AREA SENSORS
(In the case of plastic packages)
– The leads of the package are fixed with
package body (plastic), so stress added to a
lead could cause a crack in the package
body (plastic) in the jointed part of the lead.
1. Package Breakage
In order to prevent the package from being broken,
observe the following instructions :
1) The CCD is a precise optical component and
the package material is ceramic or plastic.
Therefore,
ø Take care not to drop the device when
mounting, handling, or transporting.
ø Avoid giving a shock to the package.
Especially when leads are fixed to the socket
or the circuit board, small shock could break
the package more easily than when the
package isn’t fixed.
2) When applying force for mounting the device or
any other purposes, fix the leads between a
joint and a stand-off, so that no stress will be
given to the jointed part of the lead. In addition,
when applying force, do it at a point below the
stand-off part.
Glass cap
Package
Lead
Fixed
Stand-off
3) When mounting the package on the housing,
be sure that the package is not bent.
– If a bent package is forced into place
between a hard plate or the like, the package may be broken.
4) If any damage or breakage occurs on the surface of the glass cap, its characteristics could
deteriorate.
Therefore,
ø Do not hit the glass cap.
ø Do not give a shock large enough to cause
distortion.
ø Do not scrub or scratch the glass surface.
– Even a soft cloth or applicator, if dry, could
cause dust to scratch the glass.
(In the case of ceramic packages)
– The leads of the package are fixed with low
melting point glass, so stress added to a
lead could cause a crack in the low melting
point glass in the jointed part of the lead.
Low melting point glass
Lead
2. Electrostatic Damage
As compared with general MOS-LSI, CCD has
lower ESD. Therefore, take the following anti-static
measures when handling the CCD :
1) Always discharge static electricity by grounding
the human body and the instrument to be used.
To ground the human body, provide resistance
of about 1 M$ between the human body and
the ground to be on the safe side.
2) When directly handling the device with the
fingers, hold the part without leads and do not
touch any lead.
Fixed
Stand-off
10
PRECAUTIONS FOR CCD AREA SENSORS
ø The contamination on the glass surface
should be wiped off with a clean applicator
soaked in Isopropyl alcohol. Wipe slowly and
gently in one direction only.
– Frequently replace the applicator and do not
use the same applicator to clean more than
one device.
◊ Note : In most cases, dust and contamination
are unavoidable, even before the device
is first used. It is, therefore, recommended
that the above procedures should be
taken to wipe out dust and contamination
before using the device.
3) To avoid generating static electricity,
a. do not scrub the glass surface with cloth or
plastic.
b. do not attach any tape or labels.
c. do not clean the glass surface with dustcleaning tape.
4) When storing or transporting the device, put it in
a container of conductive material.
3. Dust and Contamination
Dust or contamination on the glass surface could
deteriorate the output characteristics or cause a
scar. In order to minimize dust or contamination on
the glass surface, take the following precautions :
1) Handle the CCD in a clean environment such
as a cleaned booth. (The cleanliness level
should be, if possible, class 1 000 at least.)
2) Do not touch the glass surface with the fingers.
If dust or contamination gets on the glass
surface, the following cleaning method is
recommended :
ø Dust from static electricity should be blown
off with an ionized air blower. For antielectrostatic measures, however, ground all
the leads on the device before blowing off
the dust.
4. Other
1) Soldering should be manually performed within
5 seconds at 350 °C maximum at soldering iron.
2) Avoid using or storing the CCD at high temperature or high humidity as it is a precise
optical component. Do not give a mechanical
shock to the CCD.
3) Do not expose the device to strong light. For
the color device, long exposure to strong light
will fade the color of the color filters.
11