SHARP LZ23H3V1

LZ23H3V1
1/3-type Interline Color CCD Area
Sensor with 1 090 k Pixels
LZ23H3V1
The LZ23H3V1 is a 1/3-type (6.0 mm) solid-state
image sensor that consists of PN photo-diodes
and CCDs (charge-coupled devices). With
approximately 1 090 000 pixels (1 217 horizontal x
893 vertical), the sensor provides a stable highresolution color image.
• Built-in overflow drain voltage circuit and reset
gate voltage circuit
• Variable electronic shutter
• Package :
16-pin shrink-pitch WDIP [Ceramic]
(WDIP016-N-0500C)
Row space : 12.70 mm
FEATURES
PIN CONNECTIONS
DESCRIPTION
• Optical size :
Number of effective pixels
– Approx. 1 000 k; 6.6 mm
– Approx. 790 k; 5.9 mm (compatible with XGA
format)
16-PIN SHRINK-PITCH WDIP
OD 1
15 GND
OFD 3
14 ØV1A
PW 4
13 ØV1B
ØRS 5
12 ØV2
NC 6
11 ØV3A
(1 024)
ØH1 7
10 ØV3B
1 156
ØH2 8
9 ØV4
790 k pixels
•
•
•
•
•
•
•
866
6.6 mm
(768)
(5.9 mm)
•
16 OS
GND 2
1 000 k pixels
•
•
•
•
TOP VIEW
Interline scan format
Square pixel
Number of effective pixels : 1 174 (H) x 884 (V)
Number of optical black pixels
– Horizontal : 3 front and 40 rear
– Vertical : 7 front and 2 rear
Number of dummy bits
– Horizontal : 22
– Vertical : 2
Pixel pitch : 4.6 µm (H) x 4.6 µm (V)
R, G, and B primary color mosaic filters
Supports monitoring mode
Low fixed-pattern noise and lag
No burn-in and no image distortion
Blooming suppression structure
Built-in output amplifier
(WDIP016-N-0500C)
PRECAUTIONS
• The exit pupil position of lens should be 15 to 50
mm from the top surface of the CCD.
• Refer to "PRECAUTIONS FOR CCD AREA
SENSORS" for details.
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in
catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
1
LZ23H3V1
PIN DESCRIPTION
SYMBOL
OD
PIN NAME
Output transistor drain
OS
ØRS
Output signals
ØV1A, ØV1B, ØV2, ØV3A, ØV3B, ØV4
Vertical shift register clock
ØH1, ØH2
Horizontal shift register clock
Reset transistor clock
OFD
Overflow drain
PW
GND
P-well
Ground
NC
No connection
ABSOLUTE MAXIMUM RATINGS
(TA = +25 ˚C)
SYMBOL
VOD
RATING
0 to +18
UNIT
V
NOTE
VOFD
VØRS
Internal output
Internal output
V
V
1
2
Vertical shift register clock voltage
VØV
Horizontal shift register clock voltage
VØH
VPW to +18
–0.3 to +12
V
V
Voltage difference between P-well and vertical clock
VPW-VØV
–29 to 0
V
Voltage difference between vertical clocks
Storage temperature
VØV-VØV
TSTG
0 to +15
–40 to +85
V
˚C
TOPR
–20 to +70
˚C
PARAMETER
Output transistor drain voltage
Overflow drain voltage
Reset gate clock voltage
Ambient operating temperature
3
NOTES :
1. Do not connect to DC voltage directly. When OFD is connected to GND, connect VOD to GND. Overflow drain clock is
applied below 27 Vp-p.
2. Do not connect to DC voltage directly. When ØRS is connected to GND, connect VOD to GND. Reset gate clock is
applied below 8 Vp-p.
3. When clock width is below 10 µs, and clock duty factor is below 0.1%, voltage difference between vertical clocks will be
below 28 V.
2
LZ23H3V1
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Ambient operating temperature
SYMBOL
TOPR
MIN.
TYP.
25.0
MAX.
UNIT
˚C
Output transistor drain voltage
Overflow drain clock p-p level
VOD
14.55
15.0
15.45
V
VØOFD
24.5
Ground
P-well voltage
GND
VPW
LOW level
Vertical shift
register clock
INTERMEDIATE level
HIGH level
VØV1AL, VØV1BL, VØV2L
VØV3AL, VØV3BL, VØV4L
–9.5
VØV1AI, VØV1BI, VØV2I
VØV3AI, VØV3BI, VØV4I
VØV1AH, VØV1BH
26.5
V
1
VØVL
V
V
2
–8.5
V
0.0
–10.0
–9.0
0.0
V
14.55
15.0
15.45
V
–0.05
0.0
0.05
V
V
Horizontal shift
LOW level
VØV3AH, VØV3BH
VØH1L, VØH2L
register clock
HIGH level
VØH1H, VØH2H
4.5
5.0
5.5
VØRS
4.5
5.0
5.5
Reset gate clock p-p level
Vertical shift register clock frequency
Horizontal shift register clock frequency
NOTE
V
1
kHz
3
fØV1A, fØV1B, fØV2
10.88
fØV3A, fØV3B, fØV4
13.47
kHz
4
14.32
MHz
3
18.00
MHz
4
14.32
18.00
MHz
MHz
3
4
fØH1, fØH2
Reset gate clock frequency
fØRS
NOTES :
1. Use the circuit parameter indicated in "SYSTEM CONFIGURATION EXAMPLE", and do not connect to DC voltage directly.
2. VPW is set below VØVL that is low level of vertical shift register clock, or is used with the same power supply that is connected
to VL of V driver IC.
3. Operation frequency is 14.32 MHz.
4. Operation frequency is 18.00 MHz.
* To apply power, first connect GND and then turn on VOD. After turning on VOD, turn on PW first and then turn on other powers
and pulses. Do not connect the device to or disconnect it from the plug socket while power is being applied.
3
LZ23H3V1
CHARACTERISTICS (Drive method : 1/30 s frame accumulation)
(TA = +25 ˚C, Operating conditions : The typical values specified in "RECOMMENDED OPERATING CONDITIONS".
Color temperature of light source : 3 200 K, IR cut-off filter (CM-500, 1 mmt) is used.)
PARAMETER
Standard output voltage
SYMBOL
VO
Photo response non-uniformity
PRNU
Saturation output voltage
VSAT
Dark output voltage
VDARK
Dark signal non-uniformity
DSNU
Sensitivity (green channel)
Smear ratio
R
SMR
Image lag
MIN.
TYP.
150
450
530
330
410
mV
5
10
105
ABL
IOD
Line crawling
LCR
UNIT
mV
NOTE
2
%
3
mV
4
0.5
0.5
3.0
2.0
mV
mV
1, 6
1, 7
150
–75
–65
mV
dB
8
9
1.0
%
10
AI
Blooming suppression ratio
Output transistor drain current
MAX.
500
11
4.0
8.0
mA
3.0
%
12
NOTES :
• Within the recommended operating conditions of VOD,
VOFD of the internal output satisfies with ABL larger than
500 times exposure of the standard exposure conditions,
and VSAT larger than 330 mV.
1. TA = +60 ˚C
2. The average output voltage of G signal under uniform
illumination. The standard exposure conditions are
defined as when Vo is 150 mV.
3. The image area is divided into 10 x 10 segments under
the standard exposure conditions. Each segment's
voltage is the average output voltage of all pixels within
the segment. PRNU is defined by (Vmax – Vmin)/Vo,
where Vmax and Vmin are the maximum and minimum
values of each segment's voltage respectively.
4. The image area is divided into 10 x 10 segments. Each
segment's voltage is the average output voltage of all
pixels within the segment. VSAT is the minimum
segment's voltage under 10 times exposure of the
standard exposure conditions. The operation of OFDC is
high. (for still image capturing)
5. The image area is divided into 10 x 10 segments. Each
segment's voltage is the average output voltage of all
pixels within the segment. VSAT is the minimum
segment's voltage under 10 times exposure of the
standard exposure conditions. The operation of OFDC is
low.
6. The average output voltage under non-exposure
conditions.
7. The image area is divided into 10 x 10 segments under
non-exposure conditions. DSNU is defined by (Vdmax –
Vdmin), where Vdmax and Vdmin are the maximum and
minimum values of each segment's voltage respectively.
8. The average output voltage of G signal when a 1 000
lux light source with a 90% reflector is imaged by a lens
of F4, f50 mm.
9. The sensor is exposed only in the central area of V/10
square with a lens at F4, where V is the vertical image
size. SMR is defined by the ratio of the output voltage
detected during the vertical blanking period to the
maximum output voltage in the V/10 square.
10. The sensor is exposed at the exposure level
corresponding to the standard conditions. AI is defined
by the ratio of the output voltage measured at the 1st
field during the non-exposure period to the standard
output voltage.
11. The sensor is exposed only in the central area of V/10
square, where V is the vertical image size. ABL is
defined by the ratio of the exposure at the standard
conditions to the exposure at a point where blooming is
observed.
12. The sensor is exposed at the exposure level
corresponding to the standard conditions. LCR is defined
by (∆VG/VO) x 100, where ∆VG is the difference
between the average output voltage of G signal at the
1st field, and that of G signal at the 2nd field.
4
LZ23H3V1
PIXEL STRUCTURE
yyyyyyyyy
,,,,,,,,,
,,,,,,,,,
yyyyyyyyy
,,,,,,,,,
yyyyyyyyy
,,,,,,,,,
yyyyyyyyy
,,,,,,,,,
yyyyyyyyy
yyyyyyyyy
,,,,,,,,,
yyyyyyyyy
,,,,,,,,,
OPTICAL BLACK
(2 PIXELS)
OPTICAL BLACK
(3 PIXELS)
OPTICAL BLACK
(40 PIXELS)
1 174 (H) x 884 (V)
1 pin
OPTICAL BLACK
(7 PIXELS)
COLOR FILTER ARRAY
(1, 884)
Pin arrangement
of the vertical
readout clock
(1 174, 884)
ØV3B
G
B
G
B
G
B
G
B
G
B
ØV1A
R
G
R
G
R
G
R
G
R
G
ØV3A
G
B
G
B
G
B
G
B
G
B
ØV1B
R
G
R
G
R
G
R
G
R
G
ØV3B
G
B
G
B
G
B
G
B
G
B
ØV1A
R
G
R
G
R
G
R
G
R
G
ØV3A
G
B
G
B
G
B
G
B
G
B
ØV1B
R
G
R
G
R
G
R
G
R
G
ØV3B
G
B
G
B
G
B
G
B
G
B
ØV1A
R
G
R
G
R
G
R
G
R
G
ØV3A
G
B
G
B
G
B
G
B
G
B
ØV1B
R
G
R
G
R
G
R
G
R
G
(1, 1)
(1 174, 1)
5
LZ23H3V1
TIMING CHART
TIMING CHART EXAMPLE
Pulse diagram in more detail is shown in the figure q to t after next page.
Field accumulation mode Frame accumulation
Frame accumulation mode
mode at first
q
q
w
e
r
Field accumulation
mode at first
e'
t
Field accumulation mode
q
VD
ØV1A
ØV1B
ØV2
ØV3A
ØV3B
ØV4
ØOFD
(at OFD shutter operation)
OFDC
OS
(Number of vertical line)
Field accumulation mode
(2.3..882.883)
(2.3..882.883)
Not for use (NOTE 1)
Not for use (NOTE 1)
Frame accumulation mode
(2.4..882.884)
(1.3..881.883)
Not for use Field accumulation
(NOTE 2) mode (2.3..882.883)
NOTES :
1. Do not use these signals immediately after field accumulation mode is transferred to frame
accumulation mode for still image capturing.
2. Do not use these signals immediately after frame accumulation mode is transferred to field
accumulation mode for monitoring mode image.
* Apply at least an OFD shutter pulse to OFD in each field accumulation mode.
q VERTICAL TRANSFER TIMING FOR 14.3 MHz OPERATION ¿FIELD ACCUMULATION MODE¡
453 1
6
10
Shutter speed
1/1 000 s
HD
VD
ØV1A
ØV1B
ØV2
ØV3A
ØV3B
ØV4
ØOFD
OFDC
OS
874 875 878 879 882 883 OB2
GB RG GB RG GB RG
OB1 OB2 OB5 OB6
2
3
6
7 10 11 14 15 18 19
GB RG GB RG GB RG GB RG GB RG
* Do not use the field signals immediately after frame accumulation mode is transferred to field
accumulation mode.
6
LZ23H3V1
w VERTICAL TRANSFER TIMING FOR 14.3 MHz OPERATION ¿FRAME ACCUMULATION MODE AT FIRST¡
453 1
6
Shutter speed
1/1 000 s
10
HD
VD
ØV1A
ØV1B
ØV2
ØV3A
ØV3B
ØV4
ØOFD
OFDC
OS
874 875 878 879 882 883 OB2
GB RG GB RG GB RG
Not for use
* Do not use the frame signals immediately after field accumulation is transferred to frame
accumulation mode.
(2nd FIELD)
e, e' VERTICAL TRANSFER TIMING FOR 14.3 MHz OPERATION ¿FRAME ACCUMULATION MODE¡
453 454
459
463
HD
VD
ØV1A
ØV1B
ØV2
ØV3A
ØV3B
ØV4
ØOFD
OFDC
OS e
Not for use
OS e'
Not for use
872 874 876 878 880 882 884 OB2
GB GB GB GB GB GB GB
OB2 OB4 OB6
1
3
5
7
9
11 13 15 17 19
RG RG RG RG RG RG RG RG RG RG
* Do not use the frame signals immediately after field accumulation mode is transferred to frame
accumulation mode.
7
LZ23H3V1
(1st FIELD)
r VERTICAL TRANSFER TIMING FOR 14.3 MHz OPERATION ¿FRAME ACCUMULATION MODE¡
900
906 1
6
10
HD
VD
ØV1A
ØV1B
ØV2
ØV3A
ØV3B
ØV4
Charge swept transfer (658 stages)
ØOFD
OFDC
OB1 OB3 OB5 OB7
OS
2
4
6
8 10 12 14
GB GB GB GB GB GB GB
Not for use
* Do not use the frame signals immediately after field accumulation mode is transferred to frame
accumulation mode.
t VERTICAL TRANSFER TIMING FOR 14.3 MHz OPERATION ¿FIELD ACCUMULATION MODE AT FIRST¡
906 1
6
Shutter speed
1/1 000 s
10
HD
VD
ØV1A
ØV1B
ØV2
ØV3A
ØV3B
ØV4
ØOFD
OFDC
OS
873 875 877 879 881 883 OB1
RG RG RG RG RG RG
Not for use
* Do not use the field signals immediately after frame accumulation mode is transferred to field
accumulation mode.
8
LZ23H3V1
READOUT TIMING FOR 14.3 MHz OPERATION ¿FIELD ACCUMULATION MODE¡
132
1316, 1
HD
1316, 1
588
ØV1A
48 80
660
536
392
ØV1B
64 96
552
408
ØV2
436
ØV3A
40 88
384
508
544
ØV3B
400
56 104
560
ØV4
5.03 µs
(72 bits)
30.5 µs (436 bits)
41.1 µs (588 bits)
5.03 µs
(72 bits)
91.9 µs (1 316 bits)
READOUT TIMING FOR 14.3 MHz OPERATION ¿FRAME ACCUMULATION MODE AT FIRST¡
132
1316, 1
HD
1316, 1
588
ØV1A
48 80
660
536
392
ØV1B
64 96
408
552
ØV2
436
ØV3A
40 88
384
508
544
ØV3B
56 104
400
560
ØV4
30.5 µs (436 bits)
41.1 µs (588 bits)
5.03 µs
(72 bits)
5.03 µs
(72 bits)
91.9 µs (1 316 bits)
9
LZ23H3V1
READOUT TIMING FOR 14.3 MHz OPERATION ¿FRAME ACCUMULATION MODE¡
(1st FIELD)
132
1
1316, 1
HD
48
ØV1A
ØV1B
80
64
ØV2
96
476 548
40
ØV3A
ØV3B
88
56
104
ØV4
5.03 µs
(72 bits)
33.2 µs (476 bits)
(2nd FIELD)
1316, 1
132
1
HD
476 548
ØV1A
ØV1B
48 80
48 80
64 96
ØV2
ØV3A
ØV3B
64 96
40 88
40 88
56 104
ØV4
56 104
5.03 µs
(72 bits)
33.2 µs (476 bits)
HORIZONTAL TRANSFER TIMING FOR 14.3 MHz OPERATION
HD
1316, 1
132
40
ØH1
117.5
ØH2
ØRS
OS
..1174
PRE SCAN (22)
OB (3)
OUTPUT (1 174) 1πππ
OB (40)
80
48
ØV1A
ØV1B
96
64
ØV2
ØV3A
ØV3B
88
40
56
104
ØV4
72
ØOFD
10
92
LZ23H3V1
CHARGE SWEPT TRANSFER TIMING FOR 14.3 MHz OPERATION
900H
901H 902H
1
905H 906H 1H 2H 3H 4H 5H 6H
• • • • •
132
1316
HD
ØV1A
ØV1B
2
14 26 38 50
8
1306
20 32 44
1312
ØV2
ØV3A
ØV3B
2
14 26 38 50
8
20 32 44
1
2
1306
1312
ØV4
3
4
656
• • • • • • •
657
658
q VERTICAL TRANSFER TIMING FOR 18.0 MHz OPERATION ¿FIELD ACCUMULATION MODE¡
442
449 1
6
10
Shutter speed
1/1 000 s
HD
VD
ØV1A
ØV1B
ØV2
ØV3A
ØV3B
ØV4
ØOFD
OFDC
OS
858 859 862 863 866 867 870 871 874 875 878 879 882 883 OB2
GB RG GB RG GB RG GB RG GB RG GB RG GB RG
OB1 OB2 OB5 OB6
2
3
6
7
10 11
GB RG GB RG GB RG
* Do not use the field signals immediately after frame accumulation mode is transferred to field
accumulation mode.
11
LZ23H3V1
w VERTICAL TRANSFER TIMING FOR 18.0 MHz OPERATION ¿FRAME ACCUMULATION MODE AT FIRST¡
442
449 1
6
Shutter speed
1/1 000 s
10
HD
VD
ØV1A
ØV1B
ØV2
ØV3A
ØV3B
ØV4
ØOFD
OFDC
OS
858 859 862 863 866 867 870 871 874 875 878 879 882 883 OB2
GB RG GB RG GB RG GB RG GB RG GB RG GB RG
Not for use
* Do not use the field signals immediately after frame accumulation mode is transferred to field
accumulation mode.
(2nd FIELD)
e, e' VERTICAL TRANSFER TIMING FOR 18.0 MHz OPERATION ¿FRAME ACCUMULATION MODE¡
449 450
455
459
HD
VD
ØV1A
ØV1B
ØV2
ØV3A
ØV3B
ØV4
ØOFD
OFDC
OS e
OS e'
Not for use
Not for use
856 858 860 862 864 866 868 870 872 874 876 878 880 882 884 OB2
GB GB GB GB GB GB GB GB GB GB GB GB GB GB GB
OB2 OB4 OB6
1
3
5
7
9
11
RG RG RG RG RG RG
* Do not use the field signals immediately after frame accumulation mode is transferred to field
accumulation mode.
12
LZ23H3V1
(1st FIELD)
r VERTICAL TRANSFER TIMING FOR 18.0 MHz OPERATION ¿FRAME ACCUMULATION MODE¡
888
898 1
6
10
HD
VD
ØV1A
ØV1B
ØV2
ØV3A
ØV3B
ØV4
Charge swept transfer (668 stages)
ØOFD
OFDC
OB1 OB3 OB5 OB7
OS
2
4
6
8
GB GB GB GB
Not for use
* Do not use the frame signals immediately after field accumulation mode is transferred to frame
accumulation mode.
t VERTICAL TRANSFER TIMING FOR 18.0 MHz OPERATION ¿FIELD ACCUMULATION MODE AT FIRST¡
898 1
6
Shutter speed
1/1 000 s
10
HD
VD
ØV1A
ØV1B
ØV2
ØV3A
ØV3B
ØV4
ØOFD
OFDC
OS
857 859 861 863 865 867 869 871 873 875 877 879 881 883 OB1
RG RG RG RG RG RG RG RG RG RG RG RG RG RG
Not for use
* Do not use the field signals immediately after frame accumulation mode is transferred to field
accumulation mode.
13
LZ23H3V1
READOUT TIMING FOR 18.0 MHz OPERATION ¿FIELD ACCUMULATION MODE¡
1336, 1
HD
132
50 90
ØV1A
1336, 1
480
660
725 815
ØV1B
70 110
500
680
ØV2
470
40 100
ØV3A
535 625
670
ØV3B
490
60 120
ØV4
690
5.00 µs
29.7 µs (535 bits)
(90 bits)
41.1 µs (588 bits)
5.00 µs
(90 bits)
74.2 µs (1336 bits)
READOUT TIMING FOR 18.0 MHz OPERATION ¿FRAME ACCUMULATION MODE AT FIRST¡
1336, 1
HD
ØV1A
132
50 90
1336, 1
480
660
725 815
ØV1B
70 110
500
680
ØV2
ØV3A
470
40 100
535 625
670
ØV3B
ØV4
490
60 120
690
5.00 µs
29.7 µs (535 bits)
(90 bits)
41.1 µs (588 bits)
5.00 µs
(90 bits)
74.2 µs (1 336 bits)
14
LZ23H3V1
READOUT TIMING FOR 18.0 MHz OPERATION ¿FRAME ACCUMULATION MODE¡
(1st FIELD)
1
1336, 1
132
HD
50
ØV1A
ØV1B
90
70
110
ØV2
ØV3A
ØV3B
585 675
40
100
60
ØV4
120
5.00 µs
32.5 µs (585 bits)
(2nd FIELD)
1
HD
ØV1A
ØV1B
(90 bits)
132
1336, 1
585 675
50 90
50 90
70 110
70 110
40 100
40 100
ØV2
ØV3A
ØV3B
60 120
60 120
ØV4
5.00 µs
32.5 µs (585 bits)
(90 bits)
HORIZONTAL TRANSFER TIMING FOR 18.0 MHz OPERATION
HD
1336, 1
132
40
ØH1
137.5
ØH2
ØRS
OS
..1174
PRE SCAN (22)
OB (3)
OUTPUT (1 174) 1πππππππ
OB (40)
90
50
ØV1A
ØV1B
110
70
ØV2
ØV3A
ØV3B
40
100
60
120
ØV4
80
ØOFD
15
105
LZ23H3V1
CHARGE SWEPT TRANSFER TIMING FOR 18.0 MHz OPERATION
888H
889H 890H
1
897H 898H 1H
• • • • •
2H
3H
4H
5H 6H
132
1336
HD
ØV1A
ØV1B
2
18 34 50 66
1322
10 26 42 58
1330
ØV2
ØV3A
ØV3B
2
18 34 50 66
1322
10 26 42 58
1330
ØV4
1
2
3
4
• • • • • • •
16
666
667
668
V2
NC
V4
V3B
V3A
V1B
V1A
VMa
VH
17
13 14 15 16 17 18 19 20 21 22 23 24
1
VOFDH
VDD
+3.3 V
V3X
VH1AX
V1X
V2X
OFDX
VH3BX
VOFDH
VL
LR36685
VMb
2
POFD
3
9
8
7
6
5
(*1)
4
270
pF
3
(*1)
2
1
10 11 12 13 14 15 16
LZ23H3V1
ØH2
4
+
5
ØH1
6
1 M$
NC
7
0. 01 µF
ØRS
8
0. 47 µF
PW
9
ØV1B
ØV2
ØV3A
ØV3B
ØV4
(*1) ØRS, OFD :
Use the circuit parameter indicated in
this circuit example, and do not connect
to DC voltage directly.
100 $
OFD
12 11 10
18 k$
1 M$
CCD
OUT
+
V4X
VH3AX
5.6 k$
GND
VH1BX
VH
ØH2
VL (VPW)
ØRS
ØH1
OFDC
OD
+
VOD
LZ23H3V1
SYSTEM CONFIGURATION EXAMPLE
OS
GND
ØV1A
VH3BX
OFDX
V2X
V1X
VH1AX
V3X
GND
+
VH3AX
V4X
VH1BX
+
PACKAGES FOR CCD AND CMOS DEVICES
PACKAGE
(Unit : mm)
16 WDIP (WDIP016-N-0500C)
θ
CCD
Glass Lid
1.66±0.10
6.20±0.15
16
12.40±0.15
0.60±0.60
1.40±0.60
11.20±0.10 (◊)
Center of effective imaging area
and center of package
(◊ : Lid's size)
9
7.00±0.15
CCD
Package (Cerdip)
0.04
Cross Section A-A'
8
Rotation error of die : ¬ = 1.5˚MAX.
A
P-1.78TYP.
A'
0.46TYP.
0.90TYP.
0.25
M
2.63TYP.
1.05MIN.
3.90±0.30
1.27±0.25
2.60±0.20
14.00±0.15
5.24MAX.
3.42±0.25
11.20±0.10 (◊)
0.80±0.05 (◊)
1
0.25±0.10
12.70±0.25
18
PRECAUTIONS FOR CCD AREA SENSORS
PRECAUTIONS FOR CCD AREA SENSORS
(In the case of plastic packages)
– The leads of the package are fixed with
package body (plastic), so stress added to a
lead could cause a crack in the package
body (plastic) in the jointed part of the lead.
1. Package Breakage
In order to prevent the package from being broken,
observe the following instructions :
1) The CCD is a precise optical component and
the package material is ceramic or plastic.
Therefore,
ø Take care not to drop the device when
mounting, handling, or transporting.
ø Avoid giving a shock to the package.
Especially when leads are fixed to the socket
or the circuit board, small shock could break
the package more easily than when the
package isn’t fixed.
2) When applying force for mounting the device or
any other purposes, fix the leads between a
joint and a stand-off, so that no stress will be
given to the jointed part of the lead. In addition,
when applying force, do it at a point below the
stand-off part.
Glass cap
Package
Lead
Fixed
Stand-off
3) When mounting the package on the housing,
be sure that the package is not bent.
– If a bent package is forced into place
between a hard plate or the like, the package may be broken.
4) If any damage or breakage occurs on the surface of the glass cap, its characteristics could
deteriorate.
Therefore,
ø Do not hit the glass cap.
ø Do not give a shock large enough to cause
distortion.
ø Do not scrub or scratch the glass surface.
– Even a soft cloth or applicator, if dry, could
cause dust to scratch the glass.
(In the case of ceramic packages)
– The leads of the package are fixed with low
melting point glass, so stress added to a
lead could cause a crack in the low melting
point glass in the jointed part of the lead.
Low melting point glass
Lead
2. Electrostatic Damage
As compared with general MOS-LSI, CCD has
lower ESD. Therefore, take the following anti-static
measures when handling the CCD :
1) Always discharge static electricity by grounding
the human body and the instrument to be used.
To ground the human body, provide resistance
of about 1 M$ between the human body and
the ground to be on the safe side.
2) When directly handling the device with the
fingers, hold the part without leads and do not
touch any lead.
Fixed
Stand-off
19
PRECAUTIONS FOR CCD AREA SENSORS
ø The contamination on the glass surface
should be wiped off with a clean applicator
soaked in Isopropyl alcohol. Wipe slowly and
gently in one direction only.
– Frequently replace the applicator and do not
use the same applicator to clean more than
one device.
◊ Note : In most cases, dust and contamination
are unavoidable, even before the device
is first used. It is, therefore, recommended
that the above procedures should be
taken to wipe out dust and contamination
before using the device.
3) To avoid generating static electricity,
a. do not scrub the glass surface with cloth or
plastic.
b. do not attach any tape or labels.
c. do not clean the glass surface with dustcleaning tape.
4) When storing or transporting the device, put it in
a container of conductive material.
3. Dust and Contamination
Dust or contamination on the glass surface could
deteriorate the output characteristics or cause a
scar. In order to minimize dust or contamination on
the glass surface, take the following precautions :
1) Handle the CCD in a clean environment such
as a cleaned booth. (The cleanliness level
should be, if possible, class 1 000 at least.)
2) Do not touch the glass surface with the fingers.
If dust or contamination gets on the glass
surface, the following cleaning method is
recommended :
ø Dust from static electricity should be blown
off with an ionized air blower. For antielectrostatic measures, however, ground all
the leads on the device before blowing off
the dust.
4. Other
1) Soldering should be manually performed within
5 seconds at 350 °C maximum at soldering iron.
2) Avoid using or storing the CCD at high temperature or high humidity as it is a precise
optical component. Do not give a mechanical
shock to the CCD.
3) Do not expose the device to strong light. For
the color device, long exposure to strong light
will fade the color of the color filters.
20