T R I Q U I N T S E M I C O N D U C T O R , I N C . TQ8033 DATA SHEET 64 x 33 Crosspoint Switch Matrix Input Buffers 128 CONFIGURE Output Buffers O0–O32 66 33 6-Bit Configuration Latches RESETIN LOAD IADD(0:5) 1.5 Gbit/sec 64x33 Expandable Crosspoint Switch SWITCHING PRODUCTS D0–D63 Features 33 6-Bit Program Latches • >1.5 Gb/s/port data rate >50 Gb/s aggregate bandwidth MONITOR_LD OADD(0:4) 5:32 Decoder TQ8033 The TQ8033 is a non-blocking 64 x 33 digital crosspoint switch that supports data rates greater than 1.5 gigabits per second per channel. The TQ8033's non-blocking architecture allows any combination of output-to-input programming, supporting both broadcast and multicast applications. Using 33 independent 64:1 multiplexers, each output channel can be programmed to any input without restriction or degradation of signal fidelity. • Differential PECL data path with 64 inputs and 33 outputs • Non-blocking architecture supports Broadcast and Multicast operation • Data inputs internally biased for AC coupling • Low jitter and signal skew • Double-buffered configuration latches • TTL configuration control inputs The TQ8033's architecture is ideally suited for building larger switch arrays. By eliminating the need to "wire-or" or buss the outputs to interconnect multiple devices, the maximum system bandwidth and signal fidelity is achived. Designed for use in high-performance / high-capacity switching applications, the TQ8033 data path is fully differential to minimize jitter, skew, and signal distortion. The data path interface levels are PECL and the configuration and control interface levels are TTL. The TQ8033 is the ideal switching solution for HDTV digital video, data communications (Fibre Channel and Gigabit Ethernet) and telecommunications applications. • 304-pin BGA package • Single +5V supply Applications • Telecom/datacom switching including Fibre Channel and Gigabit Ethernet • Hubs and routers • Video switching including High-Definition TV (HDTV) For additional information and latest specifications, see our website: www.triquint.com 1 TQ8033 DATA SHEET Circuit Description Data Inputs The 64 data input channels are differential PECL compatible. All inputs have a 2.5KΩ Thevenin equivalent bias circuit which holds the DC bias at VDD-1.3 Volts simplifying the design of applications requiring AC coupling. Input signals must be properly terminated for maximum performance. Terminate one side (true or complement) of any unused inputs to VTT . To program the TQ8033, the address of the desired output port is applied to the inputs (OADD0:4; where 00000=O0 and 11111=O31). The address of the desired input port is applied to the inputs (IADD0:5; where 000000=I0 and 111111=I63). The new configuration is loaded into the program registers by asserting the LOAD signal high. The data is latched when LOAD is de-asserted. LOAD should remain low and only be asserted for the time necessary to load the new configuration data. Data Outputs The 33 data output channels are differential PECL compatible and designed to be terminated to 50Ω to VDD -2.0 Volts. Unused outputs can be left unterminated if desired in order to save power. Control Inputs The control inputs interface levels are TTL compatible. Program Registers The configuration data for each of the 33 data channels have two sets, or stages, of configuration storage registers. The first stage, known as the program register, stores a new set of input configurations prior to application to the switch core. The second stage, known as the configuration register, stores the current switch core configurations. The use of two stage configuration storage registers allows new input configurations to be loaded without disturbing the existing configuration. After the new input configurations have been loaded into the program registers, the CONFIGURE input is asserted and the new configurations are applied to the switch core. 2 The process is repeated for each output port configuration. Only the output ports which are to receive a new input port configuration need to be programmed. The new configurations are not applied to the switch core at this time and there is no disruption of the data flowing through the switch core. After the new configurations have been loaded into the program registers, the CONFIGURE input is asserted and the data in the program registers is loaded into the configuration registers. The data is latched on the falling edge of CONFIGURE. The switch core receives the new configuration as soon as CONFIGURE is asserted. During the time the new configurations are being applied to the switch core, the integrity of the data on output ports which receive a new configuration is unknown for a period of tdcf from the time CONFIGURE is asserted. If desired, the LOAD and CONFIGURE can be asserted simultaneously. In this mode, the new configuration will be applied to the switch core when LOAD is asserted. For additional information and latest specifications, see our website: www.triquint.com TQ8033 DATA SHEET The 33rd output port, called the monitor port, is programmed in the same manner as the other 32 output ports with the exceptions that the LOAD and Output Address inputs are ignored. To program the monitor port, apply the desired input port address to inputs (IADD0:5) and assert the MONITOR_LD input. Like the other 32 output ports, the CONFIGURE input is asserted to apply the new configuration to the switch core. Reset Programming The RESETIN is an active high input which sets all of the switch multiplexers to a defined configuration. There are three RESET modes available when RESETIN is used in conjunction with CONFIGURE and IADD5 inputs. The monitor port is reset to input D0 regardless of the state of CONFIGURE or IADD5. Mode 1 is broadcast operation. In this mode, the RESETIN signal clears all of the configuration registers immediately forcing all output ports to be connected to input port 0. The device will remain in the Mode 1 reset state as long as the RESETIN input is asserted. Modes 2 and 3 place the device into pass-through configuration. The mode is controlled by the assertion of CONFIGURE immediately following the de-assertion of RESETIN and the state of input IADD5. Mode 2, or low-order pass-through, is set with the assertion of CONFIGURE with IADD5 input low. In this mode, inputs D0 to D31 are configured to outputs O0 to O31 respectively (D0 to O0, D1 to O1,,,D31 to O31). Mode 3, or high-order pass-through, is set with the assertion of CONFIGURE with IADD5 input high. In this mode, inputs D32 to D63 are configured to outputs O0 to O31 respectively (D32 to O0, D33 to O1,,,D63 to O31). Reset Configuration Modes Mode RESETIN 1 2 3 1 1 1 CONFIGURE** IADD5** 0 1 1 X 0 1 RESET Configuration Broadcast mode. All outputs programmed to input 0 Low-order Pass-through mode #1. High-order Pass-through mode #2. ** Valid only when asserted immediately following de-assertion of RESETIN and prior to any new program cycles. For additional information and latest specifications, see our website: www.triquint.com 3 SWITCHING PRODUCTS Programming the Monitor Port TQ8033 DATA SHEET Building Switch Arrays with the TQ8033 By eliminating the need to “wire-or” the outputs of multiple devices or to add additional switch elements to get the necessary routing channels, the TQ8033 offers the highest performance solution with the least number of devices for implementing larger array sizes. The 33rd output port provides an additional data channel for system data links or for diagnostics system monitoring of each switch element within the array. The following examples show how to interconnect multiple TQ8033 devices to create a 64x64 and a 128x128 switch array. 64x64 Switch Array To implement a 64x64 array (figure 2), only two TQ8033 devices are required and the data passes through only one switch element. For applications with data rates less than one gigabit per second, a technique known as"fly-by" termination offers good signal fidelity with the minimum number of components. To implemement, both the input signal pairs (true and complement) are routed to both devices and then to the termination network at the end of the signal trace with the minimum number of trace discontinuities. To accomplish this, route the trace from the source device to the first TQ8033 input pad and then continue the signal trace from the input pads to the next device, and finally to the termination network. For applications at data rates above one gigabit per second, it is recommended to use a fan-out buffer to drive each TQ8033 input as shown in figure 3. As with any high speed interconnect, careful attention to the impedance of the signal traces is very important. O0 D0 TQ8033 D63 O31 Dn/ NDn Connect one driver output to each common TQ8033 input O32 TQ8033 O63 50 Ω 50 Ω Figure 3. Optional fan-out buffer for array expansion VTT Figure 2. 64x64 array with "fly-by" termination 4 For additional information and latest specifications, see our website: www.triquint.com TQ8033 DATA SHEET 128x128 Switch Array Again, use “fly-by” interconnection or a fan-out buffer on input signals to connect multiple devices and the far-end termination network. To implement a 128x128 switch array, simply extend the design of the 64x64 switch array to include the additional devices. In this configuration, only 12 TQ8033 devices are required and the signal passes through only two switch stages. TQ8033 64x33 Crosspoint Switch TQ8033 64x33 Crosspoint Switch TQ8033 64x33 Crosspoint Switch TQ8033 64x33 Crosspoint Switch TQ8033 64x33 Crosspoint Switch TQ8033 64x33 Crosspoint Switch TQ8033 64x33 Crosspoint Switch 64 D0-63 Monitor 32 64 32 TQ8033 64x33 Crosspoint Switch SWITCHING PRODUCTS TQ8033 64x33 Crosspoint Switch Larger switch arrays can be built by simply adding additional TQ8033 devices. 32 D0-31 Monitor Monitor Monitor 32 64 32 TQ8033 64x33 Crosspoint Switch 32 D32-63 Monitor Monitor Monitor 32 64 32 TQ8033 64x33 Crosspoint Switch 32 D64-95 Monitor Monitor Monitor 32 32 64 TQ8033 64x33 Crosspoint Switch 32 D96-127 Monitor Monitor 64 D64-127 Figure 4. 128x128 array For additional information and latest specifications, see our website: www.triquint.com 5 TQ8033 DATA SHEET Typical Performance Data Rate: 1.5Gb/s Data Pattern: 223-1 PRBS Case Temperature: 0° C Jitter: 54 ps pk-pk Data Rate: 1.5Gb/s Data Pattern: 223-1 PRBS Case Temperature: 85° C Jitter: 56 ps pk-pk 6 For additional information and latest specifications, see our website: www.triquint.com TQ8033 DATA SHEET Typical Performance Crosspint Devices: 2 (Cascaded) Data Rate: 1.5Gb/s Data Pattern: 223-1 PRBS Case Temperature: 85° C SWITCHING PRODUCTS Jitter: 110 ps pk-pk Rise and Fall Time Data Rate: 1.5Gb/s Data Pattern: 223-1 PRBS Case Temperature: 85° C Rise/Fall time: 170/166 ps For additional information and latest specifications, see our website: www.triquint.com 7 TQ8033 DATA SHEET Specifications Specifications subject to change without notice Table 1. DC Characteristics — PECL I/O 3,4 Parameter Notes/Condition Input common mode range Differential pk-pk input voltage swing (1, 2) Differential pk-pk output voltage swing (1, 2) Output common mode range Input capacitance ESD breakdown rating Symbol Minimum Nominal Maximum Unit VICOM ∆VIN ∆VOUT VOCOM CIN VDD – 1500 800 1200 VDD-1500 — — — 2.6 VDD – 1100 2400 2200 VDD-1100 3.3 mV mV mV mV pF VESD 1000 — — V Symbol Minimum Nominal Maximum Unit VIH VIL 2.0 0 — — VDD 0.8 V V IIH IIL — –400 — –200 200 — uA uA CIN VESD — 1000 — — 3.3 — pF V Table 2. DC Characteristics—TTL I/O 3 Parameter Notes/Condition Input HIGH voltage Input LOW voltage Input HIGH current Input LOW current Input capacitance ESD breakdown rating VIH(MAX) VIL(MIN) Notes (Tables 1 and 2): 1. Defined as (2 x (| VTRUE - VCOMP |)) 2. RLOAD = 50 ohms to VTT = VDD – 2.0V. 3. Specifications apply over recommended operating ranges. 4. Inputs are internally DC-biased to VDD – 1.3V with 2.5KΩ Thevenin input impedance for applicaitons requiring AC coupling. 8 For additional information and latest specifications, see our website: www.triquint.com TQ8033 DATA SHEET Table 3. AC Characteristics Parameter Notes/Condition Symbol Minimum Maximum Data Rate/port Nominal Maximum 1.5 D0-63 minimum pulse width O0-32 Rise/Fall time 20-80% Channel Propagation Delay (mean) Ch-to-Ch Propagation Delay Skew O0-32 Jitter (1) (1) (1) (1) (2) Tpw Tr/f Tpd Tskew Tjitter Unit Gb/s 500 — — — — — 200 85 — — 250 2.5 500 200 ps ps ns ps ps SWITCHING PRODUCTS Notes: 1. Min. VOH to max VOL levels 2. Crossing of (On) – (NOn) measured with 223 – 1 PRBS, measured over extended time. Figure 5. Timing Diagram Input Address [IADD5:0] Valid Address Output Address [OADD4:0] Valid Address thar tsar[IADD] tsar[OADD] Tpwl tldl LOAD Tldh Tpwc CONFIGURE Tdcf D (63:0) O (32:0) Data Not Valid ** Data Valid tpd ** Data valid on outputs with unchanged configurations Table 4. Timing Specifications Symbol Parameter tsar[OADD] tsar[IADD] thar tpwl tldh tpwc tdcf tldl Output Address to Load Set-up time Input Address to Load Set-up time Address to Load Hold Time Min. Load pulse width Load to Configure delay Min. Configure pulse width Configure to Data Valid Configure to Load delay Minimum Maximum 1 1 2.5 2.5 0 7 15 3 For additional information and latest specifications, see our website: www.triquint.com Unit ns ns ns ns ns ns ns ns 9 TQ8033 DATA SHEET Table 5. Absolute Maximum Ratings4 Parameter Condition Symbol Minimum Storage Temperature Tstore Junction Temperature Case Temperature w/bias Supply Voltage Voltage to any input Voltage to any output (1) (2) (2) (2) TCH TC VDD Vin Vout Current to any input Current from any output Power Dissipation of output (2) (2) (3) Iin Iout Pout Nominal Maximum Unit –65 150 °C –65 0 0 –0.5 –0.5 150 100 7.0 VDD + 0.5 VDD + 0.5 °C °C V V V –1.0 1.0 40.0 50.0 mA mA mW Notes: 1. Tc is measured at case top. 2. All voltages are measured with respect to GND (0V) and are continuous. 3. Pout = (VDD – Vout ) x Iout . 4. Absolute maximum ratings, as detailed in this table, are the ratings beyond which the device’s performance may be impaired and/or permanent damage to the device may occur. Table 6. Recommended Operating Conditions 4 Symbol Parameter Min Typ Max Units Notes TC Case Operating Temperature 0 — 85 °C 1, 3 VDD IDD VTT RLOAD Supply Voltage Current Positive Supply Load Termination Supply Voltage Output Termination Load Resistance 4.75 — 5.25 3 VDD – 2.0 50 V A V Ω 2 2 ΘJC Thermal Resistance Junction to Case 2.2 °C/W Notes: 1. TC measured at case top. Use of adequate heatsink is required. 2. The VTT and RLOAD combination is subject to maximum output current and power restrictions. 3. Contact the Factory for extended temperature range applications. 4. Functionality and/or adherence to electrical specifications is not implied when the device is subjected to conditions that exceed, singularly or in combination, the operating range specified. 10 For additional information and latest specifications, see our website: www.triquint.com TQ8033 DATA SHEET Figure 6. Typical high speed measurement TQ8033 VDD PECL Scope PECL/ECL Termination OUT 50 Ω VBias VDD PECL/ECL Termination NOUT PECL SWITCHING PRODUCTS OUT GND NOUT 50 Ω GND OUT - NOUT ** PECL/ECL terminations available from Cascade Microtech model 523-0150 and Picosecond Pulse Labs model 5623 For additional information and latest specifications, see our website: www.triquint.com 11 TQ8033 DATA SHEET 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Figure 7. Pinout —Bottom View TQ8033 304-pin BGA bottom view A B C D E F G H J K L M N P R T U V W Y AA AB AC GND VDD Table 7. Pin Descriptions Signal Type Not Connected Grid Ref. Description VDD B7, C1, C8, T3, U2, AA16, AB17 - DO NOT CONNECT - LEAVE OPEN A1, A23, B2, B22, C3, C5, C19, C21, D3, D4, D6, D9, D12, D15, D18, D20, D21, F4, F20 J4, J20, M4, M20, R4, R20, V4, V20, W3, W21, Y4, Y6, Y9, Y12, Y15, Y18, Y20, AA3, GND AA5, AA19, AA21, AB2, AB22, AC1, AC23 A2, A6, A8, A9, A12, A15, A16, A18, A22, B1, B3, B21, B23, C2, C22, F1, F23, H1, H23, J1, J23, M1, M23, R1, R23, T1, T23, V1, V23, AA2, AA22, AB1, AB3, AB21, AB23, AC2, RESETIN LOAD TTL Input TTL Input AC6, AC8, AC9, AC12, AC15, AC16, AC18, AC22 E20 Active high. Reset loads program registers with default input. C23 Active high, Loads input port data into the selected output port's CONFIGURE TTL Input D22 MONITOR_LD TTL Input E4 IADD0 IADD1 IADD2 IADD3 IADD4 IADD5 TTL Input TTL Input TTL Input TTL Input TTL Input TTL Input E21 D23 E22 F21 G20 E23 program registers. Output port definfed by OADD(0:4) Active high. Transfers the data for all program registers into the second stage configure registers and into the switch core. Active High. Directly loads the 33rd output port program register. The OADD(0:5) and LOAD are not used to program this port. Input address LSB. (D0= 000000, D63= 111111) Input address. Input address. Input address. Input address. Input address MSB. (Continued on next page) 12 For additional information and latest specifications, see our website: www.triquint.com TQ8033 DATA SHEET Table 7. Pin Descriptions (cont.) Type OADD0 TTL Input F22 Output address LSB. (O0=00000, O31= 11111) OADD1 OADD2 TTL Input TTL Input G21 H20 Output address. Output address. OADD3 OADD4 TTL Input TTL Input G22 H21 Output address. Output address MSB. PECL Input PECL Input PECL Input PECL Input PECL Input PECL Input PECL Input PECL Input C20, D19 A21, B20 A20, B19 C18, D17 A19, B18 C17, D16 B17, A17 C16, B16 High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. PECL Input PECL Input PECL Input PECL Input PECL Input C15, B15 D14, C14 B14, A14 D13, C13 B13, A13 High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. PECL Input PECL Input PECL Input PECL Input PECL Input C12, B12 A11, B11 C11, D11 A10, B10 C10, D10 High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. PECL Input PECL Input PECL Input PECL Input PECL Input PECL Input PECL Input B9, C9 B8, A7 D8, C7 B6, A5 D7, C6 B5, A4 B4, A3 High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. PECL Input PECL Input PECL Input PECL Input PECL Input PECL Input PECL Input D5, C4 D2, E3 D1, E2 F3, G4 E1, F2 G3, H4 G2, G1 High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. Data Inputs D0, ND0 D1, ND1 D2, ND2 D3, ND3 D4, ND4 D5, ND5 D6, ND6 D7, ND7 D8, ND8 D9, ND9 D10, ND10 D11, ND11 D12, ND12 D13, ND13 D14, ND14 D15, ND15 D16, ND16 D17, ND17 D18, ND18 D19, ND19 D20, ND20 D21, ND21 D22, ND22 D23, ND23 D24, ND24 D25, ND25 D26, ND26 D27, ND27 D28, ND28 D29, ND29 D30, ND30 D31, ND31 Grid Ref. Description SWITCHING PRODUCTS Signal (Continued on next page) For additional information and latest specifications, see our website: www.triquint.com 13 TQ8033 DATA SHEET Table 7. Pin Descriptions (cont.) Signal Type Data Inputs (cont.) D32, ND32 PECL Input D33, ND33 PECL Input D34, ND34 PECL Input D35, ND35 PECL Input D36, ND36 PECL Input D37, ND37 PECL Input D38, ND38 PECL Input D39, ND39 PECL Input D40, ND40 PECL Input D41, ND41 PECL Input D42, ND42 PECL Input D43, ND43 PECL Input D44, ND44 PECL Input D45, ND45 PECL Input D46, ND46 PECL Input D47, ND47 PECL Input D48, ND48 PECL Input D49, ND49 PECL Input D50, ND50 PECL Input D51, ND51 PECL Input D52, ND52 PECL Input D53, ND53 PECL Input D54, ND54 PECL Input D55, ND55 PECL Input D56, ND56 PECL Input D57, ND57 PECL Input D58, ND58 PECL Input D59, ND59 PECL Input D60, ND60 PECL Input D61, ND61 PECL Input D62, ND62 PECL Input D63, ND63 PECL Input Grid Ref. Description W2, Y1 Y2, AA1 High-speed input and complement. High-speed input and complement. W4, Y3 AA4, Y5 High-speed input and complement. High-speed input and complement. AC3, AB4 AC4, AB5 AA6, Y7 AC5, AB6 AA7, Y8 AB7, AC7 AA8, AB8 AA9, AB9 Y10, AA10 High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. AB10, AC10 Y11, AA11 AB11, AC11 AA12, AB12 AC13, AB13 High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. AA13, Y13 AC14, AB14 AA14, Y14 AB15, AA15 AB16, AC17 High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. Y16, AA17 AB18, AC19 Y17, AA18 AB19, AC20 AB20, AC21 Y19, AA20 Y21, W20 High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. High-speed input and complement. AA23, Y22 Y23, W22 High-speed input and complement. High-speed input and complement. (Continued on next page) 14 For additional information and latest specifications, see our website: www.triquint.com TQ8033 DATA SHEET Table 7. Pin Descriptions (cont.) Type Grid Ref. PECL Output H3,H2 O1, NO1 PECL Output J3, J2 O2, NO2 O3, NO3 O4, NO4 O5, NO5 O6, N06 O7, NO7 O8, NO8 O9, NO9 O10, NO10 PECL Output PECL Output PECL Output PECL Output PECL Output PECL Output PECL Output PECL Output PECL Output K4, K3 K2, K1 L4, L3 L2, L1 M3, M2 N1, N2 N3, N4 P1, P2 P3, P4 High-speed output and complement. High-speed output and complement. High-speed output and complement. High-speed output and complement. High-speed output and complement. High-speed output and complement. High-speed output and complement. High-speed output and complement. High-speed output and complement. O11, NO11 O12, NO12 O13, NO13 O14, NO14 O15, NO14 PECL Output PECL Output PECL Output PECL Output PECL Output R2, R3 T2, U1 T4, U3 V2, W1 U4, V3 High-speed output and complement. High-speed output and complement. High-speed output and complement. High-speed output and complement. High-speed output and complement. O16, NO16 O17, NO17 O18, NO18 O19, NO19 O20, NO20 PECL Output PECL Output PECL Output PECL Output PECL Output J22, J21 K21, K20 K23, K22 L21, L20 L23, L22 High-speed output and complement. High-speed output and complement. High-speed output and complement. High-speed output and complement. High-speed output and complement. O21, NO21 O22, NO22 O23, NO23 O24, NO24 O25, NO25 O26, NO26 O27, NO27 PECL Output PECL Output PECL Output PECL Output PECL Output PECL Output PECL Output M21, M22 N22, N23 N20, N21 P22, P23 P20, P21 R21, R22 T21, T22 High-speed output and complement. High-speed output and complement. High-speed output and complement. High-speed output and complement. High-speed output and complement. High-speed output and complement. High-speed output and complement. O28, NO28 O29, NO29 O30, NO30 O31, NO31 O32, NO32 PECL Output PECL Output PECL Output PECL Output PECL Output U22, U23 U21, T20 W23, V22 V21, U20 H22, G23 High-speed output and complement. High-speed output and complement. High-speed output and complement. High-speed output and complement. High-speed monitor output and complement. Data Outputs O0,NO0 Description High-speed output and complement. O0 and NO0 are addressed by OADD = “00000”. O31 and NO31 are addressed by OADD = “11111”. High-speed output and complement. For additional information and latest specifications, see our website: www.triquint.com SWITCHING PRODUCTS Signal 15 TQ8033 DATA SHEET Figure 8. Pin assignment - Top view 1 2 A B C D E F G H J K L M N P R T U V W Y AA AB AC 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 VCC GND ND24 ND23 ND21 GND GND VCC GND D24 D23 D21 GND VCC ND25 VCC ND22 ND20 D26 VCC VCC D25 VCC D22 D27 GND GND D16 D14 GND ND12 ND10 GND GND ND6 GND D19 D18 ND16 ND14 ND13 D12 D10 ND8 ND7 D6 ND18 D17 D15 D13 ND11 ND9 D8 D7 VCC ND17 ND15 VCC D11 D9 VCC ND5 D20 D4 D2 D1 GND VCC ND4 ND2 ND1 GND VCC GND D5 D3 VCC D0 DNC GND LOAD ND3 VCC ND0 VCC VCC CONFIG IADD1 RESETIN IADD0 IADD2 IADD5 MONITOR_LD D29 ND27 ND26 GND ND29 D28 VCC VCC IADD3 OADD0 GND ND31 D31 D30 ND28 IADD4 OADD1 OADD3 NO32 GND NO0 O0 ND30 OADD2 OADD4 O32 GND GND NO1 O1 VCC VCC NO16 O16 GND NO3 O3 NO2 O2 NO17 O17 NO18 O18 NO5 O5 NO4 O4 NO19 O19 NO20 O20 GND NO6 O6 VCC VCC O21 NO21 GND O7 NO7 O8 NO8 O23 NO23 O22 NO22 O9 NO9 O10 NO10 GND O11 NO11 VCC GND O12 NO12 TQ8033 304-pin SBGA Top View O13 O25 NO25 O24 NO24 VCC O26 NO26 GND NO29 O27 NO27 GND NO13 O15 NO31 O29 O28 NO28 GND O14 NO15 VCC VCC O31 NO30 GND NO14 D32 VCC D34 ND61 VCC ND63 O30 ND32 D33 ND34 VCC ND35 VCC ND38 ND40 VCC D44 D46 VCC ND50 ND52 VCC ND33 GND VCC D35 VCC D38 D40 D42 D43 ND44 ND46 D48 D50 D52 ND53 GND VCC GND ND36 ND37 ND39 D41 ND42 ND43 D45 D47 ND48 ND49 ND51 D53 D54 VCC GND D36 D37 D39 GND ND41 GND GND ND45 ND47 GND D49 D51 GND GND 1 2 D55 D57 VCC D60 VCC D61 ND62 D63 ND55 ND57 VCC ND60 VCC GND D62 D56 D58 D59 GND VCC GND GND ND56 ND58 ND59 GND VCC ND54 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 = NC (Not Connected) 16 ND19 = DNC (DO NOT CONNECT. LEAVE OPEN) For additional information and latest specifications, see our website: www.triquint.com A B C D E F G H J K L M N P R T U V W Y AA AB AC TQ8033 DATA SHEET SWITCHING PRODUCTS Figure 9. SBGA Mechanical Dimensions Table 8. SBGA Dimensions (in millimeters) Symbol Parameter Min. Nom. Max. A Overall thickness — — 1.70 A1 Ball Height 0.50 0.60 0.70 A2 Body thickness 0.85 0.91 1.00 D Body size D1 Ball footprint E Body size E1 Ball footprint M,N Ball Matrix M1 Number of Rows — 31.00 — 27.84 27.94 28.04 — 31.00 — 27.94 28.04 27.84 23 x 23 4 b Ball diameter 0.60 d Distance encapsulation to balls 0.5 e Ball pitch ddd Coplanarity 0.75 0.90 — — 1.27 0.15 0.30 0.35 ccc Encapsulation height — — 0.20 T Metal back thickness 0.050 0.125 0.175 S Solder ball placement — 0.00 — PCB pad size — 0.63 — For additional information and latest specifications, see our website: www.triquint.com 17 TQ8033 DATA SHEET Thermal Management Heat Sink Vendors Most applications will require the use of a heatsink or other thermal management system in order to keep the package case temperature within the recommended operation limits. As long as the package case temperature does not exceed 85 degrees C, the die temperature will remain well within TriQuint’s requirements for reliability. Selection of a thermal management device is very dependent on the system mechanical and environmental constrains. Several vendors of heatsink and other thermal management systems support the TQ8033’s thermally enhanced Ball Grid Array package. These vendors will work with you to evaluate the system requirements and recommend the best solution. Aavid Thermal Technologies One Kool Path P.O. Box 400 Laconia, NH 03247 603-528-3400 Sumitomo Metal (SMI) 2953 Bunker Hill Lane Santa Clara, CA 95054 408-982-0990 Wakefield Engineering, Inc. 60 Audubon Road Wakefield, MA 01880 617-345-5900 Ordering Information TQ8033 1.5 Gbit/sec 64x33 Crosspoint Switch Additional Information For latest specifications, additional product information, worldwide sales and distribution locations, and information about TriQuint: Web: www.triquint.com Email: [email protected] Tel: (503) 615-9000 Fax: (503) 615-8900 For technical questions and additional information on specific applications: Email: [email protected] The information provided herein is believed to be reliable; TriQuint assumes no liability for inaccuracies or omissions. TriQuint assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. TriQuint does not authorize or warrant any TriQuint product for use in life-support devices and/or systems. Copyright © 1998 TriQuint Semiconductor, Inc. All rights reserved. Revision 1.0.A November 1999 18 For additional information and latest specifications, see our website: www.triquint.com