TPA6141A2 www.ti.com .................................................................................................................................................................................................. SLOS634 – MARCH 2009 CLASS-G DIRECTPATH™ STEREO HEADPHONE AMPLIFIER • TI Class-G Technology Significantly Prolongs Battery Life and Music Playback Time – 0.6 mA / Ch Quiescent Current – 50% to 80% Lower Quiescent Current Than Ground-Referenced Class-AB Headphone Amplifiers • DirectPathTM Technology Eliminates Large Output DC-Blocking Capacitors – Outputs Biased at 0 V – Improves Low Frequency Audio Fidelity • Active Click and Pop Suppression • Fully Differential Inputs Reduce System Noise – Also Configurable as Single-Ended Inputs • SGND Pin Eliminates Ground Loop Noise • Wide Power Supply Range: 2.5 V to 5.5 V • 100 dB Power Supply Noise Rejection • Gain Settings: 0 dB and 6dB • Short-Circuit Current Limiter • Thermal-Overload Protection • ±8 kV HBM ESD Protected Outputs • 0,4 mm Pitch, 1,6 mm × 1,6 mm WCSP Package 2 DESCRIPTION The TPA6141A2 (also known as TPA6141) is a Class-G DirectPath™ stereo headphone amplifier with selectable gain. Class-G technology maximizes battery life by adjusting the voltage supplies of the headphone amplifier based on the audio signal level. At low level audio signals, the internal supply voltage is reduced to minimize power dissipation. DirectPathTM technology eliminates external DC-blocking capacitors. The device operates from a 2.5 V to 5.5 V supply voltage. Class-G operation keeps total supply current below 5.0 mA while delivering 500 µW per channel into 32 Ω. Shutdown mode reduces the supply current to less than 3 µA and is activated through the EN pin. The device has built-in pop suppression circuitry to completely eliminate disturbing pop noise during turn-on and turn-off. The amplifier outputs have short-circuit and thermal-overload protection along with ±8 kV HBM ESD protection, simplifying end equipment compliance to the IEC 61000-4-2 ESD standard. The TPA6141A2 (TPA6141) is available in a 0,4 mm pitch, 16-bump 1,6 mm × 1,6 mm WCSP (YFF) package. 1 mF APPLICATIONS • • • Cellular Phones / Music Phones Portable Media / MP3 Players Portable CD / DVD Players OUTR+ INR+ OUTR- INR- OUTL+ INL+ OUTL- INL- CODEC OUTR TPA6141A2 OUTL SGND EN GAIN EN AGND GAIN Vbat AVDD 2.2 mH 2.2 mF SW HPVDD HPVSS CPP CPN 2.2 mF 1 mF 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Class-G DirectPath, DirectPath are trademarks of Texas Instruments. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. Copyright © 2009, Texas Instruments Incorporated PRODUCT PREVIEW FEATURES 1 TPA6141A2 SLOS634 – MARCH 2009 .................................................................................................................................................................................................. www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. FUNCTIONAL BLOCK DIAGRAM AVDD Ramp Generator + SW Gate Drivers – Comparator 2.2 mH AGND Compensation Network + HPVDD – PRODUCT PREVIEW Audio Level Detector AVDD Optimizer Thermal Protection HPVDD INL- 2.2 mF – OUTL + INL+ HPVSS Short-Circuit Protection HPVDD – INR- OUTR + INR+ HPVSS HPVDD HPVDD CPP EN Interface GAIN Click-and-Pop Suppression Charge Pump 1 mF CPN SGND 2 HPVSS 2.2 mF Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 www.ti.com .................................................................................................................................................................................................. SLOS634 – MARCH 2009 DEVICE PINOUT WCSP PACKAGE (TOP VIEW) A1 A2 A3 A4 SW AVDD OUTL INL- B1 B2 B3 B4 AGND CPP HPVDD INL+ C1 C2 C3 C4 CPN HPVSS SGND INR+ D1 D2 D3 D4 EN GAIN OUTR INR- TERMINAL BALL WCSP INPUT / OUTPUT / POWER (I/O/P) INL– A4 I Inverting left input for differential signals; connect to left input signal through 1 µF capacitor for single-ended input applications INL+ B4 I Non-inverting left input for differential singals; connect to ground through 1 µF capacitor for single-ended input applications INR– C4 I Inverting right input for differential signals; connect to right input signal through 1 µF capacitor for single-ended input applications INR+ D4 I Non-inverting right input for differential singals; connect to ground through 1 µF capacitor for single-ended input applications SGND C3 I Sense Ground; connect to shield terminal of headphone jack EN D1 I Amplifier enable. Connect to logic low to shutdown; connect to logic high to activate GAIN D2 I Amplifier gain select pin. Connect to logic low to seelct a gain of 0 dB; connect to logic high to select a gain of 6 dB OUTL A3 O Left headphone amplifier output; connect to left terminal of headphone jack OUTR D3 O Right headphone amplifier output; connect to right terminal of headphone jack CPP B2 P Charge pump positive flying cap; connect to positive side of capacitor between CPP and CPN CPN C1 P Charge pump negative flying cap; connect to negative side of capacitor between CPP and CPN SW A1 P Buck converter switching node AVDD A2 P Primary power supply for device HPVDD B3 P Power supply for headphone amplifier (DC/DC output node) AGND B1 P Main Ground for headphone amplifiers, DC/DC converter, and charge pump HPVSS C2 P Charge pump output; connect 2.2 µF capacitor to GND NAME PRODUCT PREVIEW TERMINAL FUNCTIONS DESCRIPTION 3 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 SLOS634 – MARCH 2009 .................................................................................................................................................................................................. www.ti.com ORDERING INFORMATION PACKAGED DEVICES (1) PART NUMBER (2) SYMBOL 16-ball, 1,56 mm × 1,56 mm WCSP (+0.03 mm / –0.03 mm tolerance) TPA6141A2YFFR ASBI 16-ball, 1,56 mm × 1,56 mm WCSP (+0.03 mm / –0.03 mm tolerance) TPA6141A2YFFT ASBI TA –40°C to 85°C (1) (2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. YFF packages are only available taped and reeled. The suffix “R” indicates a reel of 3000, the suffix “T” indicates a reel of 250. ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range, TA = 25°C (unless otherwise noted) VALUE / UNIT Supply voltage, AVDD –0.3 V to 6.0 V Amplifier supply voltage, HPVDD VI –0.3 V to 2.0 V Input voltage (INR+, INR-, INL+, INL-) –0.3 V to HPVDD +0.3 V Control input voltage (EN, GAIN) –0.3 V to AVDD Output continuous total power dissipation See Dissipation Rating Table PRODUCT PREVIEW TA Operating free-air temperature range –40°C to 85°C TJ Operating junction temperature range –40°C to 150°C Tstg Storage temperature range –65°C to 85°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ESD Protection – HBM (1) 260°C OUTL, OUTR, SGND 8 kV All other pins 2 kV Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. DISSIPATION RATINGS TABLE (1) (2) (1) (2) PACKAGE TA < 25°C POWER RATING OPERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING YFF (WCSP) 1.25 W 10 mW/°C 800 mW 650 mW Derating factor measured with JEDEC High K board: 1S0P – One signal layer and zero plane layers. See JEDEC Standard 51-3 for Low-K board, JEDEC Standard 51-7 for High-K board, and JEDEC Standard 51-12 for using package thermal information. See JEDEC document page for downloadable copies: http://www.jedec.org/download/default.cfm. RECOMMENDED OPERATING CONDITIONS Supply voltage, AVDD VIH High-level input voltage EN, GAIN VIL Low-level input voltage EN, GAIN TA MIN MAX 2.5 5.5 1.3 UNIT V V 0.6 V Voltage applied to Output; OUTR, OUTL (when EN = logic low) –0.3 3.6 V Operating free-air temperature –40 85 °C 4 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 www.ti.com .................................................................................................................................................................................................. SLOS634 – MARCH 2009 ELECTRICAL CHARACTERISTICS TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS PSRR Power supply rejection ratio AVDD = 2.5 V to 5.5 V, inputs grounded, GAIN = 0 dB CMRR Common mode rejection ratio HPVDD = 1.3 V to 1.8 V, GAIN = 0 dB |IIH| High-level input current AVDD = 2.5 V to 5.5 V, VI = AVDD EN, GAIN |IIL| Low-level input current AVDD = 2.5 V to 5.5 V, VI = 0 V EN, GAIN ISD Shutdown current EN = 0 V, AVDD = 2.5 V to 5.5 V IDD (1) Total supply current MIN TYP MAX 90 UNIT 105 dB 68 dB 1 µA 1 µA 1 3 µA AVDD = 3.6 V HPVDD = 1.3 V, Amplifiers active, no load, no input signal 1.2 2.0 AVDD = 3.6 V, POUT = 100 µW into 32 Ω (1), fAUD = 1 kHz 2.5 AVDD = 3.6 V, POUT = 500 µW into 32 Ω (1), fAUD = 1 kHz 4.0 AVDD = 3.6 V, POUT = 1 mW into 32 Ω (1), fAUD = 1 kHz 6.8 mA Per channel output power assuming a 10 dB crest factor OPERATING CHARACTERISTICS PARAMETER Output power (1) (Outputs in Phase) PO THD+N Total harmonic distortion plus noise (2) TEST CONDITIONS MIN TYP AVDD = 2.7V, THD = 1%, f = 1 kHz 26 AVDD = 2.7V, THD = 10%, f = 1 kHz 32 AVDD = 2.7V, THD = 1%, f = 1 kHz, RL = 16Ω 25 PO = 10 mW into 16 Ω, f = 1 kHz UNIT mW 0.02% PO = 20 mW into 32 Ω, f = 1 kHz 200 mVpp ripple, f = 217 Hz MAX 0.01% 80 100 kSVR AC-Power supply rejection ratio AV Closed–loop voltage gain (OUT / IN–) GAIN = logic low 0 dB GAIN = logic high 6 dB ΔAV Gain matching Between left and right channels VOS Output offset voltage AVDD = 2.3 V to 5.5 V, inputs grounded En Noise output voltage A-weighted 5.3 µVRMS fBUCK Buck converter switching frequency PO = 0.5 mW into 32 Ω, f = 1 kHz 600 kHz fPUMP Charge pump switching frequency 200 mVpp ripple, f = 4 kHz dB 90 1% 0.5 0 PO = 0.5 mW into 32 Ω, f = 1 kHz 315 PO = 15 mW into 32 Ω, f = 1 kHz 1260 Start-up time from shutdown 0.5 mV kHz 5 ms RIN,SE Single Ended Input impedance Gain = 6 dB, per input node 13.2 kΩ RIN,DF Differential input impedance Gain = 6 dB, per input node 26.4 kΩ SNR Signal-to-noise ratio VOUT = 1 VRMS, GAIN = 6 dB, no load 105 dB Threshold 165 Hysteresis 35 Thermal shutdown ZO,SD VCM (1) (2) Output impedance in shutdown EN = logic low, DC value Input to Output attenuation in shutdown EN = logic low, f = 1 kHz, VOUT = 1 VRMS Crosstalk PO = 15 mW, f = 1 kHz Input common-mode voltage range PRODUCT PREVIEW AVDD = 3.6 V , TA = 25°C, GAIN = 0 dB, RL = 32 Ω (unless otherwise noted) °C 8 kΩ 90 dB –80 0 dB 1.4 V Per channel output power A-weighted 5 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 SLOS634 – MARCH 2009 .................................................................................................................................................................................................. www.ti.com TYPICAL CHARACTERISTICS TA = 25°C, AVDD (VDD) = 3.6 V, GAIN = 0 dB, CHPVDD = CHPVSS = 2.2 µF, CINPUT = CFLYING = 1 µF, Outputs out of phase TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 9 8 7 6 5 4 3 2 1 3.0 3.5 4.0 4.5 5.0 5.5 VDD − Supply Voltage − V PRODUCT PREVIEW THD+N − Total Harmonic Distortion + Noise − % 10 In Phase 1 Out of Phase 0.1 0.01 0.0001 0.001 0.01 0.1 PO − Output Power − W G002 Figure 2. TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER f = 1 kHz RL = 16 Ω VDD = 2.5 V 10 VDD = 3.6 V 1 VDD = 5 V 0.1 0.01 0.0001 0.001 0.01 0.1 PO − Output Power − W THD+N − Total Harmonic Distortion + Noise − % f = 1 kHz RL = 16 Ω VDD = 3.6 V G001 100 100 f = 1 kHz RL = 32 Ω VDD = 2.5 V 10 VDD = 3.6 V 1 VDD = 5 V 0.1 0.01 0.0001 0.001 0.01 0.1 PO − Output Power − W G003 G004 Figure 3. Figure 4. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 1 RL = 16 Ω VDD = 2.5 V PO = 1 mW per Channel 0.1 0.01 PO = 10 mW per Channel PO = 4 mW per Channel 0.001 20 100 Figure 1. THD+N − Total Harmonic Distortion + Noise − % 0 2.5 100 1k f − Frequency − Hz 10k 20k THD+N − Total Harmonic Distortion + Noise − % Quiescent Supply Current − mA 10 THD+N − Total Harmonic Distortion + Noise − % QUIESCENT SUPPLY CURRENT vs SUPPLY VOLTAGE 1 RL = 32 Ω VDD = 2.5 V PO = 1 mW per Channel 0.1 PO = 10 mW per Channel 0.01 PO = 4 mW per Channel 0.001 20 G005 Figure 5. 100 1k f − Frequency − Hz 10k 20k G006 Figure 6. 6 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 www.ti.com .................................................................................................................................................................................................. SLOS634 – MARCH 2009 TYPICAL CHARACTERISTICS (continued) TA = 25°C, AVDD (VDD) = 3.6 V, GAIN = 0 dB, CHPVDD = CHPVSS = 2.2 µF, CINPUT = CFLYING = 1 µF, Outputs out of phase PO = 1 mW per Channel PO = 10 mW per Channel 0.1 0.01 PO = 15 mW per Channel 0.001 20 100 1k 10k THD+N − Total Harmonic Distortion + Noise − % 20k 0.1 PO = 1 mW per Channel PO = 10 mW per Channel 0.01 PO = 20 mW per Channel 0.001 20 100 1k 10k f − Frequency − Hz G007 TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY PO = 1 mW per Channel PO = 10 mW per Channel 0.1 0.01 PO = 15 mW per Channel 0.001 20 100 1k 10k f − Frequency − Hz 20k 1 RL = 32 Ω VDD = 5 V 0.1 PO = 1 mW per Channel PO = 10 mW per Channel 0.01 PO = 20 mW per Channel 0.001 20 100 1k 10k f − Frequency − Hz G009 Figure 10. OUTPUT POWER PER CHANNEL vs SUPPLY VOLTAGE OUTPUT POWER PER CHANNEL vs SUPPLY VOLTAGE PO − Output Power per Channel − mW RL = 16 Ω In Phase THD+N = 10% 40 30 THD+N = 1% 20 10 3.0 3.5 4.0 4.5 VDD − Supply Voltage − V 5.0 5.5 20k G010 Figure 9. 60 20k G008 Figure 8. RL = 16 Ω VDD = 5 V 0 2.5 RL = 32 Ω VDD = 3.6 V Figure 7. 1 50 1 PRODUCT PREVIEW RL = 16 Ω VDD = 3.6 V THD+N − Total Harmonic Distortion + Noise − % 1 f − Frequency − Hz PO − Output Power per Channel − mW TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 60 50 RL = 32 Ω In Phase THD+N = 10% 40 30 THD+N = 1% 20 10 0 2.5 G011 Figure 11. 3.0 3.5 4.0 4.5 VDD − Supply Voltage − V 5.0 5.5 G012 Figure 12. 7 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 SLOS634 – MARCH 2009 .................................................................................................................................................................................................. www.ti.com TYPICAL CHARACTERISTICS (continued) TA = 25°C, AVDD (VDD) = 3.6 V, GAIN = 0 dB, CHPVDD = CHPVSS = 2.2 µF, CINPUT = CFLYING = 1 µF, Outputs out of phase OUTPUT POWER vs LOAD RESISTANCE OUTPUT POWER vs LOAD RESISTANCE 50 50 40 VDD = 3.6 V 35 30 25 20 15 VDD = 2.5 V 10 25 20 15 RL − Load Resistance − Ω SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY RL = 16 Ω Supply Ripple = 0.2 Vpp Sine Wave VDD = 5 V VDD = 3.6 V VDD = 2.5 V 100 1k 10k f − Frequency − Hz 20k 0 −20 RL = 32 Ω Supply Ripple = 0.2 Vpp Sine Wave −40 −60 VDD = 5 V VDD = 3.6 V −80 VDD = 2.5 V −100 −120 20 100 1k 10k f − Frequency − Hz G015 Figure 15. Figure 16. SUPPLY CURRENT vs TOTAL OUTPUT POWER SUPPLY CURRENT vs TOTAL OUTPUT POWER 100 20k G016 100 IDD − Supply Current − mA f = 1 kHz RL = 16 Ω VDD = 3.6 V VDD = 2.5 V f = 1 kHz RL = 32 Ω VDD = 3.6 V 10 VDD = 2.5 V VDD = 5 V VDD = 5 V 1 0.001 G014 SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY −100 10 1k Figure 14. −60 −120 20 100 G013 −40 −80 VDD = 2.5 V Figure 13. 0 −20 VDD = 3.6 V 10 0 10 kSVR − Supply Ripple Rejection Ratio− dB PRODUCT PREVIEW kSVR − Supply Ripple Rejection Ratio − dB 30 5 RL − Load Resistance − Ω IDD − Supply Current − mA 35 0 10 1k VDD = 5 V 40 5 100 THD+N = 1% In Phase 45 PO − Output Power − mW PO − Output Power − mW THD+N = 1% Out of Phase VDD = 5 V 45 0.01 0.1 1 PO − Total Output Power − mW 10 100 1 0.001 G017 Figure 17. 0.01 0.1 1 PO − Total Output Power − mW 10 100 G018 Figure 18. 8 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 www.ti.com .................................................................................................................................................................................................. SLOS634 – MARCH 2009 TYPICAL CHARACTERISTICS (continued) TA = 25°C, AVDD (VDD) = 3.6 V, GAIN = 0 dB, CHPVDD = CHPVSS = 2.2 µF, CINPUT = CFLYING = 1 µF, Outputs out of phase TOTAL POWER DISSIPATION vs TOTAL OUTPUT POWER OUTPUT VOLTAGE vs SUPPLY VOLTAGE 2.0 100 RL = 16 Ω 10 RL = 32 Ω 1.4 1.2 1.0 0.8 0.6 RL = 32 Ω 0.4 RL = 16 Ω 1 10 0.0 2.5 100 4.0 4.5 5.0 G019 5.5 G020 Figure 19. Figure 20. CROSSTALK vs FREQUENCY OUTPUT AMPLITUDE vs FREQUENCY 0 VO − Output Amplitude − dBV RL = 16 Ω PO = 15 mW −40 −60 −80 −100 20 3.5 VDD − Supply Voltage − V 0 −20 3.0 PRODUCT PREVIEW 0.1 PO − Total Output Power − mW Crosstalk − dB RL = 1 kΩ RL = 600 Ω 1.6 0.2 1 0.01 Single Channel RL = 16 Ω −30 −60 −90 −120 −150 100 1k 10k f − Frequency − Hz 20k 0 5000 10000 15000 20000 f − Frequency − Hz G021 Figure 21. Figure 22. VOLTAGE vs TIME VOLTAGE vs TIME 5 G022 5 RL = 16 Ω VIN = 0.5 Vrms @ 1 kHz 3 SDA 2 1 RL = 16 Ω VIN = 0.5 Vrms @ 20 kHz 4 V − Voltage − V 4 V − Voltage − V f = 1 kHz THD+N = 1% 1.8 VO − Output Voltage − Vrms PT − Total Power Dissipation − W 1k VOUT 0 Disable 3 SDA 2 VOUT 1 0 Enable −1 −1 0 1 2 3 4 5 6 t − Time − ms 7 8 9 10 0 G023 Figure 23. 50 100 t − Time − µs 150 200 G024 Figure 24. 9 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 SLOS634 – MARCH 2009 .................................................................................................................................................................................................. www.ti.com APPLICATION INFORMATION APPLICATION CIRCUIT 1 mF OUTR+ INR+ OUTR- INR- OUTL+ INL+ OUTL- INL- CODEC OUTR TPA6141A2 OUTL SGND EN GAIN EN GAIN Vbat AVDD 2.2 mH SW HPVDD AGND HPVSS CPP 2.2 mF CPN 2.2 mF PRODUCT PREVIEW 1 mF Figure 25. Typical Apps Configuration with Differential Input Signals 1 mF OUTR INR+ INR- CODEC OUTR TPA6141A2 OUTL INL+ OUTL INLSGND EN GAIN GAIN Vbat AVDD 2.2 mH 2.2 mF EN AGND SW HPVDD HPVSS CPP CPN 2.2 mF 1 mF Figure 26. Typical Apps Configuration with Single-Ended Input Signals 10 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 www.ti.com .................................................................................................................................................................................................. SLOS634 – MARCH 2009 CLASS-G HEADPHONE AMPLIFIER Class-G amplifiers use adaptive supply rails. The TPA6141A2 includes a built-in step-down converter to create the headphone amplifier positive supply voltage, HPVDD. A charge pump inverts HPVDD and creates the amplifier negative supply voltage, HPVSS. This allows the headphone amplifier output to be centered at 0 V. When audio signal amplitude is low, the step-down converter generates a low HPVDD voltage. This minimizes TPA6141 power consumption while playing low noise, high fidelity audio. If audio amplitude increases, either due to louder music or a transient peak, then the step-down converter generates a higher HPVDD voltage. The HPVDD rise rate is faster than the audio peak rise time. This prevents audio distortion or clipping. Audio quality and noise floor are not affected by HPVDD. The following equations compare a Class-AB amplifier to a Class-G amplifier. Both operate with identical battery voltage, load impedance, and output voltage swing. For this study case, we assume a normal listening level of 200 mVRMS with no DirectPath™ in order to simplify the calculations. • PSUP: Supplied power • VSUP: Supply voltage • ISUP: Supply current • VREG: DC/DC converter output voltage • PREG: DC/DC converter output power • VLOAD: Voltage across the load • RLOAD: Load impedance • PLOAD: Power dissipated at the load • ILOAD: Current supplied to the load Given an amplifier driving 200 mVRMS into a 32 Ω load, the output current to the load is: V 200 mVRMS ILOAD = LOAD = = 6.25 mA RLOAD 32 W (1) Assuming a quiescent current of 1 mA (IDDQ) the total current supplied to the amplifier is: ISUP = ILOAD + IDDQ = 7.25 mA (2) The total power supplied to a Class-AB amplifier is then calculated as: PSUP = VSUP ´ ISUP = 4.2 V ´ 7.25 mA = 30.45 mW (3) For a Class-G amplifier where the voltage rails are generated by a switching DC/DC converter, the supplied power will depend on the DC/DC converter output voltage and efficiency. Assuming the DC/DC converter output voltage is 1.3 V: PREG = VREG ´ ISUP = 1.3 V ´ 7.25 mA = 9.425 mW (4) The total supplied power will be the DC/DC converter output power divided by the efficiency of the DC/DC converter. Assuming 90% step-down efficiency, total power supplied to the Class-G amplifier is: P PSUP = REG = 11.09 mW 90% (5) Class-G headphone amplifiers achieve much higher efficiency than equivalent Class-AB amplifiers. 11 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 PRODUCT PREVIEW This adaptive HPVDD minimizes TPA6141 supply current while avoiding clipping and distortion. Because normal listening levels are below 200 mVRMS, HPVDD is most often at its lowest voltage. Thus, the TPA6141A2 has higher efficiency than traditional Class-AB headphone amplifiers. TPA6141A2 SLOS634 – MARCH 2009 .................................................................................................................................................................................................. www.ti.com INDUCTOR SELECTION The TPA6141A2 requires one inductor for its DC/DC converter. The following table lists recommended inductors. Inductors not shown on this table can be be used if they have similar performance characteritics. When selecting an inductor observe the following rules: • Lower DCR increases DC/DC converter efficiency. • The minimum working inductance should never be below 1 µH. • Include temperature and aging derating factors into the inductor value calculations. MANUFACTURER PART NUMBER TOKO MDT2012-CH2R2A LQM21PN2R2MC0D Murata LQH2MCN2R2M02L BRL2012T2R2M Taiyo Yuden BRC1608T2R2M GROUND SENSE FUNCTION PRODUCT PREVIEW The ground sense pin, SGND, reduces ground-loop noise when the audio output jack is connected to a different ground reference than codec and amplifier ground. Always connect the SGND pin to the headphone jack. This reduces output offset voltage and eliminates turn-on pop. Figure 27 shows how to connect SGND when an FM radio antenna function is implemented on the headphone wire. The nH coil and capacitor separate the RF signal from the audio GND signal. In this case, SGND is used to eliminate the offset voltage that is generated from the audio signal current and the RF coil low-frequency impedance. The voltage difference between SGND and AGND cannot be greater than ±300 mV. The amplifier performance degrades if the voltage difference between SGND and AGND is greater than ±300 mV. CODEC TPA6141A2 OUTR+ INR+ OUTR- INR- OUTL+ INL+ OUTL- INL- OUTR OUTL SGND EN GAIN Vbat 2.2 mH 2.2 mF EN GAIN AVDD SW HPVDD AGND HPVSS CPP CPN FM Tuner 2.2 mF nH coil 1mF Figure 27. Sense Ground HEADPHONE AMPLIFIERS Single-supply headphone amplifiers typically require dc-blocking capacitors to remove dc bias from their output voltage. The top drawing in Figure 28 illustrates this connection. If dc bias is not removed, large dc current will flow through the headphones which wastes power, clips the output signal, and potentially damages the headphones. These dc-blocking capacitors are often large in value and size. Headphone speakers have a typical resistance between 16 Ω and 32 Ω. This combination creates a high-pass filter with a cutoff frequency as shown in Equation 6, where RL is the load impedance, CO is the dc-block capacitor, and fC is the cutoff frequency. 12 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 www.ti.com .................................................................................................................................................................................................. SLOS634 – MARCH 2009 fC = 1 2pRLCO (6) For a given high-pass cutoff frequency and load impedance, the required dc-blocking capacitor is found as: 1 CO = 2pfCRL (7) Reducing fC improves low frequency fidelity and requires a larger dc-blocking capacitor. To achieve a 20 Hz cutoff with 16 Ω headphones, CO must be at least 500 µF. Large capacitor values require large packages, consuming PCB area, increasing height, and increasing cost of assembly. During start-up or shutdown the dc-blocking capacitor has to be charged or discharged. This causes an audible pop on start-up and power-down. Large dc-blocking capacitors also reduce audio output signal fidelity. Two different headphone amplifier architectures are available to eliminate the need for dc-blocking capacitors. The Capless amplifier architecture provides a reference voltage to the headphone connector shield pin as shown in the middle drawing of Figure 28. The audio output signals are centered around this reference voltage, which is typically half of the supply voltage to allow symmetrical output voltage swing. PRODUCT PREVIEW When using a Capless amplifier do not connect the headphone jack shield to any ground reference or large currents will result. This makes Capless amplifiers ineffective for plugging non-headphone accessories into the headphone connector. Capless amplifiers are useful only with floating GND headphones. Conventional CO VOUT CO VOUT GND Capless VOUT VOUT GND VBIAS DirectPath™ VDD VOUT GND VSS Figure 28. Amplifier Applications 13 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 SLOS634 – MARCH 2009 .................................................................................................................................................................................................. www.ti.com The DirectPath™ amplifier architecture operates from a single supply voltage and uses an internal charge pump to generate a negative supply rail for the headphone amplifier. The output voltages are centered around 0 V and are capable of positive and negative voltage swings as shown in the bottom drawing of Figure 28. DirectPath amplifiers require no output dc-blocking capacitors. The headphone connector shield pin connects to ground and will interface with headphones and non-headphone accessories. The TPA6141A2 is a DirectPath amplifier. ELIMINATING TURN-ON POP AND POWER SUPPLY SEQUENCING The TPA6141A2 has excellent noise and turn-on / turn-off pop performance. It uses an integrated click-and-pop suppression circuit to allow fast start-up and shutdown without generating any voltage transients at the output pins. Typical start-up time from shutdown is 5 ms. DirectPath technology keeps the output dc voltage at 0 V even when the amplifier is powered up. The DirectPath technology together with the active pop-and-click suppression circuit eliminates audible transients during start up and shutdown. Use input coupling capacitors to ensure inaudible turn-on pop. Activate the TPA6141A2 after all audio sources have been activated and their output voltages have settled. On power-down, deactivate the TPA6141A2 before deactivating the audio input source. The EN pin controls device shutdown: Set to 0.6 V or lower to deactivate the TPA6141A2; set to 1.3 V or higher to activate. RF AND POWER SUPPLY NOISE IMMUNITY PRODUCT PREVIEW The TPA6141A2 employs a new differential amplifier architecture to achieve high power supply noise rejection and RF noise rejection. RF and power supply noise are common in modern electronics. Although RF frequencies are much higher than the 20 kHz audio band, signal modulation often falls in-band. This, in turn, modulates the supply voltage, allowing a coupling path into the audio amplifier. A common example is the 217 Hz GSM frame-rate buzz often heard from an active speaker when a cell phone is placed nearby during a phone call. The TPA6141A2 has excellent rejection of power supply and RF noise, preventing audio signal degradation. INPUT COUPLING CAPACITORS Input coupling capacitors block any dc bias from the audio source and ensure maximum dynamic range. Input coupling capacitors also minimize TPA6141A2 turn-on pop to an inaudible level. The input capacitors are in series with TPA6141A2 internal input resistors, creating a high-pass filter. Equation 8 calculates the high-pass filter corner frequency. The input impedance, RIN, is dependent on device gain. Larger input capacitors decrease the corner frequency. See the Operating Characteristics table for input impedance values. 1 fC = 2pRINCIN (8) For a given high-pass cutoff frequency, the minimum input coupling capacitor is found as: 1 CIN = 2pfCRIN (9) Example: Design for a 20 Hz corner frequency with a TPA6141A2 gain of +6 dB. The Operating Characteristics table gives RIN as 13.2 kΩ. Equation 9 shows the input coupling capacitors must be at least 0.6 µF to achieve a 20 Hz high-pass corner frequency. Choose a 0.68 µF standard value capacitor for each TPA6141A2 input (X5R material or better is required for best performance). Input capacitors can be removed provided the TPA6141A2 inputs are driven differentially with less than ±1 VRMS and the common-mode voltage is within the input common-mode range of the amplifier. Without input capacitors turn-on pop performance may be degraded and should be evaluated in the system. 14 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 www.ti.com .................................................................................................................................................................................................. SLOS634 – MARCH 2009 CHARGE PUMP FLYING CAPACITOR AND HPVSS CAPACITOR PRODUCT PREVIEW The TPA6141A2 uses a built-in charge pump to generate a negative voltage supply for the headphone amplifiers. The charge pump flying capacitor connects between CPP and CPN. It transfers charge to generate the negative supply voltage. The HPVSS capacitor must be at least equal in value to the flying capacitor to allow maximum charge transfer. Use low equivalent-series-resistance (ESR) ceramic capacitors (X5R material or better is required for best performance) to maximize charge pump efficiency. Typical values are 1 µF to 2.2 µF for the HPVSS and flying capacitors. Although values down to 0.47 µF can be used, total harmonic distortion (THD) will increase. 15 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 SLOS634 – MARCH 2009 .................................................................................................................................................................................................. www.ti.com POWER SUPPLY AND HPVDD DECOUPLING CAPACITORS AND CONNECTIONS The TPA6141A2 DirectPath headphone amplifier requires adequate power supply decoupling to ensure that output noise and total harmonic distortion (THD) remain low. Use good low equivalent-series-resistance (ESR) ceramic capacitors (X5R material or better is required for best performance). Place a 2.2 µF capacitor within 5 mm of the AVDD pin. Reducing the distance between the decoupling capacitor and AVDD minimizes parasitic inductance and resistance, improving TPA6141A2 supply rejection performance. Use 0402 or smaller size capacitors if possible. Ensure that the ground connection of each of the capacitors has a minimum length return path to the device. Failure to properly decouple the TPA6141A2 may degrade audio or EMC performance. For additional supply rejection, connect an additional 10 µF or higher value capacitor between AVDD and ground. This will help filter lower frequency power supply noise. The high power supply rejection ratio (PSRR) of the TPA6141A2 makes the 10 µF capacitor unnecessary in most applications. Connect a 2.2 µF capacitor between HPVDD and ground. This ensures the amplifier internal bias supply remains stable and maximizes headphone amplifier performance. WARNING: DO NOT connect HPVDD directly to AVDD or an external supply voltage. The voltage at HPVDD is generated internally. Connecting HPVDD to an external voltage can damage the device. PRODUCT PREVIEW LAYOUT RECOMMENDATIONS GND CONNECTIONS The SGND pin is an input reference and must be connected to the headphone ground connector pin. This ensures no turn-on pop and minimizes output offset voltage. Do not connect more than ±0.3 V to SGND. AGND is a power ground. Connect supply decoupling capacitors for AVDD, HPVDD, and HPVSS to AGND. BOARD LAYOUT In making the pad size for the WCSP balls, it is recommended that the layout use non solder mask defined (NSMD) land. With this method, the solder mask opening is made larger than the desired land area, and the opening size is defined by the copper pad width. Figure 36 and Table 5 shows the appropriate diameters for a WCSP layout. The TPA2016D2 evaluation module (EVM) layout is shown in the next section as a layout example. 16 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. 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