FDMW2512NZ Monolithic Common Drain N-Channel 2.5V Specified PowerTrench® MOSFET General Description Features This dual N-Channel MOSFET has been designed using Fairchild Semiconductor’s advanced Power Trench process to optimize the RDS(ON) @ VGS = 2.5v on special MicroFET lead frame with all the drains on one side of the package. • 7.2 A, 20 V Applications • Low Profile – 0.8 mm maximum – in the new RDS(ON) = 26 mΩ @ VGS = 4.5 V RDS(ON) = 34 mΩ @ VGS = 2.5 V • ESD protection Diode(note 3) package MicroFET 2 x 5 mm • Li-Ion Battery Pack PIN 1 S1 S1 G1 S2 S2 G2 VDSS VGSS ID PD 4 S2 5 S2 6 Q2 3 G1 2 S1 Q1 1 S1 Bottom Drain Contact TA=25oC unless otherwise noted Parameter Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous – Pulsed Power Dissipation (Steady State) (Note 1a) (Note 1a) (Note 1b) TJ, TSTG G2 MLP 2x5 Absolute Maximum Ratings Symbol Bottom Drain Contact Operating and Storage Junction Temperature Range Ratings Units 20 ±12 7.2 28 2.2 0.8 –55 to +150 V V A W °C Thermal Characteristics RθJA RθJA Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Ambient (Note 1a) (Note 1b) 55 145 °C/W Package Marking and Ordering Information Device Marking 2512Z ©2005 Fairchild Semiconductor Corporation Device FDMW2512NZ Reel Size 13’’ Tape width 12mm Quantity 3000 units FDMW2512NZ Rev D FDMW2512NZ October 2005 Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS ∆BVDSS ∆TJ IDSS IGSS Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate–Body Leakage, On Characteristics VGS = 0 V, ID = 250 µA 20 ID = 250 µA, Referenced to 25°C V 12 mV/°C 1 ±10 µA µA 0.8 –3 1.5 V mV/°C VGS = 4.5 V, ID = 7.2 A ID = 7.2 A VGS = 4.0 V, ID = 6.4 A VGS = 3.1 V, ID = 6.4 A VGS = 2.5 V, VGS = 4.5 V, ID = 7.2 A, TJ=125°C VDS = 5 V, ID =7.2 A 19 20 22 23 25 30 26 28 32 34 39 mΩ VDS = 15 V, f = 1.0 MHz 740 pF 165 pF 127 1.4 pF VDS = 16 V, VGS = ±12 V, VGS = 0 V VDS = 0 V (Note 2) ID = 250 µA VDS = VGS, ID = 250 µA, Referenced to 25 C VGS(th) ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance gFS Forward Transconductance 0.5 S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss RG Reverse Transfer Capacitance Gate Resistance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time V GS = 0 V, f = 1.0 MHz Ω (Note 2) VDD = 10 V, VGS = 4.5 V, ID = 1 A, RGEN = 6 Ω 8 16 ns 10 20 ns td(off) Turn–Off Delay Time 16 29 ns tf Turn–Off Fall Time 13 23 ns 9 13 Qg Total Gate Charge Qgs Gate–Source Charge Qgd Gate–Drain Charge VDS = 10 V, VGS = 4.5 V ID = 7.2 A, nC 1 nC 3 nC Drain–Source Diode Characteristics VSD trr Drain–Source Diode Forward Voltage Diode Reverse Recovery Time Qrr Diode Reverse Recovery Charge VGS = 0 V, IS = 1.8 A IF = 7.2 A, dIF/dt = 100 A/µs (Note 2) 0.7 1.2 V 15 nS 4 nC Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 55°C/W when mounted on a 1in2 pad of 2 oz copper b) 145°C/W when mounted on a minimum pad of 2 oz copper Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% 3. The diode connected between the gate and source serves only as protection againts ESD. No gate overvoltage rating is implied. FDMW2512NZ Rev D FDMW2512NZ Electrical Characteristics FDMW2512NZ Typical Characteristics 50 VGS = 4.5V 2.4 3.0V ID, DRAIN CURRENT (A) 3.5V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 45 2.5V 40 35 30 25 2.0V 20 1.8V 15 10 5 2.2 2 VGS = 1.8V 1.8 1.6 2.0V 1.4 2.5V 1.2 3.1V 4.5V 0.8 0 0 1 2 3 0 4 5 10 Figure 1. On-Region Characteristics. 20 25 30 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.074 1.6 ID = 7.2A VGS = 4.5V ID = 3.6A RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 15 ID, DRAIN CURRENT (A) VDS, DRAIN-SOURCE VOLTAGE (V) 1.4 1.2 1 0.8 0.6 0.066 0.058 0.05 TA = 125oC 0.042 0.034 0.026 TA = 25oC 0.018 0.01 -50 -25 0 25 50 75 100 125 150 1 2 o TJ, JUNCTION TEMPERATURE ( C) 3 4 5 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 30 TA = -55oC 25oC IS, REVERSE DRAIN CURRENT (A) VDS = 5V 25 ID, DRAIN CURRENT (A) 4.0V 1 125oC 20 15 10 5 VGS = 0V 10 1 TA = 125oC 0.1 25oC 0.01 -55oC 0.001 0.0001 0 0.5 1 1.5 2 2.5 VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 3 0 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDMW2512NZ Rev D FDMW2512NZ Typical Characteristics 1200 ID = 7.2A f = 1MHz VGS = 0 V 10V VDS = 5V 1000 4 CAPACITANCE (pF) VGS, GATE-SOURCE VOLTAGE (V) 5 15V 3 2 1 Ciss 800 600 400 Coss 200 Crss 0 0 0 2 4 6 8 10 12 0 4 Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics. 16 20 50 P(pk), PEAK TRANSIENT POWER (W) RDS(ON) LIMIT 100us 10 1ms 10ms 100ms 1s 1 10s DC VGS = 4.5V SINGLE PULSE RθJA = 145oC/W 0.1 TA = 25oC 0.01 0.1 1 10 100 SINGLE PULSE RθJA = 145°C/W TA = 25°C 40 30 20 10 0 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 12 Figure 8. Capacitance Characteristics. 100 ID, DRAIN CURRENT (A) 8 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) * RθJA RθJA =145 °C/W 0.2 0.1 P(pk) 0.1 t1 0.05 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 0.02 0.01 SINGLE PULSE 0.01 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDMW2512NZ Rev D FDMW2512NZ Dimensional Outline and Pad Layout FDMW2512NZ Rev D TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FAST® ActiveArray™ FASTr™ Bottomless™ FPS™ Build it Now™ FRFET™ CoolFET™ GlobalOptoisolator™ CROSSVOLT™ GTO™ DOME™ HiSeC™ EcoSPARK™ I2C™ E2CMOS™ i-Lo™ EnSigna™ ImpliedDisconnect™ FACT™ IntelliMAX™ FACT Quiet Series™ Across the board. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I17