FAIRCHILD FDW2509

FDW2509NZ
Common Drain N-Channel 2.5V Specified PowerTrench MOSFET
General Description
Features
This N-Channel 2.5V specified MOSFET is a rugged
gate version of Fairchild’s Semiconductor’s advanced
PowerTrench process. It has been optimized for power
management applications with a wide range of gate drive
voltage (2.5V – 12V).
•
7.1 A, 20 V. RDS(ON) = 20 mΩ @ VGS = 4.5 V
RDS(ON) = 26 mΩ @ VGS = 2.5 V
•
Extended VGSS range (±12V) for battery applications
•
ESD protection diode (note 3)
•
High performance trench technology for extremely
low RDS(ON)
•
Low profile TSSOP-8 package
Applications
Li-Ion Battery Pack
G2
S2
S2
D2
G1
S1
S1
D1
TSSOP-8
Pin 1
Absolute Maximum Ratings
Symbol
TA=25oC unless otherwise noted
Ratings
Units
VDSS
Drain-Source Voltage
Parameter
20
V
VGSS
Gate-Source Voltage
±12
ID
Drain Current
– Continuous
7.1
(Note 1a)
– Pulsed
PD
Power Dissipation for Single Operation
TJ, TSTG
A
30
(Note 1a)
1.6
(Note 1b)
1.1
W
–55 to +150
°C
(Note 1a)
77
°C/W
(Note 1b)
114
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
2509NZ
FDW2509NZ
13’’
12mm
3000 units
2003 Fairchild Semiconductor Corporation
FDW2509NZ Rev B1 (W)
FDW2509NZ
February 2003
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min
Typ
Max Units
Off Characteristics
ID = 250 µA
BVDSS
Drain–Source Breakdown Voltage
VGS = 0 V,
∆BVDSS
∆TJ
IDSS
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
ID = 250 µA, Referenced to 25°C
IGSS
Gate–Body Leakage
VGS = ±12 V, VDS = 0 V
On Characteristics
VDS = 16 V,
20
V
11
VGS = 0 V
mV/°C
1
µA
± 10
µA
(Note 2)
ID = 250 µA
VGS(th)
Gate Threshold Voltage
VDS = VGS,
∆VGS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID = 250 µA, Referenced to 25°C
–3
VGS = 4.5 V, ID = 7.1 A
VGS = 2.5 V, ID = 6.2 A
VGS = 4.5 V, ID = 7.1A, TJ=125°C
15
18
20
0.6
0.8
1.5
V
mV/°C
20
26
29
15
mΩ
ID(on)
On–State Drain Current
VGS = 4.5 V,
VDS = 5 V
gFS
Forward Transconductance
VDS = 5 V,
ID = 7.1 A
36
A
VDS = 10 V,
f = 1.0 MHz
V GS = 0 V,
1263
pF
327
pF
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
RG
Gate Resistance
Switching Characteristics
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
td(off)
Turn–Off Delay Time
tf
Qg
Qgs
Qgd
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
179
pF
VGS = 15 mV, f = 1.0 MHz
1.9
Ω
VDD = 10 V,
VGS = 4.5 V,
11
20
15
27
ns
27
43
ns
12
13
2
4
22
19
ns
nC
nC
nC
1.3
A
1.2
V
(Note 2)
VDS = 10 V,
VGS = 4.5 V
ID = 1 A,
RGEN = 6 Ω
ID = 7.1 A,
ns
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
VSD
trr
Drain–Source Diode Forward
Voltage
Diode Reverse Recovery Time
Qrr
Diode Reverse Recovery Charge
VGS = 0 V,
IS = 1.3 A
IF = 7.1 A,
diF/dt = 100 A/µs
(Note 2)
20
nS
14
nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) RθJA is 77°C/W (steady state) when mounted on a 1 inch² copper pad on FR-4.
b) RθJA is 114 °C/W (steady state) when mounted on a minimum copper pad on FR-4.
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
FDW2509NZ Rev. B1 (W)
FDW2509NZ
Electrical Characteristics
FDW2509NZ
Typical Characteristics
2.5V
3.5V
25
ID, DRAIN CURRENT (A)
1.8
VGS = 4.5V
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
30
2.0V
20
1.8V
15
10
5
VGS = 2.0V
1.6
1.4
2.5V
1.2
3.0V
3.5V
4.5V
1
0.8
0
0
1
2
3
0
4
5
10
Figure 1. On-Region Characteristics.
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
1.4
1.2
1
0.8
0.6
30
0
25
50
75
100
125
ID = 3.6A
0.04
TA = 125oC
0.03
o
TA = 25 C
0.02
0.01
150
1
2
o
TJ, JUNCTION TEMPERATURE ( C)
30
5
100
VGS = 0V
IS, REVERSE DRAIN CURRENT (A)
125oC
25
4
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
25o
TA = -55oC
VDS = 5V
3
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
ID, DRAIN CURRENT (A)
25
0.05
ID = 7.1A
VGS = 4.5V
-25
20
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.6
-50
15
ID, DRAIN CURRENT (A)
VDS, DRAIN-SOURCE VOLTAGE (V)
20
15
10
5
10
TA = 125oC
1
25oC
0.1
-55oC
0.01
0.001
0.0001
0
0.5
1
1.5
2
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
2.5
0
0.2
0.4
0.6
0.8
1
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDW2509NZ Rev. B1 (W)
FDW2509NZ
Typical Characteristics
2000
VDS = 5V
ID = 7.1A
f = 1MHz
VGS = 0 V
10V
4
15V
CAPACITANCE (pF)
VGS, GATE-SOURCE VOLTAGE (V)
5
3
2
1500
CISS
1000
COSS
500
1
CRSS
0
0
0
4
8
12
0
16
4
Figure 7. Gate Charge Characteristics.
12
16
20
Figure 8. Capacitance Characteristics.
50
100
P(pk), PEAK TRANSIENT POWER (W)
RDS(ON) LIMIT
100us
1ms
10
10ms
100ms
1s
10s
DC
1
VGS = 4.5V
SINGLE PULSE
RθJA = 114oC/W
0.1
TA = 25oC
0.01
0.1
1
10
SINGLE PULSE
RθJA = 114°C/W
TA = 25°C
40
30
20
10
0
0.001
100
0.01
0.1
1
10
100
1000
t1, TIME (sec)
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
ID, DRAIN CURRENT (A)
8
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) * RθJA
RθJA =114 °C/W
0.2
0.1
0.1
0.05
P(pk)
0.02
0.01
t1
0.01
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDW2509NZ Rev. B1 (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
FACT™
ActiveArray™
FACT Quiet Series™
Bottomless™
FASTâ
CoolFET™
FASTr™
CROSSVOLT™ FRFET™
DOME™
GlobalOptoisolator™
EcoSPARK™
GTO™
E2CMOSTM
HiSeC™
EnSignaTM
I2C™
Across the board. Around the world.™
The Power Franchise™
Programmable Active Droop™
ImpliedDisconnect™ PACMAN™
POP™
ISOPLANAR™
Power247™
LittleFET™
PowerTrenchâ
MicroFET™
QFET™
MicroPak™
QS™
MICROWIRE™
QT Optoelectronics™
MSX™
Quiet Series™
MSXPro™
RapidConfigure™
OCX™
RapidConnect™
OCXPro™
SILENT SWITCHERâ
OPTOLOGICâ
SMART START™
OPTOPLANAR™
SPM™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogicâ
TruTranslation™
UHC™
UltraFETâ
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
2. A critical component is any component of a life
1. Life support devices or systems are devices or
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I2