ADVANCE TECHNICAL INFORMATION HiPerFETTM MOSFET IXFC 60N20 ISOPLUS220TM Electrically Isolated Back Surface N-Channel Enhancement Mode High dv/dt, Low trr, HDMOSTM Family Symbol Test Conditions Maximum Ratings VDSS TJ = 25°C to 150°C 200 V VDGR TJ = 25°C to 150°C; RGS = 1 MΩ 200 V VGS Continuous ±20 V VGSM Transient ±30 V ID25 TC = 25°C 60 A IDM TC = 25°C, pulse width limited by TJM 240 A IAR TC = 25°C 60 A EAR EAS TC = 25°C TC = 25°C 30 1.0 mJ J dv/dt IS ≤ IDM, di/dt ≤ 100 A/µs, VDD ≤ VDSS, TJ ≤ 150°C, RG = 2 Ω 5 V/ns 230 W -55 ... +150 °C TJM 150 °C Tstg -55 ... +150 °C 300 °C 3 g PD TC = 25°C TJ TL 1.6 mm (0.062 in.) from case for 10 s Weight Symbol Test Conditions VDSS V GS = 0 V, ID = 250 µA VGS(th) V DS = VGS, ID = 4 mA IGSS VGS = ±20 VDC, VDS = 0 IDSS V DS = VDSS VGS = 0 V RDS(on) V GS = 10 V, ID = IT Notes 1, 2 © 2001 IXYS All rights reserved Characteristic Values (TJ = 25°C, unless otherwise specified) min. typ. max. 200 2 V 4 ±100 TJ = 25°C TJ = 125°C V nA 25 µA 1 mA 33 mΩ VDSS ID25 RDS(on) trr = 200 = 60 = 33 ≤ 250 V A Ω mΩ ns ISOPLUS 220TM G D S G = Gate, S = Source Isolated back surface* D = Drain, * Patent pending Features l Silicon chip on Direct-Copper-Bond substrate - High power dissipation - Isolated mounting surface - 2500V electrical isolation l Low drain to tab capacitance(<35pF) l Low RDS (on) l Rugged polysilicon gate cell structure l Unclamped Inductive Switching (UIS) rated l Fast intrinsicRectifier Applications l DC-DC converters l Batterychargers l Switched-mode and resonant-mode power supplies l DC choppers l AC motor control Advantages l Easy assembly: no screws or isolation foils required l Space savings l High power density l Low collector capacitance to ground (low EMI) 98843 (6/01) IXFC 60N20 Symbol Test Conditions gfs V DS = 10 V; ID = IT Notes 1, 2 Characteristic Values (TJ = 25°C, unless otherwise specified) min. typ. max. 30 Ciss Coss 40 S 5200 pF 880 pF 260 pF V GS = 0 V, VDS = 25 V, f = 1 MHz Crss 38 ns tr V GS = 10 V, VDS = 0.5 VDSS, 63 ns td(off) ID = 0.5 ID25, RG = 2.5 Ω (External) 85 ns 26 ns td(on) tf 155 nC Qgs V GS = 10 V, VDS = 0.5 VDSS, ID = IT 38 nC Qgd Notes 2 55 nC Qg(on) 0.90 RthJC Source-Drain Diode Test Conditions IS V GS = 0 V ISM Repetitive; pulse width limited by TJM VSD IF = IS, VGS = 0 V, Note 1 t rr IRM K/W Characteristic Values (TJ = 25°C, unless otherwise specified) min. typ. max. Symbol QRM K/W 0.30 RthCK IF = 25A -di/dt = 100 A/µs, VR = 50 V ISOPLUS220 OUTLINE 60 A 240 A 1.5 V 250 ns 0.7 µC 8 A Note: All terminals are solder plated. 1 - Gate 2 - Drain 3 - Source Note: 1. Pulse test, t ≤ 300 µs, duty cycle d ≤ 2 % 2. IT = 30A IXYS reserves the right to change limits, test conditions, and dimensions. IXYS MOSFETS and IGBTs are covered by one or more of the following U.S. patents: 4,835,592 4,850,072 4,881,106 4,931,844 5,017,508 5,034,796 5,049,961 5,063,307 5,187,117 5,237,481 5,486,715 5,381,025