TI TPD3F303DPVR

TPD3F303
www.ti.com
SLVSAM5 – JANUARY 2011
EMI FILTER WITH INTEGRATED VCC CLAMP FOR SIM CARD INTERFACE
Check for Samples: TPD3F303
FEATURES
1
•
•
•
•
•
Bidirectional EMI/RFI Filtering and Line
Termination with Integrated ESD Protection
Robust ESD Protection Exceeds IEC 61000-4-2
(Level 4)
– ±15-kV Human-Body Model (HBM)
– ±15-kV IEC 61000-4-2 (Contact Discharge)
– ±15-kV IEC 61000-4-2 (Air-Gap Discharge)
Breakdown voltage 6-V
Low Noise C-R-C Filter Topology
Integrated VCC Clamp Eliminates the Need for
External ESD Protection
Space Saving DPV (0.5-mm Pitch), DQD
Packages (0.4-mm Pitch)
TPD6F303 PACKAGE
(TOP VIEW)
DATA1_Out
1
8
DATA1_In
CLK_Out
2
7
CLK_In
DATA2_Out
3
6
DATA2_In
NC
4
5
VCC
TPD3F303
2.1-mm x 1.6-mm DPV (0.5-mm Pitch)
1.7-mm x 1.35-mm DQD (0.4-mm Pitch)
APPLICATIONS
Mobile handsets
PDAs
Video Consoles
Portable Computers
SIM Controller
4
5
VCC
GND
3
6
Reset
VPP
7
CLK
I/O
NC
NC
2
1
GND
•
•
•
•
GND
•
8
Figure 1. Board Layout with TPD3F303 at the SIM
Card Interface
DESCRIPTION/ORDERING INFORMATION
The TPD3F303 is a 3-ch integrated EMI filter for SIM interface. This device integrates a VCC clamp to provide
system level ESD protection at the VCC line. Termination resistor value of 47 Ω is included on the CLK line, while
a 100 Ω termination is employed at the DATA and RST line.
The low-pass filter arrays reduce EMI emissions and provide system level ESD protection. Because of its small
package and easy-to-use pin assignments, the TPD3F303 filter is suitable for a wide array of applications such
as mobile handsets, PDAs, video consoles, notebook computers, etc.
The TPD3F303 is designed to suppress EMI/RFI noise in systems subjected to electromagnetic interferences.
These filter series include an ESD protection circuitry which prevents damage to the application when subjected
to ESD stress far exceeding IEC 61000-4-2 (Level 4). The TPD3F303 is specified for –40°C to 85°C operation.
ORDERING INFORMATION
PACKAGE (1)
TA
–40°C to 85°C
(1)
(2)
(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
8 – DPV
Tape and reel
TPD3F303DPVR
6SS
8 – DQD
Tape and reel
TPD3F303DQDR
6SS
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
TPD3F303
SLVSAM5 – JANUARY 2011
www.ti.com
CIRCUIT DIAGRAMS
45 Ω
Pin 7
Pin 5
Pin 2
100 Ω
Pin 6,8
GND
GND
GND
Schematic for VCC
Schematic for CLK Line
Pin 1,3
Schematic for DATA1, DATA2 Lines
TERMINAL FUNCTIONS
TERMINAL
NAME
DPV/DQD
PIN NO.
DATAx_IN,
DATAx_OUT
1, 3, 6, 8
CLK_OUT,
CLK_IN V
2, 7
VCC
5
TYPE
DESCRIPTION
Data and Rest signals Input, Output pins. The DATA1 and DATA2 are symmetric circuits.
Input, Output
They can be used interchangeably for either DATA or RESET pins based off board layout
Pins
scheme.
Input, Output
Clock Input and Output signals.
Pins
Power Clamp ESD Clamp circuit for the VCC pin.
NC
4
No Connect
GND
Central ground
Pad
Ground
Not connected to any internal circuit. Leave this pin floating.
Ground connection for the EMI filter. It is very important to connect the device GND to the
printed circuit board ground plane through Vias directly under the package.
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
MIN
IO voltage tolerance
IO pins
TA
Operating free-air temperature range
Tstg
Storage temperature range
(1)
MAX
UNIT
5.5
V
–40
85
°C
–55
155
°C
IEC 61000-4-2 Contact Discharge
IO pins
±15
KV
IEC 61000-4-2 Air-gap Discharge
IO pins
±15
KV
Human Body Model ESD
IO pins
±15
KV
Stresses beyond those listed under "ABSOLUTE MAXIMUM RATINGS" may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of
the specifications is not implied. Exposure to absolute maximum-rated conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Vclamp
Clamp voltage
IIO = ±2 A
IO pin to ground
±10
V
II
Leakage current
RPU = Open
IO pin to ground
0.1
µA
RCLK
CLK series resistors
Ω
RDAT_RST
Data/RST series resistors
CTotal
IO Capacitance
VIO = 0 V
VBR
Break-down Voltage
IIO = 1 mA
F–3dB
–3 dB BW for DATA/RESET line
ZSOURCE = 50 Ω
ZLOAD = 50 Ω
2
IO Pins to GND
Submit Documentation Feedback
40
47
55
85
100
115
Ω
16
20
24
pF
6
V
294
MHz
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): TPD3F303
TPD3F303
www.ti.com
SLVSAM5 – JANUARY 2011
ELECTRICAL CHARACTERISTICS (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
F–3dB
–3 dB BW for CLK line
TEST CONDITIONS
ZSOURCE = 50 Ω
ZLOAD = 50 Ω
MIN
TYP
MAX
308
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): TPD3F303
UNIT
MHz
3
TPD3F303
SLVSAM5 – JANUARY 2011
www.ti.com
TYPICAL OPERATING CHARACTERISTICS
100
1.0
90
0.8
80
0.6
IIO - Input Offset Current - mA
IIO - Input Offset Current - pA
VIO = 2.5 V
70
60
50
40
0.2
0.0
-0.2
30
-0.4
20
-0.6
10
0
-40
0.4
tA = 25°C
-0.8
-15
10
35
60
TA - Free-Air Temperature - °C
-1.0
-2
85
-1
0
Figure 2. IIO vs Temperature, VIO = 2.5V
1
2
3
4
5
6
VIO - Input Offset Voltage - V
7
8
Figure 3. IIO vs VIO
-0
0
0 V Bias
-10
-5
-20
-10
DATA
CLK
-30
CLK_IN to DATA2_OUT
-40
-15
Loss - dB
Loss - dB
-50
-20
-25
-30
-60
-70
-80
-90
-35
-100
-40
-110
DATA1_IN to DATA2_OUT
-120
DATA1_IN to CLK_OUT
-45
-130
-50
1.0E+05
1.0E+06
1.0E+07 1.0E+08
f - Frequency - Hz
1.0E+09
1.0E+10
-140
1.0E+05
1.0E+06
Figure 4. Frequency Response Data (0 V Bias)
4
Submit Documentation Feedback
1.0E+07 1.0E+08
f - Frequency - Hz
1.0E+09
1.0E+10
Figure 5. Channel-to-Channel Crosstalk
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): TPD3F303
TPD3F303
www.ti.com
SLVSAM5 – JANUARY 2011
TYPICAL OPERATING CHARACTERISTICS (continued)
35
80
TA = 25°C
60
DATA_In
40
30
DATA_Out
20
0
20
Amplitude - V
Capacitance - pF
25
Data
CLK
15
-20
-40
-60
-80
-100
-120
10
-140
-160
VCC
5
-180
-200
0
0
0.5
1
1.5
2
2.5 3 3.5
VBIAS - V
4
4.5
5
-220
0
5.5
25
220
80
200
60
180
40
160
20
140
0
120
DATA_In
100
80
60
DATA_Out
40
-160
-40
-180
-60
-200
175
200
DATA_Out
-80
-140
150
DATA_In
-100
0
75
100 125
t - Time - nS
200
-60
-20
50
175
-40
-120
25
150
-20
20
-80
0
75
100 125
t - Time - nS
Figure 7. IEC Clamping Waveforms
–15 kV Contact, DATA1_In Stressed
Amplitude - V
Amplitude - V
Figure 6. Capacitance vs VBIAS, tA = 25°C
50
-220
0
25
Figure 8. IEC Clamping Waveforms
+15 kV Contact, DATA1_In Stressed
50
75
100 125
t - Time - nS
150
175
Figure 9. IEC Clamping Waveforms
–15 kV Contact, CLK_In Stressed
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): TPD3F303
200
5
TPD3F303
SLVSAM5 – JANUARY 2011
www.ti.com
TYPICAL OPERATING CHARACTERISTICS (continued)
220
200
180
160
Amplitude - V
140
120
DATA_In
100
80
60
DATA_Out
40
20
0
-20
-40
-60
-80
0
6
25
50
75
100 125 150 175
t - Time - nS
Figure 10. IEC Clamping Waveforms
+15 kV Contact, CLK_In Stressed
Submit Documentation Feedback
200
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): TPD3F303
PACKAGE OPTION ADDENDUM
www.ti.com
3-Mar-2011
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
TPD3F303DPVR
ACTIVE
USON
DPV
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TPD3F303DQDR
ACTIVE
WSON
DQD
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
(3)
Samples
(Requires Login)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Jan-2011
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TPD3F303DPVR
USON
DPV
8
3000
180.0
8.4
1.84
2.32
0.78
4.0
8.0
Q1
TPD3F303DQDR
WSON
DQD
8
3000
180.0
8.4
1.65
2.0
0.95
4.0
8.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Jan-2011
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPD3F303DPVR
USON
DPV
8
3000
202.0
201.0
28.0
TPD3F303DQDR
WSON
DQD
8
3000
202.0
201.0
28.0
Pack Materials-Page 2
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