SLIS012 − D3378, FEBRUARY 1990
•
•
•
•
•
•
•
•
•
•
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Output Voltage up to 60 V
Four Output Channels of 700-mA Nominal
Current Per Channel
Pulsed Current . . . 3 A Per Channel
Low rDS(on) . . . 0.5 Ω Typ
Avalanche Energy . . . 50 mJ
Thermal Shutdown Protection With Fault
(Overtemperature) Output
NE Package Designed for Heat Sinking
Integral Output Clamp Diodes
Input Transparent Latches for Data Storage
Asynchronous Clear to Turn off All Outputs
Output Parallel Capability for Increased
Current Drive up to 12-A Total Pulsed Load
Current
NE PACKAGE
(TOP VIEW)
1,4 CLAMP
ENBL
1 IN
1 DRAIN
HEAT SINK
AND GND
2 DRAIN
2 IN
VCC
F
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
CLR
LGND
4 IN
4 DRAIN
HEAT SINK
AND GND
3 DRAIN
3 IN
VDD
2,3 CLAMP
FUNCTION TABLE
(each channel)
FUNCTION
description
Normal
Operation
The TPIC2406 is a monolithic, high-voltage,
high-current, quadruple power driver designed for
use in systems that require high load power. The
device contains built-in high-speed output clamp
diodes for inductive transient protection. Power
driver applications include lamps, relays,
solenoids, and dc stepping motors.
Thermal
Shutdown
H = high-level,
INPUTS
ENBL CLR
OUTPUT
FAULT
IN
Y
F
X
H
H
H
L
H
H
H
H
L
H
H
L
X
L
L
L
H
H
X
Q0
X
X
X
H
L = low-level,
X = irrelevant
The device features four inverting open-drain outputs, each controlled by an input storage latch with common
clear and enable controls. All inputs accept standard TTL- and CMOS-logic levels. The CLR function is
asynchronous and turns all four outputs off regardless of data inputs. Taking ENBL low puts the input latch into
a transparent mode, allowing the data inputs to affect the output. In this state, all four outputs are held off while
CLR is low, but return to the stages on the data inputs when CLR goes high. When ENBL is taken high, the latch
is put into a storage mode and the last state of the data inputs is held in the latches. If CLR is taken low, the data
in the latches is cleared and all outputs are turned off. If CLR is taken high again, ENBL must be cycled low to
read new data into the latch.
Copyright 1990, Texas Instruments Incorporated
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#'$#1 "** (""!'#'$,
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2−1
SLIS012 − D3378, FEBRUARY 1990
logic symbol†
20
CLR
ENBL
R
[TEMP
SHUTDOWN]
C1
2
10
4
1 IN
3
1D
18
1
7
2 IN
8
14
3 IN
1 DRAIN
CLAMP
17
4 IN
F
13
11
4 DRAIN
1,4 CLAMP
2 DRAIN
3 DRAIN
2,3 CLAMP
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
VDD
VCC
12
Voltage
Regulator
9
Undervoltage
Detect
Thermal
Shutdown
4
1
CLR
20
2
ENBL
1 IN
2 IN
3 IN
4 IN
LGND
3
R
Thermal
Shutdown
C1
7
1,4 CLAMP
2 DRAIN
11
2,3 CLAMP
1D
Thermal
Shutdown
8
14
3 DRAIN
13
18
Thermal
Shutdown
19
17
5,6,15,16
10
2−2
1 DRAIN
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4 DRAIN
GND
F
SLIS012 − D3378, FEBRUARY 1990
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT
TYPICAL OF ALL DRAIN OUTPUTS
VCC
CLAMP
Voltage
Regulator
DRAIN
Input
GND
GND
absolute maximum ratings over −40°C to 125°C case temperature range (unless otherwise noted)
Logic supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Power MOSFET driver supply voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V
Logic input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Power MOSFET drain-source voltage, VDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V
Output voltage at F, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Clamp-diode voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V
Continuous source-drain diode anode current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.25 A
Pulsed source-drain diode anode current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 A
Pulsed drain current, each output, all outputs on, ID1 = ID2 = ID3 = ID4, TA = 25°C
(see Note 2 and Figures 5 through 8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 A
Continuous drain current, each output, all outputs on, ID1 = ID2 = ID3 = ID4, TA = 25°C . . . . . . . . . . 770 mA
Peak drain current, single output, IDM, TA = 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.5 A
Single-pulse avalanche energy, EAS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mJ
Continuous total dissipation at or below 25°C free-air temperature (see Note 4) . . . . . . . . . . . . . . . . . . 2.5 W
Continuous total dissipation at or below 100°C case temperature (see Note 4) . . . . . . . . . . . . . . . . . . . . . 6 W
Operating junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 150°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 150°C
Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
NOTES: 1.
2.
3.
4.
All voltage values are with respect to the five ground (GND and LGND) terminals connected together.
Pulse duration = 10 ms, duty cycle = 6%.
Pulse duration ≤ 100 µs, duty cycle ≤ 2%.
For operation above 25°C free-air temperature, derate linearly at the rate of 20 mW/°C. For operation above 100°C case temperature,
derate linearly at the rate of 120 mW/°C. To avoid exceeding the design maximum junction temperature, these ratings should not be
exceeded. Due to variations in individual devices, electrical characteristics, and thermal resistance, the built-in thermal overload
protection can be activated at power levels slightly above or below the rated dissipation.
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2−3
SLIS012 − D3378, FEBRUARY 1990
recommended operating conditions
MIN
NOM
MAX
UNIT
Logic supply voltage, VCC
4.5
5.5
V
Output supply voltage, VDD
10
35
V
High-level input voltage, VIH
2
V
Low-level input voltage, VIL
0.6
V
Setup time, data before ENBL ↑, tsu (see Figure 1)
100
ns
Hold time, data after ENBL ↑, th (see Figure 1)
100
ns
300
ns
ENBL low
Pulse duration, tw (see Figure 1)
CLR low
Operating case temperature, TC
−40
125
°C
MAX
UNIT
electrical characteristics, VCC = 5 V, VDD = 14 V, TC = 25°C (unless otherwise noted)
TEST CONDITIONS†
PARAMETER
V(BR)DSX
VF(K)
Drain-source breakdown voltage
VSD
VIK
Source-drain diode forward voltage
VOL
IIH
Low-level output voltage at F
IIL
ICC
Low-level input current
Clamp-diode forward voltage
Nominal current
IDD
Output supply current
IR(K)
Clamp-diode reverse current
IDSX
Off-state drain current
IO(F)
High-level fault leakage current
See Notes 5 and 6
1.6
V
See Notes 5 and 6
1.5
V
−1.5
V
IO = 0,
VDS = 55 V,
20
µA
0.1
mA
All outputs off
10
mA
TC = 85°C,
700
All outputs off
VO = 0
VO = 0,
VDS = 55 V,
VR = 55 V
V
VI = 2.7 V
VI = 0.4 V
VDS(on) = 0.5 V,
IN = ID,
See Notes 5, 6, and 7
mA
6
1
TC = 125°C
10
1
VR = 55 V,
VOH = 5.5 V
Static drain-source on-state resistance
V
0.4
VCC = 5.5 V,
IO = 0,
Logic supply current
TYP
II = ∼ 12 mA
IOL = 4 mA
VCC = 5.5 V,
High-level input current
MIN
60
IS = 1.25 A,
VCC = MIN,
Input clamp voltage
IN
rDS(on)
ID = 1 mA
IF = 1.25 A,
TC = 125°C
10
1
ID = 1.25 A
ID = 1.25 A,
TC = 125°C
ID = 3 A
See Notes 5 and 6
0.5
0.6
0.8
1
mA
µA
A
µA
A
µA
Ω
0.55
0.65
† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTES: 5. Technique should limit TJ − TC to 10°C maximum.
6. These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts.
7. Nominal current is defined for a consistent comparison between devices from different sources. It is the current that produces a voltage
drop of 0.5 V at 85°C case temperature.
2−4
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SLIS012 − D3378, FEBRUARY 1990
switching characteristics, VCC = 5 V, VDD = 24 V, TC = 25°C
PARAMETER
TEST CONDITIONS
tPLH
Propagation delay time, low-to-high-level drain output
from clock
tPHL
Propagation delay time, high-to-low-level drain output
from clock
tTLH
tTHL
MAX
UNIT
ns
550
ns
Transition time, low-to-high-level of source-drain output
35
ns
Transition time, high-to-low-level of source-drain output
30
ns
380
ns
380
ns
35
ns
70
ns
45
ns
tPLH
tPHL
Propagation delay time, high-to-low-level drain output
from input
ta
TYP
450
Propagation delay time, low-to-high-level drain output
from input
tr
tf
MIN
CL = 30 pF,
CL = 30 pF,
ID = IN = 700 mA
See Figure 1
See Figure 2,
Rise time, low-to-high-level of source-drain output
Fall time, high-to-low-level of source-drain output
IF = 3 A,
See Notes 5 and 6,
Reverse-recovery-current rise time
di/dt = 100 A/µs,
See Figure 3
NOTES: 5. Technique should limit TJ − TC to 10°C maximum.
6. These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts.
thermal resistance
PARAMETER
TEST CONDITIONS
RθJC
Junction-to-case thermal resistance
RθJA
Junction-to-ambient thermal resistance
MIN
TYP
MAX
8.33
All four outputs with equal power
50
UNIT
°C/W
operating characteristics over −40°C to 125°C case temperature range
PARAMETER
MIN
Undervoltage shutdown
TYP
3
Thermal shutdown temperature
Thermal shutdown hysteresis
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MAX
4.5
UNIT
V
155
°C
15
°C
2−5
SLIS012 − D3378, FEBRUARY 1990
PARAMETER MEASUREMENT INFORMATION
5V
Input
Waveform
Generator
(see Note A)
24 V
VCC
CLR
VS
RL = 37 Ω
ENBL
Circuit
Under
Test
Waveform
Generator
(see Note A)
Output
DRAIN
IN
CL = 30 pF
(see Note B)
GND
Input
(a) TEST CIRCUIT
5V
IN
0V
5V
ENBL
50%
50%
50%
0V
tw(ENBL)
tPHL
tPLH
Output
10%
VOH
90%
90%
10%
VOL
tTHL
tTLH
(b) SWITCHING TIMES FROM ENABLE INPUT
tw
3V
50%
50%
ENBL
50%
0V
tw(ENBL)
tsu
th
3V
IN
50% Valid 50%
0V
(c) INPUT SETUP AND HOLD WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: tr ≤ 10 ns, tf ≤ 10 ns, tw = 300 ns, PRR = 5 kHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 1. Test Circuit and Voltage Waveforms
2−6
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•
SLIS012 − D3378, FEBRUARY 1990
PARAMETER MEASUREMENT INFORMATION
5V
VCC
ENBL
Waveform
Generator
(see Note A)
13 V
CLR VDD
13 V
RL = 17.8 Ω
Circuit
Under
Test DRAIN
10%
0V
Output
tPHL
tPLH
10%
IN
CL = 30 pF
(see Note B)
GND
5V
90%
Input
90%
Output
10%
90%
tf
Input
(a) TEST CIRCUIT
13 V
0V
tr
(b) VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: tr ≤ 10 ns, tf ≤ 10 ns, tw = 5 ms, PRR = 5 kHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 2. Test Circuit and Voltage Waveforms
3A
di / dt = 100 A / µs
IF
0
25 % of IRM
IRM
(see Note A)
ta
trr
(see Note B)
NOTES: A. IRM = maximum recovery current.
B. trr = reverse recovery time.
Figure 3. Reverse-Recovery-Current Waveforms of Source-Drain Diode
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2−7
SLIS012 − D3378, FEBRUARY 1990
PARAMETER MEASUREMENT INFORMATION
5V
tw
20 V
Input
VCC
CLR VDS
0
0.11 Ω
tx
1.5 ms
(see Note B)
IDM = 3 A
ENBL
Circuit
Under
Test
Waveform
Generator
(see Note A)
IN
ID
10 mH
DRAIN
0
VDS
IDS
GND
V(BR)DSX = 60 V Min
VDS
Input
0
(a) TEST CIRCUIT
(b) VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: tr ≤ 10 ns, tf ≤ 10 ns, tw = 1 ms, PRR = 5 kHz, ZO = 50 Ω.
B. Input pulse duration (tw) is increased until peak current IDM = 3 A.
I
Energy test level is defined as E
AS
+
DM
V
(BR)DSX
2
tx
+ 50 mJ min.
Figure 4. Single-Pulse Avalanche Energy Test Circuit and Waveforms
2−8
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SLIS012 − D3378, FEBRUARY 1990
MAXIMUM RATINGS
MAXIMUM DRAIN CURRENT
vs
DUTY CYCLE
MAXIMUM DRAIN CURRENT
vs
DUTY CYCLE
3
3
TA = 25°C
N = Number of Outputs
Conducting Simultaneously
See Note A
2.75
2.50
2
ID − Drain Current − A
2.25
N= 2
N= 3
1.75
N=1
1.50
1.25
1
0.75
2.25
2
1
N=4
0.25
0.25
10
20
30
40
50
60
70
80
N=1
1.25
0.75
N=4
0
N= 3
1.50
0.50
0
N= 2
1.75
0.50
0
90 100
0
10
20
30
d − Duty Cycle − %
40
50
60
70
80
90 100
d − Duty Cycle − %
Figure 5
Figure 6
MAXIMUM DRAIN CURRENT
vs
DUTY CYCLE
MAXIMUM DRAIN CURRENT
vs
PULSE DURATION
3
100
TA = 125°C
N = Number of Outputs
Conducting Simultaneously
See Note A
2.50
2.25
70
2
N= 2
N= 3
1.75
1.50
N=1
1.25
1
0.75
TA = 25°C
Nonrepetitive Pulse Operation
40
ID − Drain Current − A
2.75
ID − Drain Current − A
ID − Drain Current − A
2.50
TA = 50°C
N = Number of Outputs
Conducting Simultaneously
See Note A
2.75
20
10
7
4
N=4
0.50
2
0.25
0
0
10
20
30
40
50
60
70
80
1
0.1
90 100
0.4
1
4
10
40
100
400 1000
tw − Pulse Duration − ms
d − Duty Cycle − %
Figure 7
Figure 8
t
10 ms
, where tw and tc are defined by the following:
NOTE A: For Figures 5, 6, and 7, d = w =
tc
tc
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tc
tw
ID
0
2−9
SLIS012 − D3378, FEBRUARY 1990
MAXIMUM RATINGS
MAXIMUM CONTINUOUS DRAIN CURRENT
vs
FREE-AIR TEMPERATURE
1.4
N=1
1.3
N = Number of Outputs
Conducting Simultaneously
1.2
ID − Drain Current − A
1.1
N=2
1
N=3
0.9
0.8
N=4
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
20
40
60
80
100 120
TA − Free-Air Temperature − °C
140
160
Figure 9
TYPICAL CHARACTERISTICS
STATIC DRAIN-SOURCE ON-RESISTANCE
vs
DRAIN CURRENT
STATIC DRAIN-SOURCE ON-RESISTANCE
vs
POWER MOSFET DRIVER SUPPLY VOLTAGE
rDS(on) − Static Drain-Source On-Resistance − Ω
r
− Static Drain-Source On-Resistance − Ω
DS(on)
0.9
VDD = 20 V
See Note A
0.8
TC = 125°C
0.7
0.6
TC = 25°C
0.5
0.4
0.3
TC = − 40°C
0.5
1
1.5
2.5
2
3
1.3
ID = 500 mA
See Note A
1.2
1.1
1
0.9
TC = 125°C
0.8
0.7
0.6
TC = 25°C
0.5
TC = − 40°C
0.4
0.3
8
ID − Drain Current − A
12
16
20
NOTE A: Technique should limit TJ − TC to 10°C maximum.
Figure 10
2−10
24
28
VDD − Power MOSFET Driver Supply Voltage − V
Figure 11
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•
SLIS012 − D3378, FEBRUARY 1990
THERMAL INFORMATION
FREE-AIR TEMPERATURE
DISSIPATION DERATING CURVE
PD − Total Continuous Dissipation − W
3
Derating Factor = 20 mW/°C
RθJA = 50°C/ W
2.5
2
1.5
1
0.5
0
0
25
75
100
125
50
TA − Free-Air Temperature − °C
150
Figure 12
TRANSIENT THERMAL IMPEDANCE
vs
ON TIME
The single-pulse curve in Figure 11 represents measured data.
The curves for various pulse durations are based on the
following equation:
Z θJA− Transient Thermal Impedance − ° C /W
100
Z qJA +
d = 50 %
Z q(t
d=5%
w
Z q(t
d=2%
Z q(tw
Single Pulse
0.1
0.001
q JA
Ť
Ť
t
) 1 * tw Z q(tw ) t c )
c
Where:
d = 10 %
1
w
c
) Z q(tw) * Z q(tc)
d = 20 %
10
Ť tt Ť R
c
) = the single-pulse thermal impedance
for t = tw seconds
) = the single-pulse thermal impedance
for t = tc seconds
) t c )= the single-pulse thermal impedance
for t = tw + tc seconds
d = tw/tc
tc
0.01
0.1
1
10
100
1000
tw
t − On Time − s
Figure 13
ID
0
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2−11
SLIS012 − D3378, FEBRUARY 1990
2−12
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Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Amplifiers
Data Converters
DSP
Clocks and Timers
Interface
Logic
Power Mgmt
Microcontrollers
RFID
RF/IF and ZigBee® Solutions
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/clocks
interface.ti.com
logic.ti.com
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lprf
Applications
Audio
Automotive
Broadband
Digital Control
Medical
Military
Optical Networking
Security
Telephony
Video & Imaging
Wireless
www.ti.com/audio
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/medical
www.ti.com/military
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
www.ti.com/wireless
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