INA2134-EP www.ti.com SBOS595C – MARCH 2012 – REVISED MARCH 2012 AUDIO DIFFERENTIAL LINE RECEIVER 0dB (G = 1) Check for Samples: INA2134-EP FEATURES 1 • • • • • • • • • Single and Dual Versions Low Distortion: 0.0005% at f = 1 kHz High Slew Rate: 14 V/ms Fast Settling Time: 3 ms to 0.01% Wide Supply Range: ±4 V to ±18 V Low Quiescent Current: 3.1 mA max High CMRR: 90 dB Fixed Gain = 0 dB (1V/V) Dual 14-Pin SOIC Package SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS • • • • • • • Controlled Baseline One Assembly/Test Site One Fabrication Site Available in Military (–55°C/125°C) Temperature Range (1) Extended Product Life Cycle Extended Product-Change Notification Product Traceability APPLICATIONS • • • • • • • • D PACKAGE (TOP VIEW) Audio Differential Line Receiver Summing Amplifier Unity-Gain Inverting Amplifier Psuedoground Generator Instrumentation Building Block Current Shunt Monitor Voltage-Controlled Current Source Ground Loop Eliminator NC 1 –In A 2 14 Ref A 13 Out A A +In A 3 12 Sense A V– 4 11 V+ +In B 5 10 Sense B B –In B 6 9 Out B NC 7 8 Ref B NC = No Connection (1) Additional temperature ranges available - contact factory DESCRIPTION The INA2134 is a differential line receiver consisting of high performance op amps with onchip precision resistors. The device is fully specified for high performance audio applications and has excellent ac specifications, including low distortion (0.0005% at 1 kHz) and high slew rate (14 V/ms), assuring good dynamic response. In addition, wide output voltage swing and high output drive capability allow use in a wide variety of demanding applications. The dual version features completely independent circuitry for lowest crosstalk and freedom from interaction, even when overdriven or overloaded. The INA2134 on-chip resistors are laser trimmed for accurate gain and optimum common-mode rejection. Furthermore, excellent TCR tracking of the resistors maintains gain accuracy and common-mode rejection over temperature. Operation is guaranteed from ±4 V to ±18 V (8-V to 36-V total supply). The INA2134 comes in a 14-pin SOIC surface-mount package and is specified for operation over the military temperature range, –55°C to 125°C. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2012, Texas Instruments Incorporated INA2134-EP SBOS595C – MARCH 2012 – REVISED MARCH 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) TA PACKAGE TOP-SIDE MARKING –55°C to 125°C SOIC-14 – D INA2134M (1) ORDERABLE PART NUMBER VID NUMBER TRANSPORT MEDIA INA2134MDREP V62/12613-01XE Tape and Reel, large INA2134MDEP V62/12613-02XE Tube For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. V+ 11 –In A 2 25kW 25kW 13 A +In A –In B 3 6 25kW 25kW 25kW 25kW 5 25kW 14 10 9 B +In B 12 25kW 8 Sense A Out A Ref A Sense B Out B Ref B INA2134 4 V– ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) VALUE UNIT Supply voltage, V+ to V- 40 V Input voltage range ±80 Output short-circuit (to ground) (2) Operating temperature -55 to 125 °C Storage temperature -65 to 150 °C Junction temperature 150 °C Lead temperature (soldering, 10 s) 300 °C Human Body Model (HBM) 500 V Machine Model (MM) 100 V ESD Rating (1) (2) 2 V Continuous Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. One channel per package. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): INA2134-EP INA2134-EP www.ti.com SBOS595C – MARCH 2012 – REVISED MARCH 2012 THERMAL INFORMATION INA2134 THERMAL METRIC (1) D UNITS 14 PINS θJA Junction-to-ambient thermal resistance (2) 73.1 θJC Junction-to-case thermal resistance 31.1 θJB Junction-to-board thermal resistance (3) 27.6 ψJT Junction-to-top characterization parameter (4) 3.2 ψJB Junction-to-board characterization parameter (5) 27.3 °C/W xxx (1) (2) (3) (4) (5) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a. The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB temperature, as described in JESD51-8. The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7). The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7). ELECTRICAL CHARACTERISTICS At TA = 25°C, VS = ±18 V, RL = 2 kΩ, and Ref pin connected to Ground (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT AUDIO PERFORMANCE Total harmonic distortion + noise, f = 1 kHz VIN = 10 Vrms Noise floor (1) 20 kHz BW Headroom (1) THD+N < 1% 0.0005 % -100 dBu 23 dBu Small-signal bandwidth 3.1 MHz Slew rate 14 V/µs FREQUENCY RESPONSE Settling time: 0.1% 10-V step, CL = 100 pF 2 µs 0.01% 10-V step, CL = 100 pF 3 µs 50% overdrive 3 µs 117 dB Overload recovery time Channel separation (dual), f = 1 kHz OUTPUT NOISE VOLTAGE (2) f = 20 Hz to 20 kHz f = 1 kHz 7 µVrms 52 nV/√Hz OFFSET VOLTAGE (3) Input offset voltage VCM = 0 V vs Temperature vs Power supply ±100 -55°C to 125°C ±2 VS = ±4 V to ±18 V, -55°C to 125°C ±5 ±1000 µV µV/°C ±60 µV/V INPUT Common-mode voltage range: Positive VO = 0 V 2(V+) – 5 2(V+) – 4 V Negative VO = 0 V 2(V-) + 5 2(V-) + 2 V Differential voltage range See Typical Curve VCM = ±31 V, RS = 0 Ω 74 90 VCM = ±31 V, RS = 0 Ω, -55°C to 125°C 72 85 dB Differential 50 kΩ Common-mode 50 kΩ Common-mode rejection Impedance: (4) (1) (2) (3) (4) dB dBu = 20log (Vrms/0.7746). Includes effects of amplifier’s input current noise and thermal noise contribution of resistor network. Includes effects of amplifier’s input bias and offset currents. 25-kΩ resistors are ratio matched, but have ±25% absolute value. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): INA2134-EP 3 INA2134-EP SBOS595C – MARCH 2012 – REVISED MARCH 2012 www.ti.com ELECTRICAL CHARACTERISTICS (continued) At TA = 25°C, VS = ±18 V, RL = 2 kΩ, and Ref pin connected to Ground (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT GAIN Initial 1 Error VO = –16 V to 16 V vs Temperature ±0.1 % ±2 ±3.5 % VO = –16 V to 16 V, -55°C to 125°C Nonlinearity VO = –16 V to 16 V V/V ±0.02 0.0001 % OUTPUT Voltage output: Positive (V+) – 2 (V+) – 1.8 V Negative (V-) + 2 (V-) + 1.6 V Positive Specified temperature range (V+) – 2.45 (V+) – 2.1 V Negative Specified temperature range (V-) + 2.45 (V-) + 1.8 V Current limit, continuous to common ±60 mA Capacitive load (stable operation) 500 pF POWER SUPPLY Rated voltage ±18 Voltage range ±4 Quiescent current (per amplifier) V ±18 V IO = 0 A ±2.4 ±2.9 mA IO = 0 A, -55°C to 125°C ±2.7 ±3.1 mA TEMPERATURE RANGE Specified temperature range –55 125 °C Operating temperature range –55 125 °C Storage temperature range –65 150 °C xxx Estimated Life (Hours) 1000000 100000 Electromigration Fail Mode Wirebond Life 10000 1000 125 130 135 140 145 150 Continuous TJ (°C) A. See datasheet for absolute maximum and minimum recommended operating conditions. B. Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect life). C. The predicted operating lifetime vs. junction temperature is based on reliability modeling using electromigration as the dominant failure mechanism affecting device wearout for the specific device process and design characterisitics. Figure 1. INA2134 Electromigration Fail Mode/Wirebond Life Derating Chart 4 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): INA2134-EP INA2134-EP www.ti.com SBOS595C – MARCH 2012 – REVISED MARCH 2012 TYPICAL CHARACTERISTICS At TA = 25°C, VS = ±18 V (unless otherwise noted). TOTAL HARMONIC DISTORTION+NOISE vs FREQUENCY DIM INTERMODULATION DISTORTION vs OUTPUT AMPLITUDE 1 5 BW = 100kHz VO = 10Vrms 1 DIM (%) THD+Noise (%) 0.1 0.010 RL = 100kW 0.1 RL = 2kW, 600W RL = 2kW 0.001 0.010 RL = 600W 0.0001 0.001 20 100 1k 10k 20k –10 –5 0 5 10 15 20 Frequency (Hz) Output Amplitude (dBu) HEADROOM - TOTAL HARMONIC DISTORTION+NOISE vs OUTPUT AMPLITUDE HARMONIC DISTORTION PRODUCTS vs FREQUENCY 1 25 0.01 Amplitude (% of Fundamental) f = 1kHz THD+Noise (%) 0.1 0.010 RL = 600W 0.001 RL = 2kW, 100kW RL = 600W, 3rd Harmonic RL = 2kW, 2nd Harmonic 0.0001 ( RL = 2kW, 3rd Harmonic 0.00001 noise limited) VO = 1Vrms 0.000001 0.0001 0 5 10 15 20 25 30 20 100 1k Output Amplitude (dBu) Frequency (Hz) OUTPUT VOLTAGE NOISE SPECTRAL DENSITY vs FREQUENCY OUTPUT NOISE VOLTAGE vs NOISE BANDWIDTH 10k 10k 20k 100 Noise Voltage (µVrms) Voltage Noise (nV/ÖHz) RL = 600W, 2nd Harmonic 0.001 1k 100 10 10 1 0.1 1 10 100 1k 10k 100k 1M 1 Frequency (Hz) 10 100 1k 10k 100k Frequency (Hz) Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): INA2134-EP 5 INA2134-EP SBOS595C – MARCH 2012 – REVISED MARCH 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = 25°C, VS = ±18 V (unless otherwise noted). GAIN vs FREQUENCY COMMON-MODE REJECTION vs FREQUENCY 100 Common-Mode Rejection (dB) 10 Voltage Gain (dB) 0 –10 –20 80 60 40 20 0 –30 1k 10k 100k 1M 10M 1k 10k Frequency (Hz) POWER SUPPLY REJECTION vs FREQUENCY 1M CHANNEL SEPARATION vs FREQUENCY 130 120 RL = 100kW 100 80 Channel Separation (dB) Power Supply Rejection (dB) 100k Frequency (Hz) –PSR 60 40 +PSR 20 0 120 RL = 2kW 110 100 90 100 1k 10k 100k 20 1M 100 1k 10k 20k Frequency (Hz) Frequency (Hz) MAXIMUM OUTPUT VOLTAGE vs FREQUENCY INPUT COMMON-MODE VOLTAGE RANGE vs OUTPUT VOLTAGE 40 40 VS = ±18V Common-Mode Voltage (V) Output Voltage (Vp-p) 30 30 20 10 20 10 0 –10 –20 –30 –40 VREF = 0V RL = 2kW –50 0 100 1k 10k 100k 1M 10M –20 6 –15 –10 –5 0 5 10 15 20 Output Voltage (V) Frequency (Hz) Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): INA2134-EP INA2134-EP www.ti.com SBOS595C – MARCH 2012 – REVISED MARCH 2012 TYPICAL CHARACTERISTICS (continued) At TA = 25°C, VS = ±18 V (unless otherwise noted). SLEW RATE vs TEMPERATURE QUIESCENT CURRENT vs TEMPERATURE 4 16 3 14 Slew Rate (V/µs) Quiescent Current (mA) –SR 2 1 +SR 12 10 8 0 –75 –50 –25 0 25 50 75 100 –75 125 –50 –25 0 25 50 75 100 125 Temperature (°C) Temperature (°C) SHORT-CIRCUIT CURRENT vs TEMPERATURE QUIESCENT CURRENT vs SUPPLY VOLTAGE 80 3 40 Quiescent Current (mA) Short-Circuit Current (mA) 60 +ISC 20 0 –20 –ISC –40 2 1 –60 0 –80 –75 –50 –25 0 25 50 75 100 125 ±4 ±6 ±8 Temperature (°C) ±10 ±12 ±14 ±16 ±18 Supply Voltage (V) OFFSET VOLTAGE PRODUCTION DISTRIBUTION Percent of Amplifiers (%) 25 20 Typical Production Distribution of Packaged Units. 15 10 5 –1000 –900 –800 –700 –600 –500 –400 –300 –200 –100 0 100 200 300 400 500 600 700 800 900 1000 0 Offset Voltage (µV) Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): INA2134-EP 7 INA2134-EP SBOS595C – MARCH 2012 – REVISED MARCH 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = 25°C, VS = ±18 V (unless otherwise noted). SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE OUTPUT VOLTAGE SWING vs OUTPUT CURRENT 70 17 –55°C 60 15 25°C 14 50 125°C 13 Overshoot (%) Output Voltage Swing (V) 16 85°C 12 –12 85°C 125°C –13 –14 –15 25°C –16 40 30 20 RL = 2kW 100mV Step 10 –55°C 0 –17 0 ±20 ±40 ±60 ±80 0 ±100 400 800 1200 1600 2000 Load Capacitance (pF) Output Current (mA) LARGE-SIGNAL STEP RESPONSE CL = 500pF SMALL-SIGNAL STEP RESPONSE 5V/div 50mV/div CL = 100pF CL = 500pF 1ms/div 8 1ms/div Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): INA2134-EP INA2134-EP www.ti.com SBOS595C – MARCH 2012 – REVISED MARCH 2012 APPLICATION INFORMATION Basic Connection Figure 2 shows the basic connections required for operation of the INA2134. Decoupling capacitors are strongly recommended in applications with noisy or high impedance power supplies. The capacitors should be placed close to the device pins as shown in Figure 2. All circuitry is completely independent in the dual version assuring lowest crosstalk and normal behavior when one amplifier is overdriven or short-circuited. As shown in Figure 2, the differential input signal is connected to pins 2 and 3. The source impedances connected to the inputs must be nearly equal to assure good common mode rejection. A 10-Ω mismatch in source impedance will degrade the common-mode rejection of a typical device to approximately 74 dB. If the source has a known impedance mismatch, an additional resistor in series with the opposite input can be used to preserve good common-mode rejection. Do not interchange pins 1 and 3 or pins 2 and 5, even though nominal resistor values are equal. These resistors are laser trimmed for precise resistor ratios to achieve accurate gain and highest CMR. Interchanging these pins would not provide specified performance. V+ V– 1µF 1µF 7 4 INA2134 –In V2 2 R1 25kW R2 25kW 5 6 VOUT = V3 – V2 +In 3 V3 R3 25kW R4 25kW 1 Figure 2. Precision Difference Amplifier (Basic Power Supply and Signal Connections) Audio Performance The INA2134 was designed for enhanced ac performance. Very low distortion, low noise, and wide bandwidth provide superior performance in high quality audio applications. Laser-trimmed matched resistors provide optimum common-mode rejection (typically 90 dB), especially when compared to circuits implemented with an operational amplifier and discrete precision resistors. In addition, high slew rate (14 V/µs) and fast settling time (3 ms to 0.01%) ensure good dynamic performance. The INA2134 has excellent distortion characteristics. THD+Noise is below 0.002% throughout the audio frequency range. Up to approximately 10-kHz distortion is below the measurement limit of commonly used test equipment. Furthermore, distortion remains relatively flat over its wide output voltage swing range (approximately 1.7 V from either supply). Offset Voltage Trim The INA2134 is laser trimmed for low offset voltage and drift. Most applications require no external offset adjustment. Figure 3 shows an optional circuit for trimming the output offset voltage. The output is referred to the output reference terminal (pin 1), which is normally grounded. A voltage applied to the Ref terminal will be summed with the output signal. This can be used to null offset voltage as shown in Figure 3. The source impedance of a signal applied to the Ref terminal should be less than 10 Ω to maintain good common-mode rejection. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): INA2134-EP 9 INA2134-EP SBOS595C – MARCH 2012 – REVISED MARCH 2012 www.ti.com INA2134 2 V2 R1 R2 5 6 10W V3 3 VO R3 R4 +15V VO = V3 – V2 Offset Adjustment Range = ±300µV 1 499kW 100kW 10W –15V Figure 3. Offset Adjustment Other Applications The difference amplifier is a highly versatile building block that is useful in a wide variety of applications. See the INA105 data sheet (SBOS145) for additional applications ideas, including: • Current Receiver with Compliance to Rails • Precision Unity-Gain Inverting Amplifier • ±10-V Precision Voltage Reference • ±5- Precision Voltage Reference • Precision Unity-Gain Buffer • Precision Average Value Amplifier • Precision G = 2 Amplifier • Precision Summing Amplifier • Precision G = 1/2 Amplifier • Precision Bipolar Offsetting • Precision Summing Amplifier with Gain • Instrumentation Amplifier Guard Drive Generator • Precision Summing Instrumentation Amplifier • Precision Absolute Value Buffer • Precision Voltage-to-Current Converter with Differential Inputs • Differential Input Voltage-to-Current Converter for Low IOUT • Isolating Current Source • Differential Output Difference Amplifier • Isolating Current Source with Buffering Amplifier for Greater Accuracy • Window Comparator with Window Span and Window Center Inputs • Precision Voltage-Controlled Current Source with Buffered Differential Inputs and Gain • Digitally Controlled Gain of ±1 Amplifier 10 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): INA2134-EP INA2134-EP www.ti.com SBOS595C – MARCH 2012 – REVISED MARCH 2012 INA2134 5 2 6 V0 = V1 + V2 1 V1 V2 3 Figure 4. Precision Summing Amplifier INA2134 5 2 –In 6 3 6 BUF634 1 3 +In VO Figure 5. Boosting Output Current INA2134 V1 –In 1/2 OPA2134 5 2 R2 6 R1 V0 0utput R2 V2 1/2 OPA2134 1 3 +In VO = (1 + 2R2/R1) (V2 –V1) Figure 6. High Input Impedance Instrumentation Amplifier Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): INA2134-EP 11 PACKAGE OPTION ADDENDUM www.ti.com 2-Apr-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) INA2134MDREP ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR V62/12613-01XE ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR Samples (Requires Login) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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OTHER QUALIFIED VERSIONS OF INA2134-EP : • Catalog: INA2134 NOTE: Qualified Version Definitions: Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 2-Apr-2012 • Catalog - TI's standard catalog product Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device INA2134MDREP Package Package Pins Type Drawing SOIC D 14 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 16.4 Pack Materials-Page 1 6.5 B0 (mm) K0 (mm) P1 (mm) 9.0 2.1 8.0 W Pin1 (mm) Quadrant 16.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) INA2134MDREP SOIC D 14 2500 367.0 367.0 38.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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