TPS92640 TPS92641 www.ti.com SNVS902 – NOVEMBER 2012 TPS92640 / TPS92641 Synchronous Buck Controllers for Precision Dimming LED Drivers FEATURES DESCRIPTION • • • • • The TPS92640/41 are high voltage, synchronous NFET controllers for buck current regulators. Output current regulation is based on valley current-mode control with a constant on-timer. This control method eases the design of loop compensation. The TPS92640/41 includes a high-voltage start-up regulator that operates over a wide input range of 7V to 85V. The PWM controller is designed for high speed capability including an oscillator frequency range up to 1.0 MHz. The TPS92640/41 is optimized to give superior dimming performance with both analog and PWM dimming. Both devices include an error amplifier, precision reference, thermal shutdown and low power shutdown mode. Additionally, the TPS92641 provides shunt FET dimming capability. 1 2 • • • • VIN range from 7V to 85V 2Ω, 1Apeak MOSFET gate drivers Adjustable LED Current Sense voltage Input UVLO and output OVP Various dimming modes – 500:1 Analog Dimming – 2500:1 Standard PWM dimming – 20000:1 Shunt FET PWM dimming Shunt Dimming MOSFET gate driver Programmable switching frequency Precision Voltage Reference Low Power Shutdown Mode and Thermal Shutdown APPLICATIONS • • • LED Driver / Constant Current Regulator Automotive LED Drivers General LED Illumination TYPICAL APPLICATION DIAGRAM VIN C2 R1 TPS92641 R2 VIN HG RON SW Q1 L1 C1 C6 D2 LED+ C4 UDIM UDIM BOOT R4 R3 VOUT R8 C5 D1 Q3* VCC LED LOAD C3 C7 VREF LG IADJ CS Q2 R5 R7 R6 C8 COMP DAP GND R9 LEDR10 SDIM* SDIM SDRV *TPS92641 only GND 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. Copyright © 2012, Texas Instruments Incorporated PRODUCT PREVIEW Check for Samples: TPS92640, TPS92641 TPS92640 TPS92641 SNVS902 – NOVEMBER 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. PIN CONFIGURATION TPS92641 PWP Package (Top View) TPS92640 PWP Package (Top View) VIN 1 14 HG VIN 1 16 HG RON 2 13 SW RON 2 15 SW UDIM 3 12 BOOT UDIM 3 14 BOOT VOUT 4 11 VCC VOUT 4 13 VCC VREF 5 10 LG VREF 5 12 LG IADJ 6 9 CS IADJ 6 11 CS COMP 7 8 GND COMP 7 10 GND SDIM 8 9 SDRV DAP DAP PIN FUNCTIONS PRODUCT PREVIEW TPS92640 TPS92641 1 1 VIN NAME Connect to input voltage. Connect 1µF bypass capacitor DESCRIPTION 2 2 RON Connect a resistor to VIN and capacitor to GND to set switching frequency. 3 3 UDIM Connect resistor divider from VIN to set under-voltage lockout threshold. 4 4 VOUT Connect resistor divider from VOUT, scaled down feedback of VOUT. 5 5 VREF Connect to top of resistor divider for IADJ. Bypass with 100nF ceramic capacitor. 6 6 IADJ Connect resistor divider from VREF or directly to VREF to set analog dimming level. Can be used for thermal fold-back also. 7 7 COMP Connect ceramic capacitor to GND to set loop compensation. 8 SDIM PWM dimming input for shunt FET dimming. 9 SDRV Connect to gate of external parallel NFET across LED load used for shunt dimming if desired. 8 10 GND System GND. Connect to DAP. 9 11 CS Connect to positive terminal of sense resistor at the bottom of the LED stack. 10 12 LG Connect to gate of low-side NFET of buck regulator. 11 13 VCC Bypass with 2.2µF ceramic capacitor to provide bias supply for controller. 12 14 BOOT Connect 100nF ceramic capacitor to switch node and diode to VCC to provide boosted voltage for high-side gate drive. 13 15 SW Connect to switch node of buck regulator. 14 16 HG Connect to gate of high-side NFET of buck regulator. DAP Place 6-9 vias from pad to GND plane for thermal relief Ordering Information ORDER NUMBER PACKAGE TYPE PACKAGE DRAWING TPS92640PWP TPS92640PWPT 14L TSSOP EXP PAD MXA14A TPS92640PWPR 92 Units in Rail 16L TSSOP EXP PAD MXA16A TPS92641PWPR 2 250 Units on Tape and Reel 2500 Units on Tape and Reel TPS92641PWP TPS92641PWPT SUPPLIED AS 94 Units in Rail 250 Units on Tape and Reel 2500 Units on Tape and Reel Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: TPS92640 TPS92641 TPS92640 TPS92641 www.ti.com SNVS902 – NOVEMBER 2012 ABSOLUTE MAXIMUM RATINGS (1) VIN, UDIM, SW BOOT HG V –1 (Continuous) mA –0.3 to 98.5 V –0.3 to 90 V –2.5 for 100 V/ns 98.5 for 100 v/ns mA –0.3 to +VCC (Continuous) V –2.5 for 100 V/ns VCC + 2.5 for 100 V/ms –1 to +1 (Continuous) mA –0.3 to 15 V VCC GND UNITS –1 to +1 (Continuous) LG, SDRV, CS VREF, RON, COMP, VOUT, IADJ, SDIM VALUE –0.3 to 90 –0.3 to 6 V –200 to +200 (Continuous) µA –0.3 to +0.3 (Continuous) V –2.5 to +2.5 for 100 V/ns Continuous Power Dissipation Internally Limited Maximum Junction Temperature Internally Limited Storage Temperature Range –65 to +150 Maximum Lead Temperature (Soldering and Reflow) ESD Rating (1) (2) (2) Human Body Model, applicable std. JESD22-A114-C PRODUCT PREVIEW If Military/Aerospace specified devices are required, contact the National Semiconductor Sales/Office/Distributors for availability and specifications. °C 260 °C 2 kV Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is specified and do not imply guaranteed performance limits. For specified performance limits and associated test conditions, see the Electrical Characteristics table. All voltages are with respect to the potential at the GND pin, unless otherwise specified. Refer to TI’s packaging website for more detailed information and mounting techniques. RECOMMENDED OPERATING CONDITIONS (1) over operating free-air temperature range (unless otherwise noted) MIN Input Voltage Range TJ (1) Junction Temperature Range NOM MAX UNIT 7 85 V –40 125 °C Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is specified and do not imply guaranteed performance limits. For specified performance limits and associated test conditions, see the Electrical Characteristics table. All voltages are with respect to the potential at the GND pin, unless otherwise specified. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: TPS92640 TPS92641 3 TPS92640 TPS92641 SNVS902 – NOVEMBER 2012 www.ti.com ELECTRICAL CHARACTERISTICS (1) Unless otherwise specified VIN = 24V. Limits appearing in bold type face apply over the entire junction temperature range of operation, –40°C to 125°C. Specifications appearing in normal type apply for TA = TJ = 25°C. Datasheet min/max specification limits are specified by design, test or statistical analysis. PARAMETER CONDITIONS MIN (2) TYP (3) MAX (2) 7.86 8.5 9.14 48 63 78 mA 2 3 mA UNIT STARTUP REGULATOR (VCC) VCCREG VCC Regulation ICC = 10 mA, VIN = 24V, 85V ICCLIM VCC Current Limit VCC = 0V IQ Quiescent Current VUDIM = 3.0V, Static VIN = 7V/24V/85V ISD Shutdown Current VUDIM = 0V 100 VCC increasing 5.04 VCC-UV VCC UVLO Threshold VCC-HYS VCC UVLO Hysteresis VCC decreasing 4.5 V µA 5.90 4.9 0.17 V V REFERENCE VOLTAGE (VREF) VREF Reference Voltage No Load, VIN = 7V/24V/85V IVREFLIM Current Limit VREF = 0V 2.97 3.03 3.09 V 1.3 2.1 2.9 mA 600 µV ERROR AMPLIFIER (CS, COMP) PRODUCT PREVIEW VCSREF CS Reference Voltage VCSREF-OFF Error Amp Input Offset Voltage ICOMP COMP Sink Current gM-CS With respect to GND VADJ/10 –600 0 V 85 µA COMP Source Current 110 µA Transconductance 500 µA/V (4) Linear Input Range See Transconductance Bandwidth -6dB unloaded response (4) ±125 mV 400 kHz 230 ns TIMERS / OVER VOLTAGE PROTECTION (RON, VOUT) tOFF-MIN Minimum Off-time tON-MIN Minimum On-time CS = 0V tON Programmed On-time RRON RON Pull-down Resistance tCL Current Limit Off-time tD-ON RON Thresh - HG Falling Delay VTH-OVP VOUT Over-Voltage Threshold VHYS-OVP VOUT Over-Voltage Hysteresis 235 VVOUT = 2V, RON = 25 kΩ, CON = 1nF 2.08 35 µs 120 270 µs 25 VOUT rising 2.85 3.05 Ω ns 3.25 0.13 V V GATE DRIVER (HG, LG, BOOT, SW) 1.5 6.0 Ω 1 4.5 Ω 3.9 6.0 Ω 1.1 4.5 Ω 3.4 4.5 V RSRC-LG LG Sourcing Resistance LG = High RSNK-LG LG Sinking Resistance LG = Low RSRC-HG HG Sourcing Resistance HG = High RSNK-HG HG Sinking Resistance HG = Low VTH-BOOT BOOT UVLO Threshold BOOT-SW rising VHYS-BOOT BOOT UVLO Hysteresis BOOT-SW falling 1.8 V TD-HL HG to LG deadtime HG fall to LG rise 60 ns TD-LH LG to HG deadtime LG fall to HG rise 60 ns (1) (2) (3) (4) 4 1.9 Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is specified and do not imply guaranteed performance limits. For specified performance limits and associated test conditions, see the Electrical Characteristics table. All voltages are with respect to the potential at the GND pin, unless otherwise specified. All limits specified at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100% production tested. All limits at temperature extremes are specified via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL). Typical numbers are at 25°C and represent the most likely norm. These electrical parameters are specified by design, and are not verified by test. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: TPS92640 TPS92641 TPS92640 TPS92641 www.ti.com SNVS902 – NOVEMBER 2012 ELECTRICAL CHARACTERISTICS(1) (continued) Unless otherwise specified VIN = 24V. Limits appearing in bold type face apply over the entire junction temperature range of operation, –40°C to 125°C. Specifications appearing in normal type apply for TA = TJ = 25°C. Datasheet min/max specification limits are specified by design, test or statistical analysis. PARAMETER CONDITIONS MIN (2) TYP (3) MAX (2) UNIT PWM DIMMING (SDIM, SDRV) (TPS92641 only.) RSRC-DDRV SDRV Sourcing Resistance SDRV = High 5.6 30.0 W tSDIM-RIS SDIM to SDRV Rising Delay SDIM rising 68 100 ns tSDIM -FALL SDIM to SDRV Falling Delay SDIM falling 29 70 VSDIM-RIS SDIM Rising Threshold SDIM rising 1.29 1.74 VSDIM -FALL SDIM Falling Threshold SDIM falling RSDIM-PU SDIM Pull-Up Resistance 0.5 V V 90 kW ANALOG ADJUST (IADJ) VADJ-MAX IADJ Clamp Voltage RADJ IADJ Input Impedance 2.46 2.54 2.62 1 V MΩ VTH-UDIM UDIM Startup Threshold UDIM rising 1.210 IHYS-UDIM UDIM Hysteresis Current tUDIM-RIS UDIM to HG/LG Rising Delay UDIM rising tUDIM-FALL UDIM to HG/LG Falling Delay UDIM falling 174 VUDIM-LP UDIM Low Power Threshold TUDIM-DET UDIM Shutdown Detect Timer 12 UDIM falling 8.5 1.276 1.342 V 21 30 µA 168 260 ns 280 ns 370 mV 13 ms THERMAL SHUTDOWN TSD Thermal Shutdown Threshold THYS Thermal Shutdown Hysteresis See (5) 165 °C See (5) 20 °C THERMAL RESISTANCE θJA-TPS92640 θJA-TPS92641 (5) (6) Junction to Ambient Junction to Ambient 14L TSSOP EXP PAD (6) 16L TSSOP EXP PAD (6) 40.0 °C/W 37.4 °C/W These electrical parameters are specified by design, and are not verified by test. Junction-to-ambient thermal resistance is highly board-layout dependent. In applications where high maximum power dissipation exists, namely driving a large MOSFET at high switching frequency from a high input voltage, special care must be paid to thermal dissipation issues during board design. In high-power dissipation applications, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX). Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: TPS92640 TPS92641 5 PRODUCT PREVIEW UNDER-VOLTAGE / PWM (UDIM) TPS92640 TPS92641 SNVS902 – NOVEMBER 2012 www.ti.com FUNCTIONAL BLOCK DIAGRAM VIN TPS92640, TPS92641 VCC VCC BIAS REGULATOR VIN COMP THERMAL SHUTDOWN IADJ VOLTAGE REFERENCES VCC UVLO VCC VSW EA + - R GATE DRIVE UVLO + + 13ms FILTER FSW R Q Shutdown S Q tON tOFF LGATE Enable UDIM DEAD TIME / LEVEL SHIFT tON_ Reset HG SW VCC LOGIC RON H.S. Driver VSW 21µA PWM_DIM / UVLO + - 1.276V BOOT SD CS 370mV VREF VDD PWM_DIM 2.54V 9R 370mV 1.276V 2.54V 3.03V DEAD TIME L.S. Driver LG End tON PRODUCT PREVIEW + - GND tON_Reset LEB TIMER VOUT 3.05V OVP + - TPS92641 ONLY VDD VCC SDIM 1.276V 6 + - PWM LOGIC Submit Documentation Feedback SDRV Copyright © 2012, Texas Instruments Incorporated Product Folder Links: TPS92640 TPS92641 TPS92640 TPS92641 www.ti.com SNVS902 – NOVEMBER 2012 TPS92640 - Precision Analog Dimming Application VIN VIN HG TPS92640 SW RON UDIM BOOT VOUT VCC VREF LG ROFF ILED uC IADJ CS DAP COMP PRODUCT PREVIEW GND TPS92640 – PWM Dimming Application with Thermal Fold-back VIN VIN HG TPS92640 RON SW UDIM BOOT VOUT VCC VREF LG IADJ NT C ILED CS DAP COMP GND Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: TPS92640 TPS92641 7 TPS92640 TPS92641 SNVS902 – NOVEMBER 2012 www.ti.com TPS92641 – Shunt FET PWM Dimming Application VIN VIN TPS92641 HG SW RON UDIM BOOT VOUT VCC VREF LG IADJ CS COMP ILED GND DAP uC PRODUCT PREVIEW SDIM 8 SDRV Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: TPS92640 TPS92641 TPS92640 TPS92641 www.ti.com SNVS902 – NOVEMBER 2012 TPS92640 – AC/DC TRIAC Dimming Application (with LM3450) PWM VREF BIAS DIM HOLD Optical Isolation + FB VDC VIN TPS92640 HG ZCD FLT1 PWM FLT2 Optical Isolation RON SW VCC LM3450 UDIM BOOT VOUT VCC VREF LG IADJ CS PRODUCT PREVIEW TRIAC dimmed AC Line GATE VADJ CS VAC COMP GND DAP ISEN FB ILED COMP GND FB Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: TPS92640 TPS92641 9 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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